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authorLinaro CI <ci_notify@linaro.org>2020-10-11 09:03:31 +0000
committerLinaro CI <ci_notify@linaro.org>2020-10-11 09:03:31 +0000
commit8f297e59d3b541fe07763d2f5d19e02b426099d0 (patch)
tree42d1c8a152d2f462e4909cf38cb631852420e66d /drivers/misc/hi6220-sysconfig.c
parent061aa2b8e8bfd557f386e6cd39ef4ea8bd3c1145 (diff)
parent2327620c9c132f9c55812b586d941de8595ef1b6 (diff)
Merge remote-tracking branch 'sumit-lts/lts-4.4.y-hikey' into linux-4.4.y4.4.239-rc1-hikey-20201011-826
Diffstat (limited to 'drivers/misc/hi6220-sysconfig.c')
-rw-r--r--drivers/misc/hi6220-sysconfig.c72
1 files changed, 72 insertions, 0 deletions
diff --git a/drivers/misc/hi6220-sysconfig.c b/drivers/misc/hi6220-sysconfig.c
new file mode 100644
index 000000000000..9b9d5d8bff19
--- /dev/null
+++ b/drivers/misc/hi6220-sysconfig.c
@@ -0,0 +1,72 @@
+/*
+ * For Hisilicon Hi6220 SoC, the reset of some hosts (e.g. UART) should be disabled
+ * before using them, this driver will handle the host chip reset disable.
+ *
+ * Copyright (C) 2015 Hisilicon Ltd.
+ * Author: Bintian Wang <bintian.wang@huawei.com>
+ *
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#define reset_offset 0x334
+#define pclk_offset 0x230
+#define PMUSSI_REG_EX(pmu_base, reg_addr) (((reg_addr) << 2) + (char *)pmu_base)
+
+static int __init hi6220_sysconf(void)
+{
+ static void __iomem *base = NULL;
+ struct device_node *node;
+ static void __iomem *base1 = NULL;
+ struct device_node *node1;
+ unsigned char ret;
+
+ node = of_find_compatible_node(NULL, NULL, "hisilicon,hi6220-sysctrl");
+ if (!node)
+ return -ENOENT;
+
+ base = of_iomap(node, 0);
+ if (base == NULL) {
+ printk(KERN_ERR "hi6220: sysctrl reg iomap failed!\n");
+ return -ENOMEM;
+ }
+
+ /*Disable UART1 reset and set pclk*/
+ writel(BIT(5), base + reset_offset);
+ writel(BIT(5), base + pclk_offset);
+
+ /*Disable UART2 reset and set pclk*/
+ writel(BIT(6), base + reset_offset);
+ writel(BIT(6), base + pclk_offset);
+
+ /*Disable UART3 reset and set pclk*/
+ writel(BIT(7), base + reset_offset);
+ writel(BIT(7), base + pclk_offset);
+
+ /*Disable UART4 reset and set pclk*/
+ writel(BIT(8), base + reset_offset);
+ writel(BIT(8), base + pclk_offset);
+
+ iounmap(base);
+
+ node1 = of_find_compatible_node(NULL, NULL, "hisilicon,hi655x-pmic");
+ if (!node1)
+ return -ENOENT;
+
+ base1 = of_iomap(node1, 0);
+ if (base1 == NULL) {
+ printk(KERN_ERR "hi6220: pmic reg iomap failed!\n");
+ return -ENOMEM;
+ }
+
+ /*enable clk for BT/WIFI*/
+ ret = *(volatile unsigned char*)PMUSSI_REG_EX(base1, 0x1c);
+ ret |= 0x40;
+ *(volatile unsigned char*)PMUSSI_REG_EX(base1, 0x1c) = ret;
+
+ iounmap(base1);
+ return 0;
+}
+postcore_initcall(hi6220_sysconf);