diff options
| author | Edward Nevill edward.nevill@linaro.org <Edward Nevill edward.nevill@linaro.org> | 2014-08-05 15:56:26 +0100 |
|---|---|---|
| committer | Edward Nevill edward.nevill@linaro.org <Edward Nevill edward.nevill@linaro.org> | 2014-08-05 15:56:26 +0100 |
| commit | df6eed90c329fa63a7193117f4caa9ab14543d8f (patch) | |
| tree | 0c8ffd3ef745cd32d7f5003fa641992937b74b57 | |
| parent | 3920a67639b349e65f2b55ceb5207280d0c37a49 (diff) | |
Get builtin sim image working again
| -rw-r--r-- | src/cpu/aarch64/vm/macroAssembler_aarch64.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp index 6c2b02d99..6f3f5965a 100644 --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp @@ -3625,6 +3625,7 @@ void MacroAssembler::encode_iso_array(Register src, Register dst, mov(result, len); // Save initial len +#ifndef BUILTIN_SIM subs(len, len, 32); br(LT, LOOP_8); @@ -3663,6 +3664,9 @@ void MacroAssembler::encode_iso_array(Register src, Register dst, BIND(LOOP_1); adds(len, len, 8); br(LE, DONE); +#else + cbz(len, DONE); +#endif BIND(NEXT_1); ldrh(tmp1, Address(post(src, 2))); tst(tmp1, 0xff00); |