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authorJonathan Marek <jonathan@marek.ca>2020-06-08 16:43:43 -0400
committerVinod Koul <vkoul@kernel.org>2020-07-13 09:45:45 +0530
commita8ccddf20805a3352b56b80932f5e3ba4779e071 (patch)
tree6764abb4d8725ff413a20a591c7e7f0d061f328b
parent457e46a0f7d80dfe2aa9b0f3bb980e5697340feb (diff)
downloadkernel-a8ccddf20805a3352b56b80932f5e3ba4779e071.tar.gz
soundwire: qcom: add support for mmio soundwire devices
Adds support for qcom soundwire devices with memory mapped IO registers. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-rw-r--r--drivers/soundwire/qcom.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index f38d1fd3679f..628747df1c75 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -90,6 +90,7 @@ struct qcom_swrm_ctrl {
struct sdw_bus bus;
struct device *dev;
struct regmap *regmap;
+ void __iomem *mmio;
struct completion *comp;
struct work_struct slave_work;
/* read/write lock */
@@ -154,6 +155,20 @@ static int qcom_swrm_ahb_reg_write(struct qcom_swrm_ctrl *ctrl,
return SDW_CMD_OK;
}
+static int qcom_swrm_cpu_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,
+ u32 *val)
+{
+ *val = readl(ctrl->mmio + reg);
+ return SDW_CMD_OK;
+}
+
+static int qcom_swrm_cpu_reg_write(struct qcom_swrm_ctrl *ctrl, int reg,
+ int val)
+{
+ writel(val, ctrl->mmio + reg);
+ return SDW_CMD_OK;
+}
+
static int qcom_swrm_cmd_fifo_wr_cmd(struct qcom_swrm_ctrl *ctrl, u8 cmd_data,
u8 dev_addr, u16 reg_addr)
{
@@ -746,6 +761,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
struct sdw_master_prop *prop;
struct sdw_bus_params *params;
struct qcom_swrm_ctrl *ctrl;
+ struct resource *res;
int ret;
u32 val;
@@ -760,8 +776,13 @@ static int qcom_swrm_probe(struct platform_device *pdev)
if (!ctrl->regmap)
return -EINVAL;
} else {
- /* Only WCD based SoundWire controller is supported */
- return -ENOTSUPP;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ ctrl->reg_read = qcom_swrm_cpu_reg_read;
+ ctrl->reg_write = qcom_swrm_cpu_reg_write;
+ ctrl->mmio = devm_ioremap_resource(dev, res);
+ if (IS_ERR(ctrl->mmio))
+ return PTR_ERR(ctrl->mmio);
}
ctrl->irq = of_irq_get(dev->of_node, 0);