aboutsummaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h
blob: d553f8e88df6eb922f79058d4d077b409d54c465 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2008 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/

#ifndef __CVMX_PCIEEP_DEFS_H__
#define __CVMX_PCIEEP_DEFS_H__

#define CVMX_PCIEEP_CFG000 \
	 (0x0000000000000000ull)
#define CVMX_PCIEEP_CFG001 \
	 (0x0000000000000004ull)
#define CVMX_PCIEEP_CFG002 \
	 (0x0000000000000008ull)
#define CVMX_PCIEEP_CFG003 \
	 (0x000000000000000Cull)
#define CVMX_PCIEEP_CFG004 \
	 (0x0000000000000010ull)
#define CVMX_PCIEEP_CFG004_MASK \
	 (0x0000000080000010ull)
#define CVMX_PCIEEP_CFG005 \
	 (0x0000000000000014ull)
#define CVMX_PCIEEP_CFG005_MASK \
	 (0x0000000080000014ull)
#define CVMX_PCIEEP_CFG006 \
	 (0x0000000000000018ull)
#define CVMX_PCIEEP_CFG006_MASK \
	 (0x0000000080000018ull)
#define CVMX_PCIEEP_CFG007 \
	 (0x000000000000001Cull)
#define CVMX_PCIEEP_CFG007_MASK \
	 (0x000000008000001Cull)
#define CVMX_PCIEEP_CFG008 \
	 (0x0000000000000020ull)
#define CVMX_PCIEEP_CFG008_MASK \
	 (0x0000000080000020ull)
#define CVMX_PCIEEP_CFG009 \
	 (0x0000000000000024ull)
#define CVMX_PCIEEP_CFG009_MASK \
	 (0x0000000080000024ull)
#define CVMX_PCIEEP_CFG010 \
	 (0x0000000000000028ull)
#define CVMX_PCIEEP_CFG011 \
	 (0x000000000000002Cull)
#define CVMX_PCIEEP_CFG012 \
	 (0x0000000000000030ull)
#define CVMX_PCIEEP_CFG012_MASK \
	 (0x0000000080000030ull)
#define CVMX_PCIEEP_CFG013 \
	 (0x0000000000000034ull)
#define CVMX_PCIEEP_CFG015 \
	 (0x000000000000003Cull)
#define CVMX_PCIEEP_CFG016 \
	 (0x0000000000000040ull)
#define CVMX_PCIEEP_CFG017 \
	 (0x0000000000000044ull)
#define CVMX_PCIEEP_CFG020 \
	 (0x0000000000000050ull)
#define CVMX_PCIEEP_CFG021 \
	 (0x0000000000000054ull)
#define CVMX_PCIEEP_CFG022 \
	 (0x0000000000000058ull)
#define CVMX_PCIEEP_CFG023 \
	 (0x000000000000005Cull)
#define CVMX_PCIEEP_CFG028 \
	 (0x0000000000000070ull)
#define CVMX_PCIEEP_CFG029 \
	 (0x0000000000000074ull)
#define CVMX_PCIEEP_CFG030 \
	 (0x0000000000000078ull)
#define CVMX_PCIEEP_CFG031 \
	 (0x000000000000007Cull)
#define CVMX_PCIEEP_CFG032 \
	 (0x0000000000000080ull)
#define CVMX_PCIEEP_CFG033 \
	 (0x0000000000000084ull)
#define CVMX_PCIEEP_CFG034 \
	 (0x0000000000000088ull)
#define CVMX_PCIEEP_CFG037 \
	 (0x0000000000000094ull)
#define CVMX_PCIEEP_CFG038 \
	 (0x0000000000000098ull)
#define CVMX_PCIEEP_CFG039 \
	 (0x000000000000009Cull)
#define CVMX_PCIEEP_CFG040 \
	 (0x00000000000000A0ull)
#define CVMX_PCIEEP_CFG041 \
	 (0x00000000000000A4ull)
#define CVMX_PCIEEP_CFG042 \
	 (0x00000000000000A8ull)
#define CVMX_PCIEEP_CFG064 \
	 (0x0000000000000100ull)
#define CVMX_PCIEEP_CFG065 \
	 (0x0000000000000104ull)
#define CVMX_PCIEEP_CFG066 \
	 (0x0000000000000108ull)
#define CVMX_PCIEEP_CFG067 \
	 (0x000000000000010Cull)
#define CVMX_PCIEEP_CFG068 \
	 (0x0000000000000110ull)
#define CVMX_PCIEEP_CFG069 \
	 (0x0000000000000114ull)
#define CVMX_PCIEEP_CFG070 \
	 (0x0000000000000118ull)
#define CVMX_PCIEEP_CFG071 \
	 (0x000000000000011Cull)
#define CVMX_PCIEEP_CFG072 \
	 (0x0000000000000120ull)
#define CVMX_PCIEEP_CFG073 \
	 (0x0000000000000124ull)
#define CVMX_PCIEEP_CFG074 \
	 (0x0000000000000128ull)
#define CVMX_PCIEEP_CFG448 \
	 (0x0000000000000700ull)
#define CVMX_PCIEEP_CFG449 \
	 (0x0000000000000704ull)
#define CVMX_PCIEEP_CFG450 \
	 (0x0000000000000708ull)
#define CVMX_PCIEEP_CFG451 \
	 (0x000000000000070Cull)
#define CVMX_PCIEEP_CFG452 \
	 (0x0000000000000710ull)
#define CVMX_PCIEEP_CFG453 \
	 (0x0000000000000714ull)
#define CVMX_PCIEEP_CFG454 \
	 (0x0000000000000718ull)
#define CVMX_PCIEEP_CFG455 \
	 (0x000000000000071Cull)
#define CVMX_PCIEEP_CFG456 \
	 (0x0000000000000720ull)
#define CVMX_PCIEEP_CFG458 \
	 (0x0000000000000728ull)
#define CVMX_PCIEEP_CFG459 \
	 (0x000000000000072Cull)
#define CVMX_PCIEEP_CFG460 \
	 (0x0000000000000730ull)
#define CVMX_PCIEEP_CFG461 \
	 (0x0000000000000734ull)
#define CVMX_PCIEEP_CFG462 \
	 (0x0000000000000738ull)
#define CVMX_PCIEEP_CFG463 \
	 (0x000000000000073Cull)
#define CVMX_PCIEEP_CFG464 \
	 (0x0000000000000740ull)
#define CVMX_PCIEEP_CFG465 \
	 (0x0000000000000744ull)
#define CVMX_PCIEEP_CFG466 \
	 (0x0000000000000748ull)
#define CVMX_PCIEEP_CFG467 \
	 (0x000000000000074Cull)
#define CVMX_PCIEEP_CFG468 \
	 (0x0000000000000750ull)
#define CVMX_PCIEEP_CFG490 \
	 (0x00000000000007A8ull)
#define CVMX_PCIEEP_CFG491 \
	 (0x00000000000007ACull)
#define CVMX_PCIEEP_CFG492 \
	 (0x00000000000007B0ull)
#define CVMX_PCIEEP_CFG516 \
	 (0x0000000000000810ull)
#define CVMX_PCIEEP_CFG517 \
	 (0x0000000000000814ull)

union cvmx_pcieep_cfg000 {
	uint32_t u32;
	struct cvmx_pcieep_cfg000_s {
		uint32_t devid:16;
		uint32_t vendid:16;
	} s;
	struct cvmx_pcieep_cfg000_s cn52xx;
	struct cvmx_pcieep_cfg000_s cn52xxp1;
	struct cvmx_pcieep_cfg000_s cn56xx;
	struct cvmx_pcieep_cfg000_s cn56xxp1;
};

union cvmx_pcieep_cfg001 {
	uint32_t u32;
	struct cvmx_pcieep_cfg001_s {
		uint32_t dpe:1;
		uint32_t sse:1;
		uint32_t rma:1;
		uint32_t rta:1;
		uint32_t sta:1;
		uint32_t devt:2;
		uint32_t mdpe:1;
		uint32_t fbb:1;
		uint32_t reserved_22_22:1;
		uint32_t m66:1;
		uint32_t cl:1;
		uint32_t i_stat:1;
		uint32_t reserved_11_18:8;
		uint32_t i_dis:1;
		uint32_t fbbe:1;
		uint32_t see:1;
		uint32_t ids_wcc:1;
		uint32_t per:1;
		uint32_t vps:1;
		uint32_t mwice:1;
		uint32_t scse:1;
		uint32_t me:1;
		uint32_t msae:1;
		uint32_t isae:1;
	} s;
	struct cvmx_pcieep_cfg001_s cn52xx;
	struct cvmx_pcieep_cfg001_s cn52xxp1;
	struct cvmx_pcieep_cfg001_s cn56xx;
	struct cvmx_pcieep_cfg001_s cn56xxp1;
};

union cvmx_pcieep_cfg002 {
	uint32_t u32;
	struct cvmx_pcieep_cfg002_s {
		uint32_t bcc:8;
		uint32_t sc:8;
		uint32_t pi:8;
		uint32_t rid:8;
	} s;
	struct cvmx_pcieep_cfg002_s cn52xx;
	struct cvmx_pcieep_cfg002_s cn52xxp1;
	struct cvmx_pcieep_cfg002_s cn56xx;
	struct cvmx_pcieep_cfg002_s cn56xxp1;
};

union cvmx_pcieep_cfg003 {
	uint32_t u32;
	struct cvmx_pcieep_cfg003_s {
		uint32_t bist:8;
		uint32_t mfd:1;
		uint32_t chf:7;
		uint32_t lt:8;
		uint32_t cls:8;
	} s;
	struct cvmx_pcieep_cfg003_s cn52xx;
	struct cvmx_pcieep_cfg003_s cn52xxp1;
	struct cvmx_pcieep_cfg003_s cn56xx;
	struct cvmx_pcieep_cfg003_s cn56xxp1;
};

union cvmx_pcieep_cfg004 {
	uint32_t u32;
	struct cvmx_pcieep_cfg004_s {
		uint32_t lbab:18;
		uint32_t reserved_4_13:10;
		uint32_t pf:1;
		uint32_t typ:2;
		uint32_t mspc:1;
	} s;
	struct cvmx_pcieep_cfg004_s cn52xx;
	struct cvmx_pcieep_cfg004_s cn52xxp1;
	struct cvmx_pcieep_cfg004_s cn56xx;
	struct cvmx_pcieep_cfg004_s cn56xxp1;
};

union cvmx_pcieep_cfg004_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg004_mask_s {
		uint32_t lmask:31;
		uint32_t enb:1;
	} s;
	struct cvmx_pcieep_cfg004_mask_s cn52xx;
	struct cvmx_pcieep_cfg004_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg004_mask_s cn56xx;
	struct cvmx_pcieep_cfg004_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg005 {
	uint32_t u32;
	struct cvmx_pcieep_cfg005_s {
		uint32_t ubab:32;
	} s;
	struct cvmx_pcieep_cfg005_s cn52xx;
	struct cvmx_pcieep_cfg005_s cn52xxp1;
	struct cvmx_pcieep_cfg005_s cn56xx;
	struct cvmx_pcieep_cfg005_s cn56xxp1;
};

union cvmx_pcieep_cfg005_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg005_mask_s {
		uint32_t umask:32;
	} s;
	struct cvmx_pcieep_cfg005_mask_s cn52xx;
	struct cvmx_pcieep_cfg005_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg005_mask_s cn56xx;
	struct cvmx_pcieep_cfg005_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg006 {
	uint32_t u32;
	struct cvmx_pcieep_cfg006_s {
		uint32_t lbab:6;
		uint32_t reserved_4_25:22;
		uint32_t pf:1;
		uint32_t typ:2;
		uint32_t mspc:1;
	} s;
	struct cvmx_pcieep_cfg006_s cn52xx;
	struct cvmx_pcieep_cfg006_s cn52xxp1;
	struct cvmx_pcieep_cfg006_s cn56xx;
	struct cvmx_pcieep_cfg006_s cn56xxp1;
};

union cvmx_pcieep_cfg006_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg006_mask_s {
		uint32_t lmask:31;
		uint32_t enb:1;
	} s;
	struct cvmx_pcieep_cfg006_mask_s cn52xx;
	struct cvmx_pcieep_cfg006_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg006_mask_s cn56xx;
	struct cvmx_pcieep_cfg006_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg007 {
	uint32_t u32;
	struct cvmx_pcieep_cfg007_s {
		uint32_t ubab:32;
	} s;
	struct cvmx_pcieep_cfg007_s cn52xx;
	struct cvmx_pcieep_cfg007_s cn52xxp1;
	struct cvmx_pcieep_cfg007_s cn56xx;
	struct cvmx_pcieep_cfg007_s cn56xxp1;
};

union cvmx_pcieep_cfg007_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg007_mask_s {
		uint32_t umask:32;
	} s;
	struct cvmx_pcieep_cfg007_mask_s cn52xx;
	struct cvmx_pcieep_cfg007_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg007_mask_s cn56xx;
	struct cvmx_pcieep_cfg007_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg008 {
	uint32_t u32;
	struct cvmx_pcieep_cfg008_s {
		uint32_t reserved_4_31:28;
		uint32_t pf:1;
		uint32_t typ:2;
		uint32_t mspc:1;
	} s;
	struct cvmx_pcieep_cfg008_s cn52xx;
	struct cvmx_pcieep_cfg008_s cn52xxp1;
	struct cvmx_pcieep_cfg008_s cn56xx;
	struct cvmx_pcieep_cfg008_s cn56xxp1;
};

union cvmx_pcieep_cfg008_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg008_mask_s {
		uint32_t lmask:31;
		uint32_t enb:1;
	} s;
	struct cvmx_pcieep_cfg008_mask_s cn52xx;
	struct cvmx_pcieep_cfg008_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg008_mask_s cn56xx;
	struct cvmx_pcieep_cfg008_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg009 {
	uint32_t u32;
	struct cvmx_pcieep_cfg009_s {
		uint32_t ubab:25;
		uint32_t reserved_0_6:7;
	} s;
	struct cvmx_pcieep_cfg009_s cn52xx;
	struct cvmx_pcieep_cfg009_s cn52xxp1;
	struct cvmx_pcieep_cfg009_s cn56xx;
	struct cvmx_pcieep_cfg009_s cn56xxp1;
};

union cvmx_pcieep_cfg009_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg009_mask_s {
		uint32_t umask:32;
	} s;
	struct cvmx_pcieep_cfg009_mask_s cn52xx;
	struct cvmx_pcieep_cfg009_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg009_mask_s cn56xx;
	struct cvmx_pcieep_cfg009_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg010 {
	uint32_t u32;
	struct cvmx_pcieep_cfg010_s {
		uint32_t cisp:32;
	} s;
	struct cvmx_pcieep_cfg010_s cn52xx;
	struct cvmx_pcieep_cfg010_s cn52xxp1;
	struct cvmx_pcieep_cfg010_s cn56xx;
	struct cvmx_pcieep_cfg010_s cn56xxp1;
};

union cvmx_pcieep_cfg011 {
	uint32_t u32;
	struct cvmx_pcieep_cfg011_s {
		uint32_t ssid:16;
		uint32_t ssvid:16;
	} s;
	struct cvmx_pcieep_cfg011_s cn52xx;
	struct cvmx_pcieep_cfg011_s cn52xxp1;
	struct cvmx_pcieep_cfg011_s cn56xx;
	struct cvmx_pcieep_cfg011_s cn56xxp1;
};

union cvmx_pcieep_cfg012 {
	uint32_t u32;
	struct cvmx_pcieep_cfg012_s {
		uint32_t eraddr:16;
		uint32_t reserved_1_15:15;
		uint32_t er_en:1;
	} s;
	struct cvmx_pcieep_cfg012_s cn52xx;
	struct cvmx_pcieep_cfg012_s cn52xxp1;
	struct cvmx_pcieep_cfg012_s cn56xx;
	struct cvmx_pcieep_cfg012_s cn56xxp1;
};

union cvmx_pcieep_cfg012_mask {
	uint32_t u32;
	struct cvmx_pcieep_cfg012_mask_s {
		uint32_t mask:31;
		uint32_t enb:1;
	} s;
	struct cvmx_pcieep_cfg012_mask_s cn52xx;
	struct cvmx_pcieep_cfg012_mask_s cn52xxp1;
	struct cvmx_pcieep_cfg012_mask_s cn56xx;
	struct cvmx_pcieep_cfg012_mask_s cn56xxp1;
};

union cvmx_pcieep_cfg013 {
	uint32_t u32;
	struct cvmx_pcieep_cfg013_s {
		uint32_t reserved_8_31:24;
		uint32_t cp:8;
	} s;
	struct cvmx_pcieep_cfg013_s cn52xx;
	struct cvmx_pcieep_cfg013_s cn52xxp1;
	struct cvmx_pcieep_cfg013_s cn56xx;
	struct cvmx_pcieep_cfg013_s cn56xxp1;
};

union cvmx_pcieep_cfg015 {
	uint32_t u32;
	struct cvmx_pcieep_cfg015_s {
		uint32_t ml:8;
		uint32_t mg:8;
		uint32_t inta:8;
		uint32_t il:8;
	} s;
	struct cvmx_pcieep_cfg015_s cn52xx;
	struct cvmx_pcieep_cfg015_s cn52xxp1;
	struct cvmx_pcieep_cfg015_s cn56xx;
	struct cvmx_pcieep_cfg015_s cn56xxp1;
};

union cvmx_pcieep_cfg016 {
	uint32_t u32;
	struct cvmx_pcieep_cfg016_s {
		uint32_t pmes:5;
		uint32_t d2s:1;
		uint32_t d1s:1;
		uint32_t auxc:3;
		uint32_t dsi:1;
		uint32_t reserved_20_20:1;
		uint32_t pme_clock:1;
		uint32_t pmsv:3;
		uint32_t ncp:8;
		uint32_t pmcid:8;
	} s;
	struct cvmx_pcieep_cfg016_s cn52xx;
	struct cvmx_pcieep_cfg016_s cn52xxp1;
	struct cvmx_pcieep_cfg016_s cn56xx;
	struct cvmx_pcieep_cfg016_s cn56xxp1;
};

union cvmx_pcieep_cfg017 {
	uint32_t u32;
	struct cvmx_pcieep_cfg017_s {
		uint32_t pmdia:8;
		uint32_t bpccee:1;
		uint32_t bd3h:1;
		uint32_t reserved_16_21:6;
		uint32_t pmess:1;
		uint32_t pmedsia:2;
		uint32_t pmds:4;
		uint32_t pmeens:1;
		uint32_t reserved_4_7:4;
		uint32_t nsr:1;
		uint32_t reserved_2_2:1;
		uint32_t ps:2;
	} s;
	struct cvmx_pcieep_cfg017_s cn52xx;
	struct cvmx_pcieep_cfg017_s cn52xxp1;
	struct cvmx_pcieep_cfg017_s cn56xx;
	struct cvmx_pcieep_cfg017_s cn56xxp1;
};

union cvmx_pcieep_cfg020 {
	uint32_t u32;
	struct cvmx_pcieep_cfg020_s {
		uint32_t reserved_24_31:8;
		uint32_t m64:1;
		uint32_t mme:3;
		uint32_t mmc:3;
		uint32_t msien:1;
		uint32_t ncp:8;
		uint32_t msicid:8;
	} s;
	struct cvmx_pcieep_cfg020_s cn52xx;
	struct cvmx_pcieep_cfg020_s cn52xxp1;
	struct cvmx_pcieep_cfg020_s cn56xx;
	struct cvmx_pcieep_cfg020_s cn56xxp1;
};

union cvmx_pcieep_cfg021 {
	uint32_t u32;
	struct cvmx_pcieep_cfg021_s {
		uint32_t lmsi:30;
		uint32_t reserved_0_1:2;
	} s;
	struct cvmx_pcieep_cfg021_s cn52xx;
	struct cvmx_pcieep_cfg021_s cn52xxp1;
	struct cvmx_pcieep_cfg021_s cn56xx;
	struct cvmx_pcieep_cfg021_s cn56xxp1;
};

union cvmx_pcieep_cfg022 {
	uint32_t u32;
	struct cvmx_pcieep_cfg022_s {
		uint32_t umsi:32;
	} s;
	struct cvmx_pcieep_cfg022_s cn52xx;
	struct cvmx_pcieep_cfg022_s cn52xxp1;
	struct cvmx_pcieep_cfg022_s cn56xx;
	struct cvmx_pcieep_cfg022_s cn56xxp1;
};

union cvmx_pcieep_cfg023 {
	uint32_t u32;
	struct cvmx_pcieep_cfg023_s {
		uint32_t reserved_16_31:16;
		uint32_t msimd:16;
	} s;
	struct cvmx_pcieep_cfg023_s cn52xx;
	struct cvmx_pcieep_cfg023_s cn52xxp1;
	struct cvmx_pcieep_cfg023_s cn56xx;
	struct cvmx_pcieep_cfg023_s cn56xxp1;
};

union cvmx_pcieep_cfg028 {
	uint32_t u32;
	struct cvmx_pcieep_cfg028_s {
		uint32_t reserved_30_31:2;
		uint32_t imn:5;
		uint32_t si:1;
		uint32_t dpt:4;
		uint32_t pciecv:4;
		uint32_t ncp:8;
		uint32_t pcieid:8;
	} s;
	struct cvmx_pcieep_cfg028_s cn52xx;
	struct cvmx_pcieep_cfg028_s cn52xxp1;
	struct cvmx_pcieep_cfg028_s cn56xx;
	struct cvmx_pcieep_cfg028_s cn56xxp1;
};

union cvmx_pcieep_cfg029 {
	uint32_t u32;
	struct cvmx_pcieep_cfg029_s {
		uint32_t reserved_28_31:4;
		uint32_t cspls:2;
		uint32_t csplv:8;
		uint32_t reserved_16_17:2;
		uint32_t rber:1;
		uint32_t reserved_12_14:3;
		uint32_t el1al:3;
		uint32_t el0al:3;
		uint32_t etfs:1;
		uint32_t pfs:2;
		uint32_t mpss:3;
	} s;
	struct cvmx_pcieep_cfg029_s cn52xx;
	struct cvmx_pcieep_cfg029_s cn52xxp1;
	struct cvmx_pcieep_cfg029_s cn56xx;
	struct cvmx_pcieep_cfg029_s cn56xxp1;
};

union cvmx_pcieep_cfg030 {
	uint32_t u32;
	struct cvmx_pcieep_cfg030_s {
		uint32_t reserved_22_31:10;
		uint32_t tp:1;
		uint32_t ap_d:1;
		uint32_t ur_d:1;
		uint32_t fe_d:1;
		uint32_t nfe_d:1;
		uint32_t ce_d:1;
		uint32_t reserved_15_15:1;
		uint32_t mrrs:3;
		uint32_t ns_en:1;
		uint32_t ap_en:1;
		uint32_t pf_en:1;
		uint32_t etf_en:1;
		uint32_t mps:3;
		uint32_t ro_en:1;
		uint32_t ur_en:1;
		uint32_t fe_en:1;
		uint32_t nfe_en:1;
		uint32_t ce_en:1;
	} s;
	struct cvmx_pcieep_cfg030_s cn52xx;
	struct cvmx_pcieep_cfg030_s cn52xxp1;
	struct cvmx_pcieep_cfg030_s cn56xx;
	struct cvmx_pcieep_cfg030_s cn56xxp1;
};

union cvmx_pcieep_cfg031 {
	uint32_t u32;
	struct cvmx_pcieep_cfg031_s {
		uint32_t pnum:8;
		uint32_t reserved_22_23:2;
		uint32_t lbnc:1;
		uint32_t dllarc:1;
		uint32_t sderc:1;
		uint32_t cpm:1;
		uint32_t l1el:3;
		uint32_t l0el:3;
		uint32_t aslpms:2;
		uint32_t mlw:6;
		uint32_t mls:4;
	} s;
	struct cvmx_pcieep_cfg031_s cn52xx;
	struct cvmx_pcieep_cfg031_s cn52xxp1;
	struct cvmx_pcieep_cfg031_s cn56xx;
	struct cvmx_pcieep_cfg031_s cn56xxp1;
};

union cvmx_pcieep_cfg032 {
	uint32_t u32;
	struct cvmx_pcieep_cfg032_s {
		uint32_t reserved_30_31:2;
		uint32_t dlla:1;
		uint32_t scc:1;
		uint32_t lt:1;
		uint32_t reserved_26_26:1;
		uint32_t nlw:6;
		uint32_t ls:4;
		uint32_t reserved_10_15:6;
		uint32_t hawd:1;
		uint32_t ecpm:1;
		uint32_t es:1;
		uint32_t ccc:1;
		uint32_t rl:1;
		uint32_t ld:1;
		uint32_t rcb:1;
		uint32_t reserved_2_2:1;
		uint32_t aslpc:2;
	} s;
	struct cvmx_pcieep_cfg032_s cn52xx;
	struct cvmx_pcieep_cfg032_s cn52xxp1;
	struct cvmx_pcieep_cfg032_s cn56xx;
	struct cvmx_pcieep_cfg032_s cn56xxp1;
};

union cvmx_pcieep_cfg033 {
	uint32_t u32;
	struct cvmx_pcieep_cfg033_s {
		uint32_t ps_num:13;
		uint32_t nccs:1;
		uint32_t emip:1;
		uint32_t sp_ls:2;
		uint32_t sp_lv:8;
		uint32_t hp_c:1;
		uint32_t hp_s:1;
		uint32_t pip:1;
		uint32_t aip:1;
		uint32_t mrlsp:1;
		uint32_t pcp:1;
		uint32_t abp:1;
	} s;
	struct cvmx_pcieep_cfg033_s cn52xx;
	struct cvmx_pcieep_cfg033_s cn52xxp1;
	struct cvmx_pcieep_cfg033_s cn56xx;
	struct cvmx_pcieep_cfg033_s cn56xxp1;
};

union cvmx_pcieep_cfg034 {
	uint32_t u32;
	struct cvmx_pcieep_cfg034_s {
		uint32_t reserved_25_31:7;
		uint32_t dlls_c:1;
		uint32_t emis:1;
		uint32_t pds:1;
		uint32_t mrlss:1;
		uint32_t ccint_d:1;
		uint32_t pd_c:1;
		uint32_t mrls_c:1;
		uint32_t pf_d:1;
		uint32_t abp_d:1;
		uint32_t reserved_13_15:3;
		uint32_t dlls_en:1;
		uint32_t emic:1;
		uint32_t pcc:1;
		uint32_t pic:2;
		uint32_t aic:2;
		uint32_t hpint_en:1;
		uint32_t ccint_en:1;
		uint32_t pd_en:1;
		uint32_t mrls_en:1;
		uint32_t pf_en:1;
		uint32_t abp_en:1;
	} s;
	struct cvmx_pcieep_cfg034_s cn52xx;
	struct cvmx_pcieep_cfg034_s cn52xxp1;
	struct cvmx_pcieep_cfg034_s cn56xx;
	struct cvmx_pcieep_cfg034_s cn56xxp1;
};

union cvmx_pcieep_cfg037 {
	uint32_t u32;
	struct cvmx_pcieep_cfg037_s {
		uint32_t reserved_5_31:27;
		uint32_t ctds:1;
		uint32_t ctrs:4;
	} s;
	struct cvmx_pcieep_cfg037_s cn52xx;
	struct cvmx_pcieep_cfg037_s cn52xxp1;
	struct cvmx_pcieep_cfg037_s cn56xx;
	struct cvmx_pcieep_cfg037_s cn56xxp1;
};

union cvmx_pcieep_cfg038 {
	uint32_t u32;
	struct cvmx_pcieep_cfg038_s {
		uint32_t reserved_5_31:27;
		uint32_t ctd:1;
		uint32_t ctv:4;
	} s;
	struct cvmx_pcieep_cfg038_s cn52xx;
	struct cvmx_pcieep_cfg038_s cn52xxp1;
	struct cvmx_pcieep_cfg038_s cn56xx;
	struct cvmx_pcieep_cfg038_s cn56xxp1;
};

union cvmx_pcieep_cfg039 {
	uint32_t u32;
	struct cvmx_pcieep_cfg039_s {
		uint32_t reserved_0_31:32;
	} s;
	struct cvmx_pcieep_cfg039_s cn52xx;
	struct cvmx_pcieep_cfg039_s cn52xxp1;
	struct cvmx_pcieep_cfg039_s cn56xx;
	struct cvmx_pcieep_cfg039_s cn56xxp1;
};

union cvmx_pcieep_cfg040 {
	uint32_t u32;
	struct cvmx_pcieep_cfg040_s {
		uint32_t reserved_0_31:32;
	} s;
	struct cvmx_pcieep_cfg040_s cn52xx;
	struct cvmx_pcieep_cfg040_s cn52xxp1;
	struct cvmx_pcieep_cfg040_s cn56xx;
	struct cvmx_pcieep_cfg040_s cn56xxp1;
};

union cvmx_pcieep_cfg041 {
	uint32_t u32;
	struct cvmx_pcieep_cfg041_s {
		uint32_t reserved_0_31:32;
	} s;
	struct cvmx_pcieep_cfg041_s cn52xx;
	struct cvmx_pcieep_cfg041_s cn52xxp1;
	struct cvmx_pcieep_cfg041_s cn56xx;
	struct cvmx_pcieep_cfg041_s cn56xxp1;
};

union cvmx_pcieep_cfg042 {
	uint32_t u32;
	struct cvmx_pcieep_cfg042_s {
		uint32_t reserved_0_31:32;
	} s;
	struct cvmx_pcieep_cfg042_s cn52xx;
	struct cvmx_pcieep_cfg042_s cn52xxp1;
	struct cvmx_pcieep_cfg042_s cn56xx;
	struct cvmx_pcieep_cfg042_s cn56xxp1;
};

union cvmx_pcieep_cfg064 {
	uint32_t u32;
	struct cvmx_pcieep_cfg064_s {
		uint32_t nco:12;
		uint32_t cv:4;
		uint32_t pcieec:16;
	} s;
	struct cvmx_pcieep_cfg064_s cn52xx;
	struct cvmx_pcieep_cfg064_s cn52xxp1;
	struct cvmx_pcieep_cfg064_s cn56xx;
	struct cvmx_pcieep_cfg064_s cn56xxp1;
};

union cvmx_pcieep_cfg065 {
	uint32_t u32;
	struct cvmx_pcieep_cfg065_s {
		uint32_t reserved_21_31:11;
		uint32_t ures:1;
		uint32_t ecrces:1;
		uint32_t mtlps:1;
		uint32_t ros:1;
		uint32_t ucs:1;
		uint32_t cas:1;
		uint32_t cts:1;
		uint32_t fcpes:1;
		uint32_t ptlps:1;
		uint32_t reserved_6_11:6;
		uint32_t sdes:1;
		uint32_t dlpes:1;
		uint32_t reserved_0_3:4;
	} s;
	struct cvmx_pcieep_cfg065_s cn52xx;
	struct cvmx_pcieep_cfg065_s cn52xxp1;
	struct cvmx_pcieep_cfg065_s cn56xx;
	struct cvmx_pcieep_cfg065_s cn56xxp1;
};

union cvmx_pcieep_cfg066 {
	uint32_t u32;
	struct cvmx_pcieep_cfg066_s {
		uint32_t reserved_21_31:11;
		uint32_t urem:1;
		uint32_t ecrcem:1;
		uint32_t mtlpm:1;
		uint32_t rom:1;
		uint32_t ucm:1;
		uint32_t cam:1;
		uint32_t ctm:1;
		uint32_t fcpem:1;
		uint32_t ptlpm:1;
		uint32_t reserved_6_11:6;
		uint32_t sdem:1;
		uint32_t dlpem:1;
		uint32_t reserved_0_3:4;
	} s;
	struct cvmx_pcieep_cfg066_s cn52xx;
	struct cvmx_pcieep_cfg066_s cn52xxp1;
	struct cvmx_pcieep_cfg066_s cn56xx;
	struct cvmx_pcieep_cfg066_s cn56xxp1;
};

union cvmx_pcieep_cfg067 {
	uint32_t u32;
	struct cvmx_pcieep_cfg067_s {
		uint32_t reserved_21_31:11;
		uint32_t ures:1;
		uint32_t ecrces:1;
		uint32_t mtlps:1;
		uint32_t ros:1;
		uint32_t ucs:1;
		uint32_t cas:1;
		uint32_t cts:1;
		uint32_t fcpes:1;
		uint32_t ptlps:1;
		uint32_t reserved_6_11:6;
		uint32_t sdes:1;
		uint32_t dlpes:1;
		uint32_t reserved_0_3:4;
	} s;
	struct cvmx_pcieep_cfg067_s cn52xx;
	struct cvmx_pcieep_cfg067_s cn52xxp1;
	struct cvmx_pcieep_cfg067_s cn56xx;
	struct cvmx_pcieep_cfg067_s cn56xxp1;
};

union cvmx_pcieep_cfg068 {
	uint32_t u32;
	struct cvmx_pcieep_cfg068_s {
		uint32_t reserved_14_31:18;
		uint32_t anfes:1;
		uint32_t rtts:1;
		uint32_t reserved_9_11:3;
		uint32_t rnrs:1;
		uint32_t bdllps:1;
		uint32_t btlps:1;
		uint32_t reserved_1_5:5;
		uint32_t res:1;
	} s;
	struct cvmx_pcieep_cfg068_s cn52xx;
	struct cvmx_pcieep_cfg068_s cn52xxp1;
	struct cvmx_pcieep_cfg068_s cn56xx;
	struct cvmx_pcieep_cfg068_s cn56xxp1;
};

union cvmx_pcieep_cfg069 {
	uint32_t u32;
	struct cvmx_pcieep_cfg069_s {
		uint32_t reserved_14_31:18;
		uint32_t anfem:1;
		uint32_t rttm:1;
		uint32_t reserved_9_11:3;
		uint32_t rnrm:1;
		uint32_t bdllpm:1;
		uint32_t btlpm:1;
		uint32_t reserved_1_5:5;
		uint32_t rem:1;
	} s;
	struct cvmx_pcieep_cfg069_s cn52xx;
	struct cvmx_pcieep_cfg069_s cn52xxp1;
	struct cvmx_pcieep_cfg069_s cn56xx;
	struct cvmx_pcieep_cfg069_s cn56xxp1;
};

union cvmx_pcieep_cfg070 {
	uint32_t u32;
	struct cvmx_pcieep_cfg070_s {
		uint32_t reserved_9_31:23;
		uint32_t ce:1;
		uint32_t cc:1;
		uint32_t ge:1;
		uint32_t gc:1;
		uint32_t fep:5;
	} s;
	struct cvmx_pcieep_cfg070_s cn52xx;
	struct cvmx_pcieep_cfg070_s cn52xxp1;
	struct cvmx_pcieep_cfg070_s cn56xx;
	struct cvmx_pcieep_cfg070_s cn56xxp1;
};

union cvmx_pcieep_cfg071 {
	uint32_t u32;
	struct cvmx_pcieep_cfg071_s {
		uint32_t dword1:32;
	} s;
	struct cvmx_pcieep_cfg071_s cn52xx;
	struct cvmx_pcieep_cfg071_s cn52xxp1;
	struct cvmx_pcieep_cfg071_s cn56xx;
	struct cvmx_pcieep_cfg071_s cn56xxp1;
};

union cvmx_pcieep_cfg072 {
	uint32_t u32;
	struct cvmx_pcieep_cfg072_s {
		uint32_t dword2:32;
	} s;
	struct cvmx_pcieep_cfg072_s cn52xx;
	struct cvmx_pcieep_cfg072_s cn52xxp1;
	struct cvmx_pcieep_cfg072_s cn56xx;
	struct cvmx_pcieep_cfg072_s cn56xxp1;
};

union cvmx_pcieep_cfg073 {
	uint32_t u32;
	struct cvmx_pcieep_cfg073_s {
		uint32_t dword3:32;
	} s;
	struct cvmx_pcieep_cfg073_s cn52xx;
	struct cvmx_pcieep_cfg073_s cn52xxp1;
	struct cvmx_pcieep_cfg073_s cn56xx;
	struct cvmx_pcieep_cfg073_s cn56xxp1;
};

union cvmx_pcieep_cfg074 {
	uint32_t u32;
	struct cvmx_pcieep_cfg074_s {
		uint32_t dword4:32;
	} s;
	struct cvmx_pcieep_cfg074_s cn52xx;
	struct cvmx_pcieep_cfg074_s cn52xxp1;
	struct cvmx_pcieep_cfg074_s cn56xx;
	struct cvmx_pcieep_cfg074_s cn56xxp1;
};

union cvmx_pcieep_cfg448 {
	uint32_t u32;
	struct cvmx_pcieep_cfg448_s {
		uint32_t rtl:16;
		uint32_t rtltl:16;
	} s;
	struct cvmx_pcieep_cfg448_s cn52xx;
	struct cvmx_pcieep_cfg448_s cn52xxp1;
	struct cvmx_pcieep_cfg448_s cn56xx;
	struct cvmx_pcieep_cfg448_s cn56xxp1;
};

union cvmx_pcieep_cfg449 {
	uint32_t u32;
	struct cvmx_pcieep_cfg449_s {
		uint32_t omr:32;
	} s;
	struct cvmx_pcieep_cfg449_s cn52xx;
	struct cvmx_pcieep_cfg449_s cn52xxp1;
	struct cvmx_pcieep_cfg449_s cn56xx;
	struct cvmx_pcieep_cfg449_s cn56xxp1;
};

union cvmx_pcieep_cfg450 {
	uint32_t u32;
	struct cvmx_pcieep_cfg450_s {
		uint32_t lpec:8;
		uint32_t reserved_22_23:2;
		uint32_t link_state:6;
		uint32_t force_link:1;
		uint32_t reserved_8_14:7;
		uint32_t link_num:8;
	} s;
	struct cvmx_pcieep_cfg450_s cn52xx;
	struct cvmx_pcieep_cfg450_s cn52xxp1;
	struct cvmx_pcieep_cfg450_s cn56xx;
	struct cvmx_pcieep_cfg450_s cn56xxp1;
};

union cvmx_pcieep_cfg451 {
	uint32_t u32;
	struct cvmx_pcieep_cfg451_s {
		uint32_t reserved_30_31:2;
		uint32_t l1el:3;
		uint32_t l0el:3;
		uint32_t n_fts_cc:8;
		uint32_t n_fts:8;
		uint32_t ack_freq:8;
	} s;
	struct cvmx_pcieep_cfg451_s cn52xx;
	struct cvmx_pcieep_cfg451_s cn52xxp1;
	struct cvmx_pcieep_cfg451_s cn56xx;
	struct cvmx_pcieep_cfg451_s cn56xxp1;
};

union cvmx_pcieep_cfg452 {
	uint32_t u32;
	struct cvmx_pcieep_cfg452_s {
		uint32_t reserved_26_31:6;
		uint32_t eccrc:1;
		uint32_t reserved_22_24:3;
		uint32_t lme:6;
		uint32_t reserved_8_15:8;
		uint32_t flm:1;
		uint32_t reserved_6_6:1;
		uint32_t dllle:1;
		uint32_t reserved_4_4:1;
		uint32_t ra:1;
		uint32_t le:1;
		uint32_t sd:1;
		uint32_t omr:1;
	} s;
	struct cvmx_pcieep_cfg452_s cn52xx;
	struct cvmx_pcieep_cfg452_s cn52xxp1;
	struct cvmx_pcieep_cfg452_s cn56xx;
	struct cvmx_pcieep_cfg452_s cn56xxp1;
};

union cvmx_pcieep_cfg453 {
	uint32_t u32;
	struct cvmx_pcieep_cfg453_s {
		uint32_t dlld:1;
		uint32_t reserved_26_30:5;
		uint32_t ack_nak:1;
		uint32_t fcd:1;
		uint32_t ilst:24;
	} s;
	struct cvmx_pcieep_cfg453_s cn52xx;
	struct cvmx_pcieep_cfg453_s cn52xxp1;
	struct cvmx_pcieep_cfg453_s cn56xx;
	struct cvmx_pcieep_cfg453_s cn56xxp1;
};

union cvmx_pcieep_cfg454 {
	uint32_t u32;
	struct cvmx_pcieep_cfg454_s {
		uint32_t reserved_29_31:3;
		uint32_t tmfcwt:5;
		uint32_t tmanlt:5;
		uint32_t tmrt:5;
		uint32_t reserved_11_13:3;
		uint32_t nskps:3;
		uint32_t reserved_4_7:4;
		uint32_t ntss:4;
	} s;
	struct cvmx_pcieep_cfg454_s cn52xx;
	struct cvmx_pcieep_cfg454_s cn52xxp1;
	struct cvmx_pcieep_cfg454_s cn56xx;
	struct cvmx_pcieep_cfg454_s cn56xxp1;
};

union cvmx_pcieep_cfg455 {
	uint32_t u32;
	struct cvmx_pcieep_cfg455_s {
		uint32_t m_cfg0_filt:1;
		uint32_t m_io_filt:1;
		uint32_t msg_ctrl:1;
		uint32_t m_cpl_ecrc_filt:1;
		uint32_t m_ecrc_filt:1;
		uint32_t m_cpl_len_err:1;
		uint32_t m_cpl_attr_err:1;
		uint32_t m_cpl_tc_err:1;
		uint32_t m_cpl_fun_err:1;
		uint32_t m_cpl_rid_err:1;
		uint32_t m_cpl_tag_err:1;
		uint32_t m_lk_filt:1;
		uint32_t m_cfg1_filt:1;
		uint32_t m_bar_match:1;
		uint32_t m_pois_filt:1;
		uint32_t m_fun:1;
		uint32_t dfcwt:1;
		uint32_t reserved_11_14:4;
		uint32_t skpiv:11;
	} s;
	struct cvmx_pcieep_cfg455_s cn52xx;
	struct cvmx_pcieep_cfg455_s cn52xxp1;
	struct cvmx_pcieep_cfg455_s cn56xx;
	struct cvmx_pcieep_cfg455_s cn56xxp1;
};

union cvmx_pcieep_cfg456 {
	uint32_t u32;
	struct cvmx_pcieep_cfg456_s {
		uint32_t reserved_2_31:30;
		uint32_t m_vend1_drp:1;
		uint32_t m_vend0_drp:1;
	} s;
	struct cvmx_pcieep_cfg456_s cn52xx;
	struct cvmx_pcieep_cfg456_s cn52xxp1;
	struct cvmx_pcieep_cfg456_s cn56xx;
	struct cvmx_pcieep_cfg456_s cn56xxp1;
};

union cvmx_pcieep_cfg458 {
	uint32_t u32;
	struct cvmx_pcieep_cfg458_s {
		uint32_t dbg_info_l32:32;
	} s;
	struct cvmx_pcieep_cfg458_s cn52xx;
	struct cvmx_pcieep_cfg458_s cn52xxp1;
	struct cvmx_pcieep_cfg458_s cn56xx;
	struct cvmx_pcieep_cfg458_s cn56xxp1;
};

union cvmx_pcieep_cfg459 {
	uint32_t u32;
	struct cvmx_pcieep_cfg459_s {
		uint32_t dbg_info_u32:32;
	} s;
	struct cvmx_pcieep_cfg459_s cn52xx;
	struct cvmx_pcieep_cfg459_s cn52xxp1;
	struct cvmx_pcieep_cfg459_s cn56xx;
	struct cvmx_pcieep_cfg459_s cn56xxp1;
};

union cvmx_pcieep_cfg460 {
	uint32_t u32;
	struct cvmx_pcieep_cfg460_s {
		uint32_t reserved_20_31:12;
		uint32_t tphfcc:8;
		uint32_t tpdfcc:12;
	} s;
	struct cvmx_pcieep_cfg460_s cn52xx;
	struct cvmx_pcieep_cfg460_s cn52xxp1;
	struct cvmx_pcieep_cfg460_s cn56xx;
	struct cvmx_pcieep_cfg460_s cn56xxp1;
};

union cvmx_pcieep_cfg461 {
	uint32_t u32;
	struct cvmx_pcieep_cfg461_s {
		uint32_t reserved_20_31:12;
		uint32_t tchfcc:8;
		uint32_t tcdfcc:12;
	} s;
	struct cvmx_pcieep_cfg461_s cn52xx;
	struct cvmx_pcieep_cfg461_s cn52xxp1;
	struct cvmx_pcieep_cfg461_s cn56xx;
	struct cvmx_pcieep_cfg461_s cn56xxp1;
};

union cvmx_pcieep_cfg462 {
	uint32_t u32;
	struct cvmx_pcieep_cfg462_s {
		uint32_t reserved_20_31:12;
		uint32_t tchfcc:8;
		uint32_t tcdfcc:12;
	} s;
	struct cvmx_pcieep_cfg462_s cn52xx;
	struct cvmx_pcieep_cfg462_s cn52xxp1;
	struct cvmx_pcieep_cfg462_s cn56xx;
	struct cvmx_pcieep_cfg462_s cn56xxp1;
};

union cvmx_pcieep_cfg463 {
	uint32_t u32;
	struct cvmx_pcieep_cfg463_s {
		uint32_t reserved_3_31:29;
		uint32_t rqne:1;
		uint32_t trbne:1;
		uint32_t rtlpfccnr:1;
	} s;
	struct cvmx_pcieep_cfg463_s cn52xx;
	struct cvmx_pcieep_cfg463_s cn52xxp1;
	struct cvmx_pcieep_cfg463_s cn56xx;
	struct cvmx_pcieep_cfg463_s cn56xxp1;
};

union cvmx_pcieep_cfg464 {
	uint32_t u32;
	struct cvmx_pcieep_cfg464_s {
		uint32_t wrr_vc3:8;
		uint32_t wrr_vc2:8;
		uint32_t wrr_vc1:8;
		uint32_t wrr_vc0:8;
	} s;
	struct cvmx_pcieep_cfg464_s cn52xx;
	struct cvmx_pcieep_cfg464_s cn52xxp1;
	struct cvmx_pcieep_cfg464_s cn56xx;
	struct cvmx_pcieep_cfg464_s cn56xxp1;
};

union cvmx_pcieep_cfg465 {
	uint32_t u32;
	struct cvmx_pcieep_cfg465_s {
		uint32_t wrr_vc7:8;
		uint32_t wrr_vc6:8;
		uint32_t wrr_vc5:8;
		uint32_t wrr_vc4:8;
	} s;
	struct cvmx_pcieep_cfg465_s cn52xx;
	struct cvmx_pcieep_cfg465_s cn52xxp1;
	struct cvmx_pcieep_cfg465_s cn56xx;
	struct cvmx_pcieep_cfg465_s cn56xxp1;
};

union cvmx_pcieep_cfg466 {
	uint32_t u32;
	struct cvmx_pcieep_cfg466_s {
		uint32_t rx_queue_order:1;
		uint32_t type_ordering:1;
		uint32_t reserved_24_29:6;
		uint32_t queue_mode:3;
		uint32_t reserved_20_20:1;
		uint32_t header_credits:8;
		uint32_t data_credits:12;
	} s;
	struct cvmx_pcieep_cfg466_s cn52xx;
	struct cvmx_pcieep_cfg466_s cn52xxp1;
	struct cvmx_pcieep_cfg466_s cn56xx;
	struct cvmx_pcieep_cfg466_s cn56xxp1;
};

union cvmx_pcieep_cfg467 {
	uint32_t u32;
	struct cvmx_pcieep_cfg467_s {
		uint32_t reserved_24_31:8;
		uint32_t queue_mode:3;
		uint32_t reserved_20_20:1;
		uint32_t header_credits:8;
		uint32_t data_credits:12;
	} s;
	struct cvmx_pcieep_cfg467_s cn52xx;
	struct cvmx_pcieep_cfg467_s cn52xxp1;
	struct cvmx_pcieep_cfg467_s cn56xx;
	struct cvmx_pcieep_cfg467_s cn56xxp1;
};

union cvmx_pcieep_cfg468 {
	uint32_t u32;
	struct cvmx_pcieep_cfg468_s {
		uint32_t reserved_24_31:8;
		uint32_t queue_mode:3;
		uint32_t reserved_20_20:1;
		uint32_t header_credits:8;
		uint32_t data_credits:12;
	} s;
	struct cvmx_pcieep_cfg468_s cn52xx;
	struct cvmx_pcieep_cfg468_s cn52xxp1;
	struct cvmx_pcieep_cfg468_s cn56xx;
	struct cvmx_pcieep_cfg468_s cn56xxp1;
};

union cvmx_pcieep_cfg490 {
	uint32_t u32;
	struct cvmx_pcieep_cfg490_s {
		uint32_t reserved_26_31:6;
		uint32_t header_depth:10;
		uint32_t reserved_14_15:2;
		uint32_t data_depth:14;
	} s;
	struct cvmx_pcieep_cfg490_s cn52xx;
	struct cvmx_pcieep_cfg490_s cn52xxp1;
	struct cvmx_pcieep_cfg490_s cn56xx;
	struct cvmx_pcieep_cfg490_s cn56xxp1;
};

union cvmx_pcieep_cfg491 {
	uint32_t u32;
	struct cvmx_pcieep_cfg491_s {
		uint32_t reserved_26_31:6;
		uint32_t header_depth:10;
		uint32_t reserved_14_15:2;
		uint32_t data_depth:14;
	} s;
	struct cvmx_pcieep_cfg491_s cn52xx;
	struct cvmx_pcieep_cfg491_s cn52xxp1;
	struct cvmx_pcieep_cfg491_s cn56xx;
	struct cvmx_pcieep_cfg491_s cn56xxp1;
};

union cvmx_pcieep_cfg492 {
	uint32_t u32;
	struct cvmx_pcieep_cfg492_s {
		uint32_t reserved_26_31:6;
		uint32_t header_depth:10;
		uint32_t reserved_14_15:2;
		uint32_t data_depth:14;
	} s;
	struct cvmx_pcieep_cfg492_s cn52xx;
	struct cvmx_pcieep_cfg492_s cn52xxp1;
	struct cvmx_pcieep_cfg492_s cn56xx;
	struct cvmx_pcieep_cfg492_s cn56xxp1;
};

union cvmx_pcieep_cfg516 {
	uint32_t u32;
	struct cvmx_pcieep_cfg516_s {
		uint32_t phy_stat:32;
	} s;
	struct cvmx_pcieep_cfg516_s cn52xx;
	struct cvmx_pcieep_cfg516_s cn52xxp1;
	struct cvmx_pcieep_cfg516_s cn56xx;
	struct cvmx_pcieep_cfg516_s cn56xxp1;
};

union cvmx_pcieep_cfg517 {
	uint32_t u32;
	struct cvmx_pcieep_cfg517_s {
		uint32_t phy_ctrl:32;
	} s;
	struct cvmx_pcieep_cfg517_s cn52xx;
	struct cvmx_pcieep_cfg517_s cn52xxp1;
	struct cvmx_pcieep_cfg517_s cn56xx;
	struct cvmx_pcieep_cfg517_s cn56xxp1;
};

#endif