From 43b5f0d69291374f602ad8e1817f329573a59010 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 7 Sep 2012 10:02:48 +0200 Subject: serial: pl011: delete reset callback Since commit 4fd0690bb0c3955983560bb2767ee82e2b197f9b "serial: pl011: implement workaround for CTS clear event issue" the PL011 UART is no longer at risk to hang up, so get rid of the callback altogether. Cc: Rajanikanth H.V Signed-off-by: Linus Walleij Acked-by: Lee Jones Signed-off-by: Greg Kroah-Hartman --- arch/arm/mach-ux500/board-mop500.c | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'arch/arm/mach-ux500') diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 8674a890fd1c..f216c302beb6 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -524,33 +524,12 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = { }; #endif -#define PRCC_K_SOFTRST_SET 0x18 -#define PRCC_K_SOFTRST_CLEAR 0x1C -static void ux500_uart0_reset(void) -{ - void __iomem *prcc_rst_set, *prcc_rst_clr; - - prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + - PRCC_K_SOFTRST_SET); - prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + - PRCC_K_SOFTRST_CLEAR); - - /* Activate soft reset PRCC_K_SOFTRST_CLEAR */ - writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr); - udelay(1); - - /* Release soft reset PRCC_K_SOFTRST_SET */ - writel((readl(prcc_rst_set) | 0x1), prcc_rst_set); - udelay(1); -} - static struct amba_pl011_data uart0_plat = { #ifdef CONFIG_STE_DMA40 .dma_filter = stedma40_filter, .dma_rx_param = &uart0_dma_cfg_rx, .dma_tx_param = &uart0_dma_cfg_tx, #endif - .reset = ux500_uart0_reset, }; static struct amba_pl011_data uart1_plat = { -- cgit v1.2.3