From a437fc59e8a604667634697a13183dc673559348 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 25 Mar 2015 18:41:31 +0800 Subject: ARM: at91/dt: add drm support for at91sam9n12ek Add drm support for at91sam9n12ek board. Signed-off-by: Bo Shen Signed-off-by: Josh Wu Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91sam9n12.dtsi | 71 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi') diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 345186f91422..32bc9a189db0 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -445,6 +445,34 @@ clock-names = "t0_clk", "slow_clk"; }; + hlcdc: hlcdc@f8038000 { + compatible = "atmel,at91sam9n12-hlcdc"; + reg = <0xf8038000 0x2000>; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clock-names = "periph_clk", "sys_clk", "slow_clk"; + status = "disabled"; + + hlcdc-display-controller { + compatible = "atmel,hlcdc-display-controller"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + }; + + hlcdc_pwm: hlcdc-pwm { + compatible = "atmel,hlcdc-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_pwm>; + #pwm-cells = <3>; + }; + }; + dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; @@ -477,6 +505,49 @@ }; }; + lcd { + pinctrl_lcd_base: lcd-base-0 { + atmel,pins = + ; /* LCDPCK */ + }; + + pinctrl_lcd_pwm: lcd-pwm-0 { + atmel,pins = ; /* LCDPWM */ + }; + + pinctrl_lcd_rgb888: lcd-rgb-3 { + atmel,pins = + ; /* LCDD23 pin */ + }; + }; + usart0 { pinctrl_usart0: usart0-0 { atmel,pins = -- cgit v1.2.3