From 733f31b764061d976a60c5ee454632d9562900ea Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 2 Nov 2010 17:40:37 +1000 Subject: m68knommu: fix clock rate value reported for ColdFire 54xx parts The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5206sim.h | 3 ++- arch/m68k/include/asm/m520xsim.h | 3 ++- arch/m68k/include/asm/m523xsim.h | 3 ++- arch/m68k/include/asm/m5249sim.h | 3 ++- arch/m68k/include/asm/m5272sim.h | 3 ++- arch/m68k/include/asm/m527xsim.h | 3 ++- arch/m68k/include/asm/m528xsim.h | 3 ++- arch/m68k/include/asm/m5307sim.h | 3 ++- arch/m68k/include/asm/m532xsim.h | 3 ++- arch/m68k/include/asm/m5407sim.h | 3 ++- arch/m68k/include/asm/m54xxsim.h | 5 +++-- arch/m68knommu/kernel/setup.c | 20 +++++++++++--------- 12 files changed, 34 insertions(+), 21 deletions(-) diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 6cc7a42cc425..b882a210ee6e 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -12,7 +12,8 @@ #define m5206sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5206)" +#define CPU_NAME "COLDFIRE(m5206)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5206 SIM register set addresses. diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index afa211858ecb..85b39edf41a0 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -11,7 +11,8 @@ #define m520xsim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m520x)" +#define CPU_NAME "COLDFIRE(m520x)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 520x SIM register set addresses. diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index 6a2c90d74d15..9d597dcb29c0 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -11,7 +11,8 @@ #define m523xsim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m523x)" +#define CPU_NAME "COLDFIRE(m523x)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 523x SIM register set addresses. diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 6c49ed88845c..c107228728db 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -11,7 +11,8 @@ #define m5249sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5249)" +#define CPU_NAME "COLDFIRE(m5249)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5249 SIM register set addresses. diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index 7edef8fc1920..8cea714dee46 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -12,7 +12,8 @@ #define m5272sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5272)" +#define CPU_NAME "COLDFIRE(m5272)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5272 SIM register set addresses. diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 627156a1d96a..5223b71d3432 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -11,7 +11,8 @@ #define m527xsim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m527x)" +#define CPU_NAME "COLDFIRE(m527x)" +#define CPU_INSTR_PER_JIFFY 3 /* diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index 03a6d576787c..4e35f970f662 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -11,7 +11,8 @@ #define m528xsim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m528x)" +#define CPU_NAME "COLDFIRE(m528x)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5280/5282 SIM register set addresses. diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 3e06b8379a49..008f36bd66c3 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -14,7 +14,8 @@ #define m5307sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5307)" +#define CPU_NAME "COLDFIRE(m5307)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5307 SIM register set addresses. diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 9f4688bcc454..b8126d3253e1 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -9,7 +9,8 @@ #define m532xsim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m532x)" +#define CPU_NAME "COLDFIRE(m532x)" +#define CPU_INSTR_PER_JIFFY 3 #define MCF_REG32(x) (*(volatile unsigned long *)(x)) #define MCF_REG16(x) (*(volatile unsigned short *)(x)) diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index 1de44c5affe0..e07d4d8cf31f 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h @@ -14,7 +14,8 @@ #define m5407sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5407)" +#define CPU_NAME "COLDFIRE(m5407)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5407 SIM register set addresses. diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index d69a64fd3bde..6072248916ac 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -5,9 +5,10 @@ #ifndef m54xxsim_h #define m54xxsim_h -#define CPU_NAME "COLDFIRE(m54xx)" +#define CPU_NAME "COLDFIRE(m54xx)" +#define CPU_INSTR_PER_JIFFY 2 -#define MCFINT_VECBASE 64 +#define MCFINT_VECBASE 64 /* * Interrupt Controller Registers diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index f48d9df484d3..5c931f9d392c 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c @@ -66,13 +66,20 @@ void (*mach_power_off)(void); #ifdef CONFIG_M68360 #define CPU_NAME "MC68360" #endif -/* - * The ColdFire CPU names are defined in their headers. - */ #ifndef CPU_NAME #define CPU_NAME "UNKNOWN" #endif +/* + * Different cores have different instruction execution timings. + * The old/traditional 68000 cores are basically all the same, at 16. + * The ColdFire cores vary a little, their values are defined in their + * headers. We default to the standard 68000 value here. + */ +#ifndef CPU_INSTR_PER_JIFFY +#define CPU_INSTR_PER_JIFFY 16 +#endif + extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end; extern int _ramstart, _ramend; @@ -273,12 +280,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) cpu = CPU_NAME; mmu = "none"; fpu = "none"; - -#ifdef CONFIG_COLDFIRE - clockfreq = (loops_per_jiffy * HZ) * 3; -#else - clockfreq = (loops_per_jiffy * HZ) * 16; -#endif + clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY; seq_printf(m, "CPU:\t\t%s\n" "MMU:\t\t%s\n" -- cgit v1.2.3