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Several registers weren't saved correctly to the stack.
Unaligned expection for system with MMU stores
value in ex_tmp_data_loc_X address which is load to registers r3.
The next step is to move this value from r3 to a destination
register which caused unaligned exception. For several registers
this value was directly moved to the register.
For example for r28:
by "or r28, r0, r3"
but register r28 was rewritten when kernel returns from exception
handler by value saved on stack.
This patch changed r3 saving to the correct address on the stack.
For example for r28:
by "swi r3, r1, 4 * 28"
When kernel returns from the exception handler, correct value is restored.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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"la" pseudo instruction is only translation to "addik".
Use directly "addik" which is described in the MB reference guide.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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r0_ram pool was used for saving/restoring register
content if hw exception happen. This poll was replaced by
pt_pool_space with PT_SIZE size.
Based on this change SAVE_STATE_ARG_SPACE was removed which
caused that PTO offset is zero that's why is also removed.
r0_ram space was used as scratchpad by v850. In early
Microblaze Linux developing phase was this part of code
blindly copied.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove hw exception counting space from r0_ram. Use special
exception_debug_table poll for exception statistic.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Unaligned code use shift for finding register operand.
There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1
by
ori rD, r0, (1 << imm); \
idivu rD, rD, rA
but if rD is equal rA then ori instruction rewrite value which
should be devide.
The patch remove this macro which use idivu instruction because
idivu takes 32/34 cycles. The highest shifting is 20 which takes
20 cycles.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Half word unaligned accesses need to be fixed.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Implement intelligent backtracing by searching for stack frame creation,
and emitting only return addresses. Use print_hex_dump() to display the
entire binary kernel stack.
Limitation: MMU kernels are not currently able to trace beyond a system trap
(interrupt, syscall, etc.). It is the intent of this patch to provide
infrastructure that can be extended to add this capability later.
Changes from V1:
* Removed checks in find_frame_creation() that prevented location of the frame
creation instruction in heavily optimized code
* Various formatting/commenting/file location tweaks per review comments
* Dropped Kconfig option to enable STACKTRACE as something logically separate
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
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Sync labels.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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RESR and REAR uses the same regs in whole file.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This change synchronize register usage in code.
ESR = R4
EAR = R3
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Any sync branch must follow mts instructions not mfs.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Disable debug option in asm code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear
it for noMMU kernel. This one do it for MMU.
Correct noMMU version
Signed-off-by: Michal Simek <monstr@monstr.eu>
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FSR is sticky, so after the userspace exception/signal generation, clear
it ready for next time.
Signed-off-by: John Williams <john.williams@petalogix.com>
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I thought that this part of code could be removed because just
save and restore MSR but any code can't change it. But seems to
that any part of code works with this information.
This patch solved problem with allocation.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This patch add support for cases where load/store instruction
in put/get_user macro gets unaligned pointer to data and this
address is not valid. I prevent all cases which can failed.
I had to disable first stage of unaligned handler which is used
only for noMMU kernel and the whole work is done when interrupt
is enabled.
You have enable HW support for detect unaligned access in Microblaze.
This patch fixed three LTP tests:
getpeername01, getsockname01, socketpair01
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Signed-off-by: Michal Simek <monstr@monstr.eu>
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Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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