| Age | Commit message (Collapse) | Author |
|---|
|
Pull ARM development updates from Russell King:
"Included in this update:
- moving PSCI code from ARM64/ARM to drivers/
- removal of some architecture internals from global kernel view
- addition of software based "privileged no access" support using the
old domains register to turn off the ability for kernel
loads/stores to access userspace. Only the proper accessors will
be usable.
- addition of early fixup support for early console
- re-addition (and reimplementation) of OMAP special interconnect
barrier
- removal of finish_arch_switch()
- only expose cpuX/online in sysfs if hotpluggable
- a number of code cleanups"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (41 commits)
ARM: software-based priviledged-no-access support
ARM: entry: provide uaccess assembly macro hooks
ARM: entry: get rid of multiple macro definitions
ARM: 8421/1: smp: Collapse arch_cpu_idle_dead() into cpu_die()
ARM: uaccess: provide uaccess_save_and_enable() and uaccess_restore()
ARM: mm: improve do_ldrd_abort macro
ARM: entry: ensure that IRQs are enabled when calling syscall_trace_exit()
ARM: entry: efficiency cleanups
ARM: entry: get rid of asm_trace_hardirqs_on_cond
ARM: uaccess: simplify user access assembly
ARM: domains: remove DOMAIN_TABLE
ARM: domains: keep vectors in separate domain
ARM: domains: get rid of manager mode for user domain
ARM: domains: move initial domain setting value to asm/domains.h
ARM: domains: provide domain_mask()
ARM: domains: switch to keeping domain value in register
ARM: 8419/1: dma-mapping: harmonize definition of DMA_ERROR_CODE
ARM: 8417/1: refactor bitops functions with BIT_MASK() and BIT_WORD()
ARM: 8416/1: Feroceon: use of_iomap() to map register base
ARM: 8415/1: early fixmap support for earlycon
...
|
|
for-linus
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"Ladies and gentlemen, we proudly announce to you the latest branch of
ARM device tree contents for the mainline kernel. Come and see, come
and see!
No less than twentythree thousand lines of additions! Just imagine the
joy you will have of using your mainline kernel on newly supported
hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
UniPhier hardware!
For those of you feeling less adventurous, added hardware support on
platforms such as TI DM814x and Gumstix Overo platforms might be more
of your liking.
We've got something for everyone here!
Ahem. Cough. So, anyway...
This is the usual large batch of DT updates. Lots and lots of smaller
changes, some of the larger ones to point out are:
- Rockchip veyron (Chromebook) support, as well as several other new boards
- DRM support on Atmel AT91SAM9N12EK
- USB additions on some Allwinner platforms
- Mediatek MT6580 support
- Freescale i.MX6UL support
- cleanups for Renesas shmobile platforms
- lots of added devices on LPC18xx
- lots of added devices and boards on UniPhier
There's also some dependent code added here, in particular some
branches that are primarily merged through the clock tree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
ARM: tegra: Add gpio-ranges property
ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
ARM: tegra: Add Tegra124 PMU support
ARM: tegra: jetson-tk1: Add GK20A GPU DT node
ARM: tegra: venice2: Add GK20A GPU DT node
ARM: tegra: Add IOMMU node to GK20A
ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
ARM: tegra: Add entries for cpufreq on Tegra124
ARM: tegra: Enable the DFLL on the Jetson TK1
ARM: tegra: Add the DFLL to Tegra124 device tree
ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
ARM: dts: rockchip: correct regulator power states for suspend
ARM: dts: rockchip: correct regulator PM properties
ARM: dts: vexpress: Use assigned-clock-parents for sp810
pinctrl: tegra: Only set the gpio range if needed
arm: boot: dts: am4372: add ARM timers and SCU nodes
ARM: dts: AM4372: Add the am4372-rtc compatible string
ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"New or improved SoC support:
- add support for Atmel's SAMA5D2 SoC
- add support for Freescale i.MX6UL
- improved support for TI's DM814x platform
- misc fixes and improvements for RockChip platforms
- Marvell MVEBU suspend/resume support
A few driver changes that ideally would belong in the drivers branch
are also here (acked by appropriate maintainers):
- power key input driver for Freescale platforms (svns)
- RTC driver updates for Freescale platforms (svns/mxc)
- clk fixes for TI DM814/816X
+ a bunch of other changes for various platforms"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: rockchip: pm: Fix PTR_ERR() argument
ARM: imx: mach-imx6ul: Fix allmodconfig build
clk: ti: fix for definition movement
ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
memory: kill off set_irq_flags usage
rtc: snvs: select option REGMAP_MMIO
ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
ARM: OMAP2+: Fix power domain operations regression caused by 81xx
ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
ARM: rockchip: set correct stabilization thresholds in suspend
ARM: rockchip: rename osc_switch_to_32k variable
ARM: imx6ul: add fec MAC refrence clock and phy fixup init
ARM: imx6ul: add fec bits to GPR syscon definition
rtc: mxc: add support of device tree
dt-binding: document the binding for mxc rtc
rtc: mxc: use a second rtc clock
ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
soc: mediatek: Fix SCPSYS compilation
ARM: at91/soc: add basic support for new sama5d2 SoC
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"A large cleanup branch this release, with a healthy 10k negative line
delta.
Most of this is removal of legacy (non-DT) support of shmobile
platforms. There is also removal of two non-DT platforms on OMAP, and
the plat-samsung directory is cleaned out by moving most of the
previously shared-location-but-not-actually-shared files from there to
the appropriate mach directories instead.
There are other sets of changes in here as well:
- Rob Herring removed use of set_irq_flags under all platforms and
moved to genirq alternatives
- a series of timer API conversions to set-state interface
- ep93xx, nomadik and ux500 cleanups from Linus Walleij
- __init annotation fixes from Nicolas Pitre
+ a bunch of other changes that all add up to a nice set of cleanups"
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (108 commits)
ARM/fb: ep93xx: switch framebuffer to use modedb only
ARM: gemini: Setup timer3 as free running timer
ARM: gemini: Use timer1 for clockevent
ARM: gemini: Add missing register definitions for gemini timer
ARM: ep93xx/timer: Migrate to new 'set-state' interface
ARM: nomadik: push accelerometer down to boards
ARM: nomadik: move l2x0 setup to device tree
ARM: nomadik: selectively enable UART0 on boards
ARM: nomadik: move hog code to use DT hogs
ARM: shmobile: Fix mismerges
ARM: ux500: simplify secondary CPU boot
ARM: SAMSUNG: remove keypad-core header in plat-samsung
ARM: SAMSUNG: local watchdog-reset header in mach-s3c64xx
ARM: SAMSUNG: local onenand-core header in mach-s3c64xx
ARM: SAMSUNG: local irq-uart header in mach-s3c64xx
ARM: SAMSUNG: local backlight header in mach-s3c64xx
ARM: SAMSUNG: local ata-core header in mach-s3c64xx
ARM: SAMSUNG: local regs-usb-hsotg-phy header in mach-s3c64xx
ARM: SAMSUNG: local spi-core header in mach-s3c24xx
ARM: SAMSUNG: local nand-core header in mach-s3c24xx
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Michael Turquette:
"The clk framework changes for 4.3 are mostly updates to existing
drivers and the addition of new clock drivers. Stephen Boyd has also
done a lot of subsystem-wide driver clean-ups (thanks!). There are
also fixes to the framework core and changes to better split clock
provider drivers from clock consumer drivers"
* tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
clk: s5pv210: add missing call to samsung_clk_of_add_provider()
clk: pistachio: correct critical clock list
clk: pistachio: Fix PLL rate calculation in integer mode
clk: pistachio: Fix override of clk-pll settings from boot loader
clk: pistachio: Fix 32bit integer overflows
clk: tegra: Fix some static checker problems
clk: qcom: Fix MSM8916 prng clock enable bit
clk: Add missing header for 'bool' definition to clk-conf.h
drivers/clk: appropriate __init annotation for const data
clk: rockchip: register pll mux before pll itself
clk: add bindings for the Ux500 clocks
clk/ARM: move Ux500 PRCC bases to the device tree
clk: remove duplicated code with __clk_set_parent_after
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
clk: Constify clk_hw argument to provider APIs
clk: Hi6220: add stub clock driver
dt-bindings: clk: Hi6220: Document stub clock driver
dt-bindings: arm: Hi6220: add doc for SRAM controller
clk: atlas7: fix pll missed divide NR in fraction mode
clk: atlas7: fix bit field and its root clk for coresight_tpiu
...
|
|
We're removing struct clk from the clk provider API, so switch to
clk_get_rate() and clk_hw_get_rate() here appropriately.
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
|
The conversion of the wakeupgen irqchip to hierarchical irq domains
failed to provide a mechanism to properly set the trigger type of an
interrupt.
The wakeupgen irq chip itself has no mechanism and therefor no
irq_set_type() callback. The code before the conversion relayed the
trigger configuration directly to the underlying GIC.
Restore the correct behaviour by setting the wakeupgen irq_set_type
callback to irq_chip_set_type_parent(). This propagates the
set_trigger() call to the underlying GIC irqchip.
[ tglx: Massaged changelog ]
Fixes: 7136d457f365 ('ARM: omap: convert wakeupgen to stacked domains')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: <linux@arm.linux.org.uk>
Cc: <nsekhar@ti.com>
Cc: <jason@lakedaemon.net>
Cc: <balbi@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: <marc.zyngier@arm.com>
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-5-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
|
I managed to mess up omap3 power domain operations with commit
7c80a3f89c51 ("ARM: OMAP2+: Add custom prwdm_operations for 81xx
to support dm814x"), by default we should keep on using the
omap3_pwrdm_operations, only 81xx needs custom handling.
This causes omap3 PM to break so we won't hit off mode any longer
causing idle power consumption go up from less than 10mW to over
50 mW.
Fixs: 7c80a3f89c51 ("ARM: OMAP2+: Add custom prwdm_operations for
81xx to support dm814x")
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
* fixes: (28 commits)
ARM: ux500: add an SMP enablement type and move cpu nodes
ARM: dts: keystone: fix dt bindings to use post div register for mainpll
ARM: nomadik: disable UART0 on Nomadik boards
ARM: dts: i.MX35: Fix can support.
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
ARM: dts: add CPU OPP and regulator supply property for exynos4210
ARM: dts: Update video-phy node with syscon phandle for exynos3250
ARM: keystone: dts: rename pcie nodes to help override status
ARM: keystone: dts: fix dt bindings for PCIe
ARM: pxa: fix dm9000 platform data regression
ARM: DRA7: hwmod: fix gpmc hwmod
ARM: dts: Correct audio input route & set mic bias for am335x-pepper
ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX
MAINTAINERS: digicolor: add dts files
ARM: ux500: fix MMC/SD card regression
ARM: ux500: define serial port aliases
ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs
ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs
ARM: dts: Fix frequency scaling on Gumstix Pepper
ARM: dts: configure regulators for Gumstix Pepper
...
|
|
* cleanup-clk-h-includes: (62 commits)
clk: Remove clk.h from clk-provider.h
clk: h8300: Remove clk.h and clkdev.h includes
clk: at91: Include clk.h and slab.h
clk: ti: Switch clk-provider.h include to clk.h
clk: pistachio: Include clk.h
clk: ingenic: Include clk.h
clk: si570: Include clk.h
clk: moxart: Include clk.h
clk: cdce925: Include clk.h
clk: Include clk.h in clk.c
clk: zynq: Include clk.h
clk: ti: Include clk.h
clk: sunxi: Include clk.h and remove unused clkdev.h includes
clk: st: Include clk.h
clk: qcom: Include clk.h
clk: highbank: Include clk.h
clk: bcm: Include clk.h
clk: versatile: Remove clk.h and clkdev.h includes
clk: ux500: Remove clk.h and clkdev.h includes
clk: tegra: Properly include clk.h
...
|
|
into clk-next
From Tero Kristo:
"This pull request contains the TI clock driver set to move the
clock implementations under clock driver. Some small portions of
the clock driver code still remain under mach-omap2 after this,
it should be decided whether this code is now obsolete and should
be deleted or should someone try to fix it."
Slight merge conflicts with determine_rate prototype changes.
|
|
Init data marked const should be annotated with __initconst for
correctness and not __initdata. In some cases the array gathering
references to that data has to be marked const as well. This fixes
LTO builds that otherwise fail with section mismatch errors.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.
Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.
The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
Merge "ARM: OMAP2+: hwmod fixes for v4.2-rc" from Paul Walmsley:
ARM: OMAP2+: hwmod fixes for v4.2-rc
Two fixes against v4.2-rc1. The first, for DRA7xx platforms,
corrects some incorrect GPMC hardware description data. The
second one will ensure that the hwmod code will wait for any
module with CPU-accessible registers to become ready before
attempting to access it.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.2-rc/20150723065408/
Note that I do not have a DRA7xx or AM43xx board, and therefore
cannot test on those platforms.
* tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
ARM: DRA7: hwmod: fix gpmc hwmod
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Restore the OMAP4 barrier behaviour using the new implementation which
allows multiplatform systems to hook into the mb() and wmb() ARM
implementations to perform any necessary additional barrier maintanence.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
This reverts commit 606da4826b89b044b51e3a84958b802204cfe4c7.
We actually need this code for proper behaviour of OMAP4, and it needs
fixing a different way other than just removing the code. Disabling
code which is necessary in the hopes of persuing multiplatform kernels
is a stupid approach.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Similar to commit fdf4850cb5b2 ("ARM: BCM5301X: workaround suppress fault"),
let's add custom handling for the aborts on t410 that prevent booting:
Unhandled fault: imprecise external abort (0xc06) at 0xee091fb0
pgd = ee4bc000
[ee091fb0] *pgd=ae00041e(bad)
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Update dm814x changes for sparse fixes to make data structures
static.
Conflicts:
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
|
|
Let's add minimal set of dm814x hwmods to have a bootable system.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Let's change the defines so we can share the hwmod code better between
dm816x and dm814x, and let's add the dm814x specific defines. And let's
rename the shared ones to start with dm81xx. No functional changes.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.3/soc
ARM: OMAP2+: PRCM and hwmod changes for v4.3
This series adds:
- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
bugs
Basic build, boot, and PM tests are here:
http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/
Since I do not have an AM43xx or DRA7xx device, I can't test on those
platforms.
|
|
|
|
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
This can potentially cause a bus access error if the module is accessed
before the module is ready.
Fix this by unconditionally calling _init_mpu_rt_base() during hwmod
_init(). Do ioremap only if we need SYSC access.
Eventhough _wait_target_ready() check doesn't really need MPU RT port but
just the PRCM registers, we still mandate that the hwmod must have an
MPU RT port if ready state check needs to be done. Else it would mean that
the module is not accessible by MPU so there is no point in waiting
for target to be ready.
e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.
[ 16.672978] ------------[ cut here ]------------
[ 16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
[ 16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
[ 16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
[ 16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
[ 16.739747] Backtrace:
[ 16.742336] [<c0011108>] (dump_backtrace) from [<c00112a4>] (show_stack+0x18/0x1c)
[ 16.750285] r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
[ 16.756252] [<c001128c>] (show_stack) from [<c05a4418>] (dump_stack+0x20/0x28)
[ 16.763870] [<c05a43f8>] (dump_stack) from [<c0037120>] (warn_slowpath_common+0x6c/0x8c)
[ 16.772408] [<c00370b4>] (warn_slowpath_common) from [<c00371e4>] (warn_slowpath_fmt+0x38/0x40)
[ 16.781550] r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
[ 16.788626] [<c00371b0>] (warn_slowpath_fmt) from [<c027fa94>] (l3_interrupt_handler+0x234/0x35c)
[ 16.797968] r3:ed0cd480 r2:c0730508
[ 16.801747] [<c027f860>] (l3_interrupt_handler) from [<c0063758>] (handle_irq_event_percpu+0x54/0x1bc)
[ 16.811533] r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
[ 16.819780] r4:ed0e6d80
[ 16.822453] [<c0063704>] (handle_irq_event_percpu) from [<c00638f0>] (handle_irq_event+0x30/0x40)
[ 16.831789] r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
[ 16.840052] r4:ed005600
[ 16.842744] [<c00638c0>] (handle_irq_event) from [<c00661d8>] (handle_fasteoi_irq+0x74/0x128)
[ 16.851702] r4:ed005600 r3:00000000
[ 16.855479] [<c0066164>] (handle_fasteoi_irq) from [<c0063068>] (generic_handle_irq+0x28/0x38)
[ 16.864523] r4:0000002a r3:c0066164
[ 16.868294] [<c0063040>] (generic_handle_irq) from [<c000ef60>] (handle_IRQ+0x38/0x8c)
[ 16.876612] r4:c081c640 r3:00000202
[ 16.880380] [<c000ef28>] (handle_IRQ) from [<c00084f0>] (gic_handle_irq+0x30/0x5c)
[ 16.888328] r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
[ 16.894303] [<c00084c0>] (gic_handle_irq) from [<c05a8d80>] (__irq_svc+0x40/0x50)
[ 16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
[ 16.907499] ba20: 00000000 00000006
[ 16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
[ 16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
[ 16.933317] r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
[ 16.939317] [<bf077000>] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [<bf035220>] (c_can_get_berr_counter+0x38/0x64 [c_can])
[ 16.952696] [<bf0351e8>] (c_can_get_berr_counter [c_can]) from [<bf010294>] (can_fill_info+0x124/0x15c [can_dev])
[ 16.963480] r5:ec8c9740 r4:ed3d3000
[ 16.967253] [<bf010170>] (can_fill_info [can_dev]) from [<c0502fa8>] (rtnl_fill_ifinfo+0x58c/0x8fc)
[ 16.976749] r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
[ 16.981613] [<c0502a1c>] (rtnl_fill_ifinfo) from [<c0503408>] (rtnl_dump_ifinfo+0xf0/0x1dc)
[ 16.990401] r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
[ 16.998671] r4:00000000
[ 17.001342] [<c0503318>] (rtnl_dump_ifinfo) from [<c050e6e4>] (netlink_dump+0xa8/0x1e0)
[ 17.009772] r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
[ 17.018050] r4:ebd4d000
[ 17.020714] [<c050e63c>] (netlink_dump) from [<c050ec10>] (__netlink_dump_start+0x104/0x154)
[ 17.029591] r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
[ 17.034454] [<c050eb0c>] (__netlink_dump_start) from [<c0505604>] (rtnetlink_rcv_msg+0x110/0x1f4)
[ 17.043778] r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
[ 17.049743] [<c05054f4>] (rtnetlink_rcv_msg) from [<c05108e8>] (netlink_rcv_skb+0xb4/0xc8)
[ 17.058449] r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
[ 17.065534] [<c0510834>] (netlink_rcv_skb) from [<c0504134>] (rtnetlink_rcv+0x24/0x2c)
[ 17.073854] r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
[ 17.079846] [<c0504110>] (rtnetlink_rcv) from [<c05102ac>] (netlink_unicast+0x180/0x1ec)
[ 17.088363] r4:ed0c6800 r3:c0504110
[ 17.092113] [<c051012c>] (netlink_unicast) from [<c0510670>] (netlink_sendmsg+0x2ac/0x380)
[ 17.100813] r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
[ 17.109083] [<c05103c4>] (netlink_sendmsg) from [<c04dfdb4>] (sock_sendmsg+0x90/0xb0)
[ 17.117305] r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
[ 17.125563] r4:c05103c4
[ 17.128225] [<c04dfd24>] (sock_sendmsg) from [<c04e1c28>] (SyS_sendto+0xb8/0xdc)
[ 17.136001] r6:becdda5c r5:00000014 r4:ecd37040
[ 17.140876] [<c04e1b70>] (SyS_sendto) from [<c000e680>] (ret_fast_syscall+0x0/0x30)
[ 17.148923] r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
[ 17.157169] ---[ end trace 2b71e15b38f58bad ]---
Fixes: 6423d6df1440 ("ARM: OMAP2+: hwmod: check for module address space during init")
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: <stable@vger.kernel.org>
|
|
Enable IO wakeup feature. This enables am437x pads to generate daisy
chained wake ups(eventually generates aprcm Interrupt) especially
when in low power modes.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
The register offsets for some of the PRM Registers are different
hence populating the differing fields. This is needed to support
IO wake up feature for am437x family.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
register offsets
The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
Add the PRM IRQ register offsets. This is needed to support PRM I/O
wakeup on AM43xx.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: improved patch description, moved the PRM_IO_PMCTRL macro
out of the CM section]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure. This is done to support IO wakeup on am437x series.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "drop few more legacy boards for v4.3" from Tony Lindgren:
Drop more omap3 legacy board-*.c files for v4.3. This time we're
dropping the board files for omap3logic and omap3pandora.
The reason for dropping these now rather than later is that now
we can simply revert the patches in case of unexpected issues as
we are not dropping any platform data at this point.
This leaves us with only the following board-*.c files:
BOARD REASON NEEDED
board-ldp.c Still used in RMKs boot test system
board-rx51-*.c Needs /proc/atags support for user space
Once we have the n900 legacy user space issues sorted out for
/proc/atags and system_rev, we can drop the remaining two
board-*.c files. And then one merge window after that we can
drop the legacy booting support assuming no unexpected issues
are found.
* tag 'omap-for-v4.3/legacy-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Remove legacy booting support for Pandora
ARM: OMAP2+: Remove legacy booting support for LogicPD Torpedo
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Add wl1251 support via pdata-quirks as it's driver lacks DT
support. MMC3 is marked disabled in DT so that MMC3 instance of
hsmmc driver is probed using platform data with special card init
callback.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add backlight support via pdata-quirks as it's driver lacks DT support.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
These files use the consumer API, so include clk.h explicitly.
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
|
Migrate omap2 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.
This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
|
|
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3 boards already have related arch/arm/boot/*.dts*
files for booting with device tree.
This board has support for device tree based booting, and we've been
printing warnings about the legacy booting being deprecated for a
few merge cycles now. Let's attempt to remove the legacy booting
for it.
The reason for removing the legacy booting support now rather than
later is we can simply revert this patch if necessary if we run
into some unexpected issues that are not trivial to fix for the
device tree based booting.
Cc: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Let's add a minimal clocks for dm814x to get it booted. This is
mostly a placeholder and relies on the PLLs being on from the
bootloader.
Note that the divider clocks work the same way as on dm816x and
am335x.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Looking at the TI kernel tree I noticed that dm81xx need custom
ti81xx_pwrdm_operations. Let's also change dm816x over to use them
as the registers are different for dm81xx compared to others.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
For now, let's just add the ones shared with dm816x.
The dm814x specific ones can be added as they are tested.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Fix scm compatible for dm814x.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Fix dm814x DT_MACHINE_START.
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The OMAP IOMMU driver has been adapted to the IOMMU framework
for a while now, and it no longer supports being built as a
module. Cleanup all the module related references both from
the code and in the build.
While at it, also relocate a comment around the initcall to
avoid a checkpatch strict warning about using a blank line
after function/struct/union/enum declarations.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
DRA7 uses OMAP5 IO table at the moment. This is purely spurious since
the OMAP5 and DRA7 register maps are different in many aspects.
AM57xx/DRA7 TRM Reference: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf
NOTE: Most of the drivers are already doing ioremap, so, there should'nt
be any functional improvement involved here, other than making the
initial iotable more accurate.
Fixes: a3a9384a1157 ("ARM: DRA7: Reuse io tables and add a new .init_early")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Inspired by a patch from Felipe Balbi <balbi@ti.com>, we can
now get rid of most the code in omap4_local_timer_init.
Omap4 is now device tree only.. And we have not properly supported
omap4 ES1.0 revision for a really long time AFAIK.
Let's just remove all that code to simplify things. This assumes
we have arm,cortex-a9-twd-timer entry in the omap4.dtsi file, which
we do.
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The of_node_put() function tests whether its argument is NULL and then
returns immediately if so. Furthermore, the kerneldoc for
of_node_put() explicitly supports passing in a NULL pointer as its
argument. Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
[paul@pwsan.com: dropped the omap_device.c and omap_hwmod.c changes for
now, edited the commit message accordingly and to note the documented
"contract"]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
omap3xxx_restart() and omap44xx_restart() are global
functions declared in common.h. Include this file
in omap3-restart.c and omap4-restart.c to prevent
sparse warnings of type:
arch/arm/mach-omap2/omap4-restart.c:22:6: warning: symbol 'omap44xx_restart' was not declared. Should it be static?
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
Add missing static declaration for file local variables.
This fixes sparse warnings of type:
arch/arm/mach-omap2/omap_hwmod_81xx_data.c:491:26: warning: symbol 'dm81xx_alwon_l3_slow__gpmc' was not declared. Should it be static?
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
Some IP blocks like RTC, needs an additional setting for writing to its
registers. This is to prevent any spurious writes from changing the
register values.
This patch adds optional lock and unlock function pointers to
the IP block's hwmod data. These unlock and lock function pointers
are called by hwmod code before and after writing sysconfig registers.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[paul@pwsan.com: fixed indentation level to conform with the rest of the
structure members]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
GPMC smart idle is not really broken but it does not support
smart idle with wakeup.
Fixes: 556708fe8718 ("ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken")
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to SW_WKUP.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: <stable@vger.kernel.org>
|
|
CONFIG_HAVE_ARM_SCU only gets selected if CONFIG_SMP is selected in an OMAP
system, however AM43XX needs this option regardless of CONFIG_SMP and also
for an AM43XX only build as it is important for controlling power in the SoC.
Without this we cannot suspend the CPU for SoC suspend or cpuidle. The
ARM Cortex A9 needs SCU CPU Power Status bits to be set to off mode in order
for the PRCM to transition the MPU to low power modes.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
