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-rw-r--r--tools/gator/daemon/events-Cortex-A57.xml58
1 files changed, 29 insertions, 29 deletions
diff --git a/tools/gator/daemon/events-Cortex-A57.xml b/tools/gator/daemon/events-Cortex-A57.xml
index fbe96c2..1da23e7 100644
--- a/tools/gator/daemon/events-Cortex-A57.xml
+++ b/tools/gator/daemon/events-Cortex-A57.xml
@@ -8,10 +8,10 @@
<event event="0x04" title="Cache" name="Data access" description="Memory Read or Write operation that causes a cache access to at least the level of data or unified cache closest to the processor"/>
<event event="0x05" title="Cache" name="Data TLB refill" description="Memory Read or Write operation that causes a TLB refill of at least the level of TLB closest to the processor"/>
<event event="0x08" title="Instruction" name="Executed" description="Instruction architecturally executed"/>
- <event event="0x09" title="Exception" name="Taken" description="Exceptions taken"/>
- <event event="0x0a" title="Exception" name="Return" description="Exception return architecturally executed"/>
- <event event="0x0b" title="Instruction" name="CONTEXTIDR" description="Instruction that writes to the CONTEXTIDR architecturally executed"/>
- <event event="0x10" title="Branch" name="Mispredicted" description="Branch mispredicted or not predicted"/>
+ <event event="0x09" title="Exception" name="Taken" description="Exception taken"/>
+ <event event="0x0a" title="Exception" name="Return" description="Instruction architecturally executed (condition check pass) - Exception return"/>
+ <event event="0x0b" title="Instruction" name="CONTEXTIDR" description="Instruction architecturally executed (condition check pass) - Write to CONTEXTIDR"/>
+ <event event="0x10" title="Branch" name="Mispredicted" description="Mispredicted or not predicted branch speculatively executed"/>
<event event="0x12" title="Branch" name="Potential prediction" description="Branch or other change in program flow that could have been predicted by the branch prediction resources of the processor"/>
<event event="0x13" title="Memory" name="Memory access" description="Data memory access"/>
<event event="0x14" title="Cache" name="L1 inst access" description="Level 1 instruction cache access"/>
@@ -20,11 +20,11 @@
<event event="0x17" title="Cache" name="L2 data refill" description="Level 2 data cache refill"/>
<event event="0x18" title="Cache" name="L2 data write" description="Level 2 data cache Write-Back"/>
<event event="0x19" title="Bus" name="Access" description="Bus access"/>
- <event event="0x1A" title="Memory" name="Error" description="Local memory error"/>
- <event event="0x1B" title="Instruction" name="Speculative" description="Operation speculatively executed"/>
- <event event="0x1C" title="Memory" name="Translation table" description="Instruction architecturally executed (condition check pass) - Write to translation table base"/>
- <event event="0x1D" title="Bus" name="Cycle" description="Bus cycle"/>
- <event event="0x1E" title="Counter chain" name="Odd Performance" description="Odd performance counter chain mode"/>
+ <event event="0x1a" title="Memory" name="Error" description="Local memory error"/>
+ <event event="0x1b" title="Instruction" name="Speculative" description="Operation speculatively executed"/>
+ <event event="0x1c" title="Memory" name="Translation table" description="Instruction architecturally executed (condition check pass) - Write to translation table base"/>
+ <event event="0x1d" title="Bus" name="Cycle" description="Bus cycle"/>
+ <event event="0x1e" title="Counter chain" name="Odd Performance" description="Odd performance counter chain mode"/>
<event event="0x40" title="Cache" name="L1 data read" description="Level 1 data cache access - Read"/>
<event event="0x41" title="Cache" name="L1 data access write" description="Level 1 data cache access - Write"/>
<event event="0x42" title="Cache" name="L1 data refill read" description="Level 1 data cache refill - Read"/>
@@ -32,8 +32,8 @@
<event event="0x46" title="Cache" name="L1 data victim" description="Level 1 data cache Write-back - Victim"/>
<event event="0x47" title="Cache" name="L1 data clean" description="Level 1 data cache Write-back - Cleaning and coherency"/>
<event event="0x48" title="Cache" name="L1 data invalidate" description="Level 1 data cache invalidate"/>
- <event event="0x4C" title="Cache" name="L1 data refill read" description="Level 1 data TLB refill - Read"/>
- <event event="0x4D" title="Cache" name="L1 data refill write" description="Level 1 data TLB refill - Write"/>
+ <event event="0x4c" title="Cache" name="L1 TLB refill read" description="Level 1 data TLB refill - Read"/>
+ <event event="0x4d" title="Cache" name="L1 TLB refill write" description="Level 1 data TLB refill - Write"/>
<event event="0x50" title="Cache" name="L2 data read" description="Level 2 data cache access - Read"/>
<event event="0x51" title="Cache" name="L2 data access write" description="Level 2 data cache access - Write"/>
<event event="0x52" title="Cache" name="L2 data refill read" description="Level 2 data cache refill - Read"/>
@@ -51,10 +51,10 @@
<event event="0x67" title="Memory" name="Write" description="Data memory access - Write"/>
<event event="0x68" title="Memory" name="Unaligned Read" description="Unaligned access - Read"/>
<event event="0x69" title="Memory" name="Unaligned Write" description="Unaligned access - Write"/>
- <event event="0x6A" title="Memory" name="Unaligned" description="Unaligned access"/>
- <event event="0x6C" title="Intrinsic" name="LDREX" description="Exclusive operation speculatively executed - LDREX"/>
- <event event="0x6D" title="Intrinsic" name="STREX pass" description="Exclusive instruction speculatively executed - STREX pass"/>
- <event event="0x6E" title="Intrinsic" name="STREX fail" description="Exclusive operation speculatively executed - STREX fail"/>
+ <event event="0x6a" title="Memory" name="Unaligned" description="Unaligned access"/>
+ <event event="0x6c" title="Intrinsic" name="LDREX" description="Exclusive operation speculatively executed - LDREX"/>
+ <event event="0x6d" title="Intrinsic" name="STREX pass" description="Exclusive instruction speculatively executed - STREX pass"/>
+ <event event="0x6e" title="Intrinsic" name="STREX fail" description="Exclusive operation speculatively executed - STREX fail"/>
<event event="0x70" title="Instruction" name="Load" description="Operation speculatively executed - Load"/>
<event event="0x71" title="Instruction" name="Store" description="Operation speculatively executed - Store"/>
<event event="0x72" title="Instruction" name="Load/Store" description="Operation speculatively executed - Load or store"/>
@@ -63,12 +63,12 @@
<event event="0x75" title="Instruction" name="VFP" description="Operation speculatively executed - VFP"/>
<event event="0x76" title="Instruction" name="Software change" description="Operation speculatively executed - Software change of the PC"/>
<event event="0x77" title="Instruction" name="Crypto" description="Operation speculatively executed, crypto data processing"/>
- <event event="0x78" title="Instruction" name="Immediate branch" description="Branch speculatively executed - Immediate branch"/>
- <event event="0x79" title="Instruction" name="Procedure return" description="Branch speculatively executed - Procedure return"/>
- <event event="0x7A" title="Instruction" name="Indirect branch" description="Branch speculatively executed - Indirect branch"/>
- <event event="0x7C" title="Instruction" name="ISB" description="Barrier speculatively executed - ISB"/>
- <event event="0x7D" title="Instruction" name="DSB" description="Barrier speculatively executed - DSB"/>
- <event event="0x7E" title="Instruction" name="DMB" description="Barrier speculatively executed - DMB"/>
+ <event event="0x78" title="Branch" name="Immediate" description="Branch speculatively executed - Immediate branch"/>
+ <event event="0x79" title="Procedure" name="Return" description="Branch speculatively executed - Procedure return"/>
+ <event event="0x7a" title="Branch" name="Indirect" description="Branch speculatively executed - Indirect branch"/>
+ <event event="0x7c" title="Instruction" name="ISB" description="Barrier speculatively executed - ISB"/>
+ <event event="0x7d" title="Instruction" name="DSB" description="Barrier speculatively executed - DSB"/>
+ <event event="0x7e" title="Instruction" name="DMB" description="Barrier speculatively executed - DMB"/>
<event event="0x81" title="Exception" name="Undefined" description="Exception taken, other synchronous"/>
<event event="0x82" title="Exception" name="Supervisor" description="Exception taken, Supervisor Call"/>
<event event="0x83" title="Exception" name="Instruction abort" description="Exception taken, Instruction Abort"/>
@@ -76,12 +76,12 @@
<event event="0x86" title="Interrupts" name="IRQ" description="Exception taken, IRQ"/>
<event event="0x87" title="Interrupts" name="FIQ" description="Exception taken, FIQ"/>
<event event="0x88" title="Exception" name="Secure monitor call" description="Exception taken, Secure Monitor Call"/>
- <event event="0x8A" title="Exception" name="Hypervisor call" description="Exception taken, Hypervisor Call"/>
- <event event="0x8B" title="Exception" name="Instruction abort non-local" description="Exception taken, Instruction Abort not taken locally"/>
- <event event="0x8C" title="Exception" name="Data abort non-local" description="Exception taken, Data Abort or SError not taken locally"/>
- <event event="0x8D" title="Exception" name="Other non-local" description="Exception taken - Other traps not taken locally"/>
- <event event="0x8E" title="Exception" name="IRQ non-local" description="Exception taken, IRQ not taken locally"/>
- <event event="0x8F" title="Exception" name="FIQ non-local" description="Exception taken, FIQ not taken locally"/>
- <event event="0x90" title="Release Consistency" name="Load" description="Release consistency instruction speculatively executed - Load Acquire"/>
- <event event="0x91" title="Release Consistency" name="Store" description="Release consistency instruction speculatively executed - Store Release"/>
+ <event event="0x8a" title="Exception" name="Hypervisor call" description="Exception taken, Hypervisor Call"/>
+ <event event="0x8b" title="Exception" name="Instruction abort non-local" description="Exception taken, Instruction Abort not taken locally"/>
+ <event event="0x8c" title="Exception" name="Data abort non-local" description="Exception taken, Data Abort, or SError not taken locally"/>
+ <event event="0x8d" title="Exception" name="Other non-local" description="Exception taken - Other traps not taken locally"/>
+ <event event="0x8e" title="Exception" name="IRQ non-local" description="Exception taken, IRQ not taken locally"/>
+ <event event="0x8f" title="Exception" name="FIQ non-local" description="Exception taken, FIQ not taken locally"/>
+ <event event="0x90" title="Release Consistency" name="Load" description="Release consistency instruction speculatively executed - Load-Acquire"/>
+ <event event="0x91" title="Release Consistency" name="Store" description="Release consistency instruction speculatively executed - Store-Release"/>
</category>