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path: root/drivers/staging/vt6655/upc.h
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Diffstat (limited to 'drivers/staging/vt6655/upc.h')
-rw-r--r--drivers/staging/vt6655/upc.h165
1 files changed, 83 insertions, 82 deletions
diff --git a/drivers/staging/vt6655/upc.h b/drivers/staging/vt6655/upc.h
index af6413694302..6aabb0df747b 100644
--- a/drivers/staging/vt6655/upc.h
+++ b/drivers/staging/vt6655/upc.h
@@ -41,32 +41,29 @@
#ifdef IO_MAP
-#define VNSvInPortB(dwIOAddress, pbyData) { \
- *(pbyData) = inb(dwIOAddress); \
- }
+#define VNSvInPortB(dwIOAddress, pbyData) \
+do { \
+ *(pbyData) = inb(dwIOAddress); \
+} while (0)
+#define VNSvInPortW(dwIOAddress, pwData) \
+do { \
+ *(pwData) = inw(dwIOAddress); \
+} while (0)
-#define VNSvInPortW(dwIOAddress, pwData) { \
- *(pwData) = inw(dwIOAddress); \
- }
+#define VNSvInPortD(dwIOAddress, pdwData) \
+do { \
+ *(pdwData) = inl(dwIOAddress); \
+} while (0)
-#define VNSvInPortD(dwIOAddress, pdwData) { \
- *(pdwData) = inl(dwIOAddress); \
- }
+#define VNSvOutPortB(dwIOAddress, byData) \
+ outb(byData, dwIOAddress)
+#define VNSvOutPortW(dwIOAddress, wData) \
+ outw(wData, dwIOAddress)
-#define VNSvOutPortB(dwIOAddress, byData) { \
- outb(byData, dwIOAddress); \
- }
-
-
-#define VNSvOutPortW(dwIOAddress, wData) { \
- outw(wData, dwIOAddress); \
- }
-
-#define VNSvOutPortD(dwIOAddress, dwData) { \
- outl(dwData, dwIOAddress); \
- }
+#define VNSvOutPortD(dwIOAddress, dwData) \
+ outl(dwData, dwIOAddress)
#else
@@ -75,38 +72,43 @@
//
-#define VNSvInPortB(dwIOAddress, pbyData) { \
- volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \
- *(pbyData) = readb(pbyAddr); \
- }
+#define VNSvInPortB(dwIOAddress, pbyData) \
+do { \
+ volatile unsigned char *pbyAddr = (unsigned char *)(dwIOAddress); \
+ *(pbyData) = readb(pbyAddr); \
+} while (0)
-#define VNSvInPortW(dwIOAddress, pwData) { \
- volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
- *(pwData) = readw(pwAddr); \
- }
+#define VNSvInPortW(dwIOAddress, pwData) \
+do { \
+ volatile unsigned short *pwAddr = (unsigned short *)(dwIOAddress); \
+ *(pwData) = readw(pwAddr); \
+} while (0)
-#define VNSvInPortD(dwIOAddress, pdwData) { \
- volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
- *(pdwData) = readl(pdwAddr); \
- }
+#define VNSvInPortD(dwIOAddress, pdwData) \
+do { \
+ volatile unsigned long *pdwAddr = (unsigned long *)(dwIOAddress); \
+ *(pdwData) = readl(pdwAddr); \
+} while (0)
+#define VNSvOutPortB(dwIOAddress, byData) \
+do { \
+ volatile unsigned char *pbyAddr = (unsigned char *)(dwIOAddress); \
+ writeb((unsigned char)byData, pbyAddr); \
+} while (0)
-#define VNSvOutPortB(dwIOAddress, byData) { \
- volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \
- writeb((unsigned char)byData, pbyAddr); \
- }
+#define VNSvOutPortW(dwIOAddress, wData) \
+do { \
+ volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
+ writew((unsigned short)wData, pwAddr); \
+} while (0)
-#define VNSvOutPortW(dwIOAddress, wData) { \
- volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
- writew((unsigned short)wData, pwAddr); \
- }
-
-#define VNSvOutPortD(dwIOAddress, dwData) { \
- volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
- writel((unsigned long)dwData, pdwAddr); \
- }
+#define VNSvOutPortD(dwIOAddress, dwData) \
+do { \
+ volatile unsigned long *pdwAddr = (unsigned long *)(dwIOAddress); \
+ writel((unsigned long)dwData, pdwAddr); \
+} while (0)
#endif
@@ -114,43 +116,42 @@
//
// ALWAYS IO-Mapped IO when in 16-bit/32-bit environment
//
-#define PCBvInPortB(dwIOAddress, pbyData) { \
- *(pbyData) = inb(dwIOAddress); \
- }
-
-#define PCBvInPortW(dwIOAddress, pwData) { \
- *(pwData) = inw(dwIOAddress); \
- }
-
-#define PCBvInPortD(dwIOAddress, pdwData) { \
- *(pdwData) = inl(dwIOAddress); \
- }
-
-#define PCBvOutPortB(dwIOAddress, byData) { \
- outb(byData, dwIOAddress); \
- }
-
-#define PCBvOutPortW(dwIOAddress, wData) { \
- outw(wData, dwIOAddress); \
- }
-
-#define PCBvOutPortD(dwIOAddress, dwData) { \
- outl(dwData, dwIOAddress); \
- }
-
-
-#define PCAvDelayByIO(uDelayUnit) { \
- unsigned char byData; \
- unsigned long ii; \
+#define PCBvInPortB(dwIOAddress, pbyData) \
+do { \
+ *(pbyData) = inb(dwIOAddress); \
+} while (0)
+
+#define PCBvInPortW(dwIOAddress, pwData) \
+do { \
+ *(pwData) = inw(dwIOAddress); \
+} while (0)
+
+#define PCBvInPortD(dwIOAddress, pdwData) \
+do { \
+ *(pdwData) = inl(dwIOAddress); \
+} while (0)
+
+#define PCBvOutPortB(dwIOAddress, byData) \
+ outb(byData, dwIOAddress)
+
+#define PCBvOutPortW(dwIOAddress, wData) \
+ outw(wData, dwIOAddress)
+
+#define PCBvOutPortD(dwIOAddress, dwData) \
+ outl(dwData, dwIOAddress)
+
+#define PCAvDelayByIO(uDelayUnit) \
+do { \
+ unsigned char byData; \
+ unsigned long ii; \
\
- if (uDelayUnit <= 50) { \
- udelay(uDelayUnit); \
- } \
- else { \
- for (ii = 0; ii < (uDelayUnit); ii++) \
- byData = inb(0x61); \
- } \
- }
+ if (uDelayUnit <= 50) { \
+ udelay(uDelayUnit); \
+ } else { \
+ for (ii = 0; ii < (uDelayUnit); ii++) \
+ byData = inb(0x61); \
+ } \
+} while (0)
/*--------------------- Export Classes ----------------------------*/