diff options
| author | Mark Brown <broonie@linaro.org> | 2013-06-07 16:19:58 +0100 |
|---|---|---|
| committer | Mark Brown <broonielinaro.org> | 2013-06-10 13:50:44 +0100 |
| commit | 9c24b1672283644adf871244771ebf387dd73f90 (patch) | |
| tree | 750c4e266d74faa1d837b69a46d036e9ddbdbc37 /sound/soc/codecs/wm8962.c | |
| parent | d74e9e7090aeb9b61e683e5abf7ca70fa18f846b (diff) | |
ASoC: wm8962: Restore device state after reset in runtime resume
After the device has been reset we need to repeat the same
initialisation we do on probe to make sure that the device is in
a known state.
Tested-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/wm8962.c')
| -rw-r--r-- | sound/soc/codecs/wm8962.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 26219ea2bbb5..7a7a0567e547 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -3756,6 +3756,21 @@ static int wm8962_runtime_resume(struct device *dev) wm8962_reset(wm8962); + /* SYSCLK defaults to on; make sure it is off so we can safely + * write to registers if the device is declocked. + */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA, 0); + + /* Ensure we have soft control over all registers */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); + + /* Ensure that the oscillator and PLLs are disabled */ + regmap_update_bits(wm8962->regmap, WM8962_PLL2, + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, + 0); + regcache_sync(wm8962->regmap); return 0; |