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author | Anssi Hannula <anssi.hannula@bitwise.fi> | 2017-02-13 13:46:41 +0200 |
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committer | Sasha Levin <alexander.levin@verizon.com> | 2017-03-06 17:31:14 -0500 |
commit | 1c12c2f761072fb1e8a2dd938339feb2dd33be80 (patch) | |
tree | 7b0ed734834a22d160c5803ebe635c5580d44524 /kernel | |
parent | f5a7ecc0663f870a44895f08e627adc49c0b5cdf (diff) |
mmc: core: fix multi-bit bus width without high-speed mode
[ Upstream commit 3d4ef329757cfd5e0b23cce97cdeca7e2df89c99 ]
Commit 577fb13199b1 ("mmc: rework selection of bus speed mode")
refactored bus width selection code to mmc_select_bus_width().
However, it also altered the behavior to not call the selection code in
non-high-speed modes anymore.
This causes 1-bit mode to always be used when the high-speed mode is not
enabled, even though 4-bit and 8-bit bus are valid bus widths in the
backwards-compatibility (legacy) mode as well (see e.g. 5.3.2 Bus Speed
Modes in JEDEC 84-B50). This results in a significant regression in
transfer speeds.
Fix the code to allow 4-bit and 8-bit widths even without high-speed
mode, as before.
Tested with a Zynq-7000 PicoZed 7020 board.
Fixes: 577fb13199b1 ("mmc: rework selection of bus speed mode")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: <stable@vger.kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions