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authorJuergen Beisert <juergen@kreuzholzen.de>2008-07-06 18:17:23 +0300
committerAdrian Bunk <bunk@kernel.org>2008-07-14 21:08:34 +0300
commit69731ebbb3d2283c2c33a2bf262d785e2362b876 (patch)
treef9751db28a4245f781fc611fbc063ebff8a9704d /include/asm-x86_64
parent8b828b3c8e88d9c462f5389654c84aae3e42392e (diff)
downloadlinux-linaro-stable-69731ebbb3d2283c2c33a2bf262d785e2362b876.tar.gz
x86: Replace NSC/Cyrix specific chipset access macros by inlined functions.
Due to index register access ordering problems, when using macros a line like this fails (and does nothing): setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); With inlined functions this line will work as expected. Note about a side effect: Seems on Geode GX1 based systems the "suspend on halt power saving feature" was never enabled due to this wrong macro expansion. With inlined functions it will be enabled, but this will stop the TSC when the CPU runs into a HLT instruction. Kernel output something like this: Clocksource tsc unstable (delta = -472746897 ns) This is the 3rd version of this patch. - Adding missed arch/i386/kernel/cpu/mtrr/state.c Thanks to Andres Salomon - Adding some big fat comments into the new header file Suggested by Andi Kleen AK: fixed x86-64 compilation Adrian Bunk: Added workaround for x86_64 compilation. Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'include/asm-x86_64')
-rw-r--r--include/asm-x86_64/processor-cyrix.h2
-rw-r--r--include/asm-x86_64/processor.h11
2 files changed, 2 insertions, 11 deletions
diff --git a/include/asm-x86_64/processor-cyrix.h b/include/asm-x86_64/processor-cyrix.h
new file mode 100644
index 000000000000..f31e73e4fb96
--- /dev/null
+++ b/include/asm-x86_64/processor-cyrix.h
@@ -0,0 +1,2 @@
+#include <asm-i386/processor-cyrix.h>
+
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 8c8d88c036ed..88d6bd086008 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -431,17 +431,6 @@ static inline void prefetchw(void *x)
#define CX86_ARR_BASE 0xc4
#define CX86_RCR_BASE 0xdc
-/*
- * NSC/Cyrix CPU indexed register access macros
- */
-
-#define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
-
-#define setCx86(reg, data) do { \
- outb((reg), 0x22); \
- outb((data), 0x23); \
-} while (0)
-
static inline void serialize_cpu(void)
{
__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");