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authorLinus Torvalds <torvalds@linux-foundation.org>2012-08-25 11:45:04 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-08-25 11:45:04 -0700
commit2432cbe4f29fbb8d349e481695ac6e88b884bacb (patch)
tree80079d639d2937d44b201a812e742fdc030376c1 /drivers/spi
parent8497ae61d0e7f30ae9f20c5fcea94c957b6c3b83 (diff)
parenta1dca315ce3f78347bca8ce8befe3cc71ae63b7e (diff)
downloadlinux-linaro-stable-2432cbe4f29fbb8d349e481695ac6e88b884bacb.tar.gz
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "Random fixes across the MIPS tree. The two hotspots are several bugs in the module loader and the ath79 SOC support; also noteworthy is the restructuring of the code to synchronize CPU timers across CPUs on startup; the old code recently ceased to work due to unrelated changes. All except one of these patches have sat for a significant time in linux-next for testing." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module MIPS: Malta: Delete duplicate PCI fixup. MIPS: ath79: don't hardcode the unavailability of the DSP ASE MIPS: Synchronize MIPS count one CPU at a time MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348. MIPS: Module: Deal with malformed HI16/LO16 relocation sequences. MIPS: Fix race condition in module relocation code. MIPS: Fix memory leak in error path of HI16/LO16 relocation handling. MIPS: MTX-1: Add udelay to mtx1_pci_idsel MIPS: ath79: select HAVE_CLK MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240 MIPS: ath79: Fix number of GPIO lines for AR724[12] MIPS: Octeon: Fix broken interrupt controller code.
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-bcm63xx.c31
1 files changed, 26 insertions, 5 deletions
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c
index ea0aaa3f13d0..a9f4049c6769 100644
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -47,6 +47,8 @@ struct bcm63xx_spi {
/* Platform data */
u32 speed_hz;
unsigned fifo_size;
+ unsigned int msg_type_shift;
+ unsigned int msg_ctl_width;
/* Data buffers */
const unsigned char *tx_ptr;
@@ -221,13 +223,20 @@ static unsigned int bcm63xx_txrx_bufs(struct spi_device *spi,
msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
if (t->rx_buf && t->tx_buf)
- msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
+ msg_ctl |= (SPI_FD_RW << bs->msg_type_shift);
else if (t->rx_buf)
- msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT);
+ msg_ctl |= (SPI_HD_R << bs->msg_type_shift);
else if (t->tx_buf)
- msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT);
-
- bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
+ msg_ctl |= (SPI_HD_W << bs->msg_type_shift);
+
+ switch (bs->msg_ctl_width) {
+ case 8:
+ bcm_spi_writeb(bs, msg_ctl, SPI_MSG_CTL);
+ break;
+ case 16:
+ bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
+ break;
+ }
/* Issue the transfer */
cmd = SPI_CMD_START_IMMEDIATE;
@@ -406,9 +415,21 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
master->transfer_one_message = bcm63xx_spi_transfer_one;
master->mode_bits = MODEBITS;
bs->speed_hz = pdata->speed_hz;
+ bs->msg_type_shift = pdata->msg_type_shift;
+ bs->msg_ctl_width = pdata->msg_ctl_width;
bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
bs->rx_io = (const u8 *)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
+ switch (bs->msg_ctl_width) {
+ case 8:
+ case 16:
+ break;
+ default:
+ dev_err(dev, "unsupported MSG_CTL width: %d\n",
+ bs->msg_ctl_width);
+ goto out_clk_disable;
+ }
+
/* Initialize hardware */
clk_enable(bs->clk);
bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);