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authorBen Hutchings <bhutchings@solarflare.com>2009-08-26 08:17:19 +0000
committerDavid S. Miller <davem@davemloft.net>2009-08-26 17:38:54 -0700
commit5afaa753d681c437419e3dd9b532c2712dd1d2ea (patch)
treecaf3dc892f20ae1ce7603df97fefdb739d100892 /drivers/net/sfc
parent771046d7b1def64c00a5a47ca48526cbbacd7fe3 (diff)
sfc: QT2025C: Use hard reset only
At probe time, falcon_reset_hw() performs a hard reset of the PHY along with Falcon. There is no need to perform a soft reset later, and any access to standard MDIO registers before the PHY firmware has booted can interrupt the boot process, making the port unusable. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc')
-rw-r--r--drivers/net/sfc/xfp_phy.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/net/sfc/xfp_phy.c b/drivers/net/sfc/xfp_phy.c
index bb2e6afd0829..e6b3d5eaddba 100644
--- a/drivers/net/sfc/xfp_phy.c
+++ b/drivers/net/sfc/xfp_phy.c
@@ -97,23 +97,24 @@ static int qt2025c_wait_reset(struct efx_nic *efx)
return 0;
}
-/* Reset the PHYXS MMD. This is documented (for the Quake PHYs) as doing
- * a complete soft reset.
- */
static int xfp_reset_phy(struct efx_nic *efx)
{
int rc;
- rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
- XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
- XFP_RESET_WAIT);
- if (rc < 0)
- goto fail;
-
if (efx->phy_type == PHY_TYPE_QT2025C) {
+ /* Wait for the reset triggered by falcon_reset_hw()
+ * to complete */
rc = qt2025c_wait_reset(efx);
if (rc < 0)
goto fail;
+ } else {
+ /* Reset the PHYXS MMD. This is documented as doing
+ * a complete soft reset. */
+ rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
+ XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
+ XFP_RESET_WAIT);
+ if (rc < 0)
+ goto fail;
}
/* Wait 250ms for the PHY to complete bootup */