diff options
| author | hayeswang <hayeswang@realtek.com> | 2014-07-11 16:25:57 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-07-11 14:32:54 -0700 |
| commit | bdfa4ed68187c436caee8adc1ef1d4b0d75ca0ae (patch) | |
| tree | 1ff9cae7de987c407655cbeb68b70d4dbd3b1c4e /drivers/net/ethernet/realtek | |
| parent | 5888d3fc45facf13c51b7c056778ac8424a057f3 (diff) | |
r8169: use Giant Send
Replace large send with giant send for TSO for RTL8111C and later ICs.
The large send setting of the RTL8111DP is different from the other
chips. However, the giant send setting is the same for all the chips
which support it. Use the giant send to synchronize the settings.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/realtek')
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 6b7e21a8da57..e5a0bdbfbb2b 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -626,6 +626,10 @@ enum rtl_tx_desc_bit_0 { /* 8102e, 8168c and beyond. */ enum rtl_tx_desc_bit_1 { + /* First doubleword. */ + TD1_GTSENV4 = (1 << 26), /* Giant Send for IPv4 */ +#define GTTCPHO_SHIFT 18 + /* Second doubleword. */ #define TD1_MSS_SHIFT 18 /* MSS position (11 bits) */ TD1_IP_CS = (1 << 29), /* Calculate IP checksum */ @@ -5941,10 +5945,12 @@ static bool rtl8169_tso_csum_v1(struct rtl8169_private *tp, static bool rtl8169_tso_csum_v2(struct rtl8169_private *tp, struct sk_buff *skb, u32 *opts) { + u32 transport_offset = (u32)skb_transport_offset(skb); u32 mss = skb_shinfo(skb)->gso_size; if (mss) { - opts[0] |= TD_LSO; + opts[0] |= TD1_GTSENV4; + opts[0] |= transport_offset << GTTCPHO_SHIFT; opts[1] |= min(mss, TD_MSS_MAX) << TD1_MSS_SHIFT; } else if (skb->ip_summed == CHECKSUM_PARTIAL) { const struct iphdr *ip = ip_hdr(skb); |