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authorEmil Tantilov <emil.s.tantilov@intel.com>2011-11-04 06:43:23 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-01-02 17:43:44 -0800
commit176f950d310c81b7fafd96aabe53704f778ce269 (patch)
tree305b8b00fa2e925a20b1f354b735a7c10a57e7ad /drivers/net/ethernet/intel
parent52f33af8ac479259f77abab6c535dac93ce654e8 (diff)
downloadlinux-linaro-stable-176f950d310c81b7fafd96aabe53704f778ce269.tar.gz
ixgbe: add write flush in ixgbe_clock_out_i2c_byte()
I2C access is timing critical. Always do a write flush after writing to the I2CCTL register. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index 8b113e3f16f5..7cf1e1f56c69 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -1457,6 +1457,7 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)
i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
i2cctl |= IXGBE_I2C_DATA_OUT;
IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, i2cctl);
+ IXGBE_WRITE_FLUSH(hw);
return status;
}