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authorAlexander Duyck <alexander.h.duyck@intel.com>2012-05-11 08:32:55 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-07-17 03:07:18 -0700
commit5f3600ebe252aa5fe782e9f9115c66c639f62ac0 (patch)
tree8d6e909f1f46095bdff0892330b15e9b714c67d4 /drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
parentfa71ae270a9af0ee3a1bd605d008f750371cfc1f (diff)
downloadlinux-linaro-stable-5f3600ebe252aa5fe782e9f9115c66c639f62ac0.tar.gz
ixgbevf: Use igb style interrupt masks instead of ixgbe style
The interrupt registers accessed in ixgbevf are more similar to the igb style registers than they are to the ixgbe style registers. As such we would be better off setting up the code for the EICS, EIMS, EICS, EIAM, and EIAC like we do in igb instead of ixgbe. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbevf/ixgbevf.h')
-rw-r--r--drivers/net/ethernet/intel/ixgbevf/ixgbevf.h29
1 files changed, 23 insertions, 6 deletions
diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h b/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
index 8bedd0fef0b7..f92daca249f8 100644
--- a/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
+++ b/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
@@ -118,6 +118,8 @@ struct ixgbevf_ring {
struct ixgbevf_ring_container {
struct ixgbevf_ring *ring; /* pointer to linked list of rings */
+ unsigned int total_bytes; /* total bytes processed this int */
+ unsigned int total_packets; /* total packets processed this int */
u8 count; /* total number of rings in vector */
u8 itr; /* current ITR setting for ring */
};
@@ -131,13 +133,25 @@ struct ixgbevf_ring_container {
*/
struct ixgbevf_q_vector {
struct ixgbevf_adapter *adapter;
+ u16 v_idx; /* index of q_vector within array, also used for
+ * finding the bit in EICR and friends that
+ * represents the vector for this ring */
+ u16 itr; /* Interrupt throttle rate written to EITR */
struct napi_struct napi;
struct ixgbevf_ring_container rx, tx;
- u32 eitr;
- int v_idx; /* vector index in list */
char name[IFNAMSIZ + 9];
};
+/*
+ * microsecond values for various ITR rates shifted by 2 to fit itr register
+ * with the first 3 bits reserved 0
+ */
+#define IXGBE_MIN_RSC_ITR 24
+#define IXGBE_100K_ITR 40
+#define IXGBE_20K_ITR 200
+#define IXGBE_10K_ITR 400
+#define IXGBE_8K_ITR 500
+
/* Helper macros to switch between ints/sec and what the register uses.
* And yes, it's the same math going both ways. The lowest value
* supported by all of the ixgbe hardware is 8.
@@ -176,12 +190,16 @@ struct ixgbevf_adapter {
struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
/* Interrupt Throttle Rate */
- u32 itr_setting;
+ u16 rx_itr_setting;
+ u16 tx_itr_setting;
+
+ /* interrupt masks */
+ u32 eims_enable_mask;
+ u32 eims_other;
/* TX */
struct ixgbevf_ring *tx_ring; /* One per active queue */
int num_tx_queues;
- u16 tx_itr_setting;
u64 restart_queue;
u64 hw_csum_tx_good;
u64 lsc_int;
@@ -192,7 +210,6 @@ struct ixgbevf_adapter {
/* RX */
struct ixgbevf_ring *rx_ring; /* One per active queue */
int num_rx_queues;
- u16 rx_itr_setting;
u64 hw_csum_rx_error;
u64 hw_rx_no_dma_resources;
u64 hw_csum_rx_good;
@@ -265,7 +282,7 @@ extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
struct ixgbevf_ring *);
extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
-
+void ixgbevf_write_eitr(struct ixgbevf_q_vector *);
extern int ethtool_ioctl(struct ifreq *ifr);
extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);