diff options
| author | Don Skidmore <donald.c.skidmore@intel.com> | 2014-02-27 20:32:40 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-02-28 12:40:56 -0500 |
| commit | 1f86c983bebbb226b69f986bdc7b8b4299a2004c (patch) | |
| tree | a9fb146dd2b1fa90347403914b1432379a8b855b /drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | |
| parent | bc861959103cb5ca43157db6ddb83d1e17e9c38a (diff) | |
ixgbe: fix to use correct timeout interval for memory read completion
Currently we were just always polling for a hard coded 80 ms and not
respecting the system-wide timeout interval. Since up until now all
devices have been tested with this 80ms value we continue to use this
value as a hard minimum.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_type.h')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h index 9283cffd1b57..245819d7ec15 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -1854,8 +1854,19 @@ enum { #define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80 #define IXGBE_PCI_DEVICE_CONTROL2_16ms 0x0005 +#define IXGBE_PCIDEVCTRL2_TIMEO_MASK 0xf +#define IXGBE_PCIDEVCTRL2_16_32ms_def 0x0 +#define IXGBE_PCIDEVCTRL2_50_100us 0x1 +#define IXGBE_PCIDEVCTRL2_1_2ms 0x2 +#define IXGBE_PCIDEVCTRL2_16_32ms 0x5 +#define IXGBE_PCIDEVCTRL2_65_130ms 0x6 +#define IXGBE_PCIDEVCTRL2_260_520ms 0x9 +#define IXGBE_PCIDEVCTRL2_1_2s 0xa +#define IXGBE_PCIDEVCTRL2_4_8s 0xd +#define IXGBE_PCIDEVCTRL2_17_34s 0xe + /* Number of 100 microseconds we wait for PCI Express master disable */ -#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800 +#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800 /* RAH */ #define IXGBE_RAH_VIND_MASK 0x003C0000 |