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authorJacob Keller <jacob.e.keller@intel.com>2012-05-01 05:24:58 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-09 22:48:51 -0700
commit3a6a4edaa59273fabbc96832ca6f50116b3160fb (patch)
tree647d97fb0c556fd973cc3f001b98fea06d9226f1 /drivers/net/ethernet/intel/ixgbe/Makefile
parent44b82dded19be8f09d0fee373f395935cef79c41 (diff)
downloadlinux-linaro-stable-3a6a4edaa59273fabbc96832ca6f50116b3160fb.tar.gz
ixgbe: Hardware Timestamping + PTP Hardware Clock (PHC)
This patch enables hardware timestamping for use with PTP software by extracting a ns counter from an arbitrary fixed point cycles counter. The hardware generates SYSTIME registers using the DMA tick which changes based on the current link speed. These SYSTIME registers are converted to ns using the cyclecounter and timecounter structures provided by the kernel. Using the SO_TIMESTAMPING api, software can enable and access timestamps for PTP packets. The SO_TIMESTAMPING API has space for 3 different kinds of timestamps, SYS, RAW, and SOF. SYS hardware timestamps are hardware ns values that are then scaled to the software clock. RAW hardware timestamps are the direct raw value of the ns counter. SOF software timestamps are the software timestamp calculated as close as possible to the software transmit, but are not offloaded to the hardware. This patch only supports the RAW hardware timestamps due to inefficiency of the SYS design. This patch also enables the PHC subsystem features for atomically adjusting the cycle register, and adjusting the clock frequency in parts per billion. This frequency adjustment works by slightly adjusting the value added to the cycle registers each DMA tick. This causes the hardware registers to overflow rapidly (approximately once every 34 seconds, when at 10gig link). To solve this, the timecounter structure is used, along with a timer set for every 25 seconds. This allows for detecting register overflow and converting the cycle counter registers into ns values needed for providing useful timestamps to the network stack. Only the basic required clock functions are supported at this time, although the hardware supports some ancillary features and these could easily be enabled in the future. Note that use of this hardware timestamping requires modifying daemon software to use the SO_TIMESTAMPING API for timestamps, and the ptp_clock PHC framework for accessing the clock. The timestamps have no relation to the system time at all, so software must use the posix clock generated by the PHC framework instead. Signed-off-by: Jacob E Keller <jacob.e.keller@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/Makefile')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/Makefile2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/Makefile b/drivers/net/ethernet/intel/ixgbe/Makefile
index 0708d7eb4668..0bdf06bc5c49 100644
--- a/drivers/net/ethernet/intel/ixgbe/Makefile
+++ b/drivers/net/ethernet/intel/ixgbe/Makefile
@@ -39,4 +39,6 @@ ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
ixgbe_dcb_82599.o ixgbe_dcb_nl.o
+ixgbe-$(CONFIG_IXGBE_PTP) += ixgbe_ptp.o
+
ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o