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authorDaniel Kurtz <djkurtz@chromium.org>2012-07-24 14:13:58 +0200
committerJean Delvare <khali@endymion.delvare>2012-07-24 14:13:58 +0200
commitedbeea63839cf0ea169c3e0737d49a96b2ca8388 (patch)
tree0b62790ab16a4a7e0d081695036645786c906237 /drivers/i2c/busses
parent70a1cc1952355404a5746c88757f5a444df52b04 (diff)
downloadlinux-linaro-stable-edbeea63839cf0ea169c3e0737d49a96b2ca8388.tar.gz
i2c-i801: Rename some SMBHSTCNT bit constants
Rename the SMBHSTCNT register bit access constants to match the style of other register bits. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/i2c-i801.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 40a50f780972..016fa22f1351 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -102,9 +102,6 @@
#define SMBAUXCTL_CRC 1
#define SMBAUXCTL_E32B 2
-/* kill bit for SMBHSTCNT */
-#define SMBHSTCNT_KILL 2
-
/* Other settings */
#define MAX_RETRIES 400
#define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
@@ -117,9 +114,13 @@
#define I801_PROC_CALL 0x10 /* unimplemented */
#define I801_BLOCK_DATA 0x14
#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
-#define I801_LAST_BYTE 0x20
-#define I801_START 0x40
-#define I801_PEC_EN 0x80 /* ICH3 and later */
+
+/* I801 Host Control register bits */
+#define SMBHSTCNT_INTREN 0x01
+#define SMBHSTCNT_KILL 0x02
+#define SMBHSTCNT_LAST_BYTE 0x20
+#define SMBHSTCNT_START 0x40
+#define SMBHSTCNT_PEC_EN 0x80 /* ICH3 and later */
/* I801 Hosts Status register bits */
#define SMBHSTSTS_BYTE_DONE 0x80
@@ -271,7 +272,7 @@ static int i801_transaction(struct i801_priv *priv, int xact)
/* the current contents of SMBHSTCNT can be overwritten, since PEC,
* INTREN, SMBSCMD are passed in xact */
- outb_p(xact | I801_START, SMBHSTCNT(priv));
+ outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
/* We will always wait for a fraction of a second! */
do {
@@ -323,7 +324,7 @@ static int i801_block_transaction_by_block(struct i801_priv *priv,
}
status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
- I801_PEC_EN * hwpec);
+ (hwpec ? SMBHSTCNT_PEC_EN : 0));
if (status)
return status;
@@ -374,11 +375,11 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
for (i = 1; i <= len; i++) {
if (i == len && read_write == I2C_SMBUS_READ)
- smbcmd |= I801_LAST_BYTE;
+ smbcmd |= SMBHSTCNT_LAST_BYTE;
outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
if (i == 1)
- outb_p(inb(SMBHSTCNT(priv)) | I801_START,
+ outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
SMBHSTCNT(priv));
/* We will always wait for a fraction of a second! */