diff options
| author | Gaurav K Singh <gaurav.k.singh@intel.com> | 2014-12-04 10:58:48 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-04 12:21:58 +0100 |
| commit | 8f4d2683b02ad8059bf1861acef64c022b9d5ce6 (patch) | |
| tree | 541c02f5ed128a8208c21f7b6f2ccd5035885f26 /drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | |
| parent | 5505a244901f28e21d7267246511a1ca2ce79bcc (diff) | |
drm/i915: Added port as parameter to the functions which does read/write of DSI Controller
This patch is in preparation of DSI dual link panels. For dual link
panels, few packets needs to be sent to Port A or Port C or both. Based
on the portno from MIPI Sequence Block#53, these sequences needs to be
sent accordingly.
v2: Addressed review comments by Jani
- port variables named properly
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi_panel_vbt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c index f6bdd44069ce..7766c420f6b4 100644 --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c @@ -94,16 +94,23 @@ static struct gpio_table gtable[] = { { GPIO_NC_11_PCONF0, GPIO_NC_11_PAD, 0} }; +static inline enum port intel_dsi_seq_port_to_port(u8 port) +{ + return port ? PORT_C : PORT_A; +} + static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data) { - u8 type, byte, mode, vc, port; + u8 type, byte, mode, vc, seq_port; u16 len; + enum port port; byte = *data++; mode = (byte >> MIPI_TRANSFER_MODE_SHIFT) & 0x1; vc = (byte >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 0x3; - port = (byte >> MIPI_PORT_SHIFT) & 0x3; + seq_port = (byte >> MIPI_PORT_SHIFT) & 0x3; + port = intel_dsi_seq_port_to_port(seq_port); /* LP or HS mode */ intel_dsi->hs = mode; @@ -115,13 +122,13 @@ static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data) switch (type) { case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: - dsi_vc_generic_write_0(intel_dsi, vc); + dsi_vc_generic_write_0(intel_dsi, vc, port); break; case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: - dsi_vc_generic_write_1(intel_dsi, vc, *data); + dsi_vc_generic_write_1(intel_dsi, vc, *data, port); break; case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM: - dsi_vc_generic_write_2(intel_dsi, vc, *data, *(data + 1)); + dsi_vc_generic_write_2(intel_dsi, vc, *data, *(data + 1), port); break; case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM: case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM: @@ -129,19 +136,19 @@ static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data) DRM_DEBUG_DRIVER("Generic Read not yet implemented or used\n"); break; case MIPI_DSI_GENERIC_LONG_WRITE: - dsi_vc_generic_write(intel_dsi, vc, data, len); + dsi_vc_generic_write(intel_dsi, vc, data, len, port); break; case MIPI_DSI_DCS_SHORT_WRITE: - dsi_vc_dcs_write_0(intel_dsi, vc, *data); + dsi_vc_dcs_write_0(intel_dsi, vc, *data, port); break; case MIPI_DSI_DCS_SHORT_WRITE_PARAM: - dsi_vc_dcs_write_1(intel_dsi, vc, *data, *(data + 1)); + dsi_vc_dcs_write_1(intel_dsi, vc, *data, *(data + 1), port); break; case MIPI_DSI_DCS_READ: DRM_DEBUG_DRIVER("DCS Read not yet implemented or used\n"); break; case MIPI_DSI_DCS_LONG_WRITE: - dsi_vc_dcs_write(intel_dsi, vc, data, len); + dsi_vc_dcs_write(intel_dsi, vc, data, len, port); break; } |