diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-11-02 21:23:06 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-04 00:28:08 +0100 |
| commit | 470b23f7308dd2af25bd075d14a724f8ccd93985 (patch) | |
| tree | 04a244bd2c9ea12022246cdb9fba835deb8617f8 /drivers/dma/omap-dma.c | |
| parent | 49ae0b29439446cff81c32bf01fb7b7cce195373 (diff) | |
dmaengine: omap-dma: consolidate clearing channel status register
Consolidate clearing of the channel status register, rather than open
coding the same functionality in two places.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/dma/omap-dma.c')
| -rw-r--r-- | drivers/dma/omap-dma.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index 324f4c7c5dd0..d1641aa9d113 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c @@ -169,6 +169,14 @@ static void omap_dma_desc_free(struct virt_dma_desc *vd) kfree(container_of(vd, struct omap_desc, vd)); } +static void omap_dma_clear_csr(struct omap_chan *c) +{ + if (dma_omap1()) + c->plat->dma_read(CSR, c->dma_ch); + else + c->plat->dma_write(~0, CSR, c->dma_ch); +} + static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) { struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); @@ -191,11 +199,7 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) } else if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS) c->plat->dma_write(c->dma_ch, CLNK_CTRL, c->dma_ch); - /* Clear CSR */ - if (dma_omap1()) - c->plat->dma_read(CSR, c->dma_ch); - else - c->plat->dma_write(~0, CSR, c->dma_ch); + omap_dma_clear_csr(c); /* Enable interrupts */ c->plat->dma_write(d->cicr, CICR, c->dma_ch); @@ -214,11 +218,7 @@ static void omap_dma_stop(struct omap_chan *c) /* disable irq */ c->plat->dma_write(0, CICR, c->dma_ch); - /* Clear CSR */ - if (dma_omap1()) - c->plat->dma_read(CSR, c->dma_ch); - else - c->plat->dma_write(~0, CSR, c->dma_ch); + omap_dma_clear_csr(c); val = c->plat->dma_read(CCR, c->dma_ch); if (od->plat->errata & DMA_ERRATA_i541 && val & CCR_TRIGGER_SRC) { |