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authorJoel Fernandes <joelf@ti.com>2013-10-29 17:37:38 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2013-10-30 12:02:59 +0800
commit8ed49c7675e106bc23f34ac065d8add75e0e2f45 (patch)
tree862bb3ad3fa9e03d1c821e1e443db6b992a394ed /drivers/crypto
parent718249d7f0657a5edec0131afbfb0d28fbf03e46 (diff)
downloadlinux-linaro-stable-8ed49c7675e106bc23f34ac065d8add75e0e2f45.tar.gz
crypto: omap-aes - Fix CTR mode counter length
NIST vectors for CTR mode in testmgr.h assume the entire IV as the counter. To get correct results that match the output of these vectors, we need to set the counter length correctly. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/omap-aes.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index e1e58d0ed550..a9ccbf14096e 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -275,7 +275,7 @@ static int omap_aes_write_ctrl(struct omap_aes_dev *dd)
if (dd->flags & FLAGS_CBC)
val |= AES_REG_CTRL_CBC;
if (dd->flags & FLAGS_CTR) {
- val |= AES_REG_CTRL_CTR | AES_REG_CTRL_CTR_WIDTH_32;
+ val |= AES_REG_CTRL_CTR | AES_REG_CTRL_CTR_WIDTH_128;
mask = AES_REG_CTRL_CTR | AES_REG_CTRL_CTR_WIDTH_MASK;
}
if (dd->flags & FLAGS_ENCRYPT)