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| author | Arnd Bergmann <arnd@arndb.de> | 2015-06-01 17:54:31 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-06-01 17:54:31 +0200 |
| commit | c9531b4f1535f88fd82e45d1ffbfa61dbee26fb6 (patch) | |
| tree | 236d15d1d1baad66a338ab4db659c8bd07359a5e /drivers/bus | |
| parent | 4fd8a5a5ac6bc042d9de8847e6b8e9182b9c566c (diff) | |
| parent | b35d2e561ea711626749fcb511637f0e4604ff18 (diff) | |
Merge tag 'arm-soc/for-4.2/soc-part2' of http://github.com/broadcom/stblinux into next/soc
Merge "changes for Broadcom SoCs":
- Dan fixes an error path in the BCM63xx SMP code
- Ray adds the relevant Kconfig selects to enable the Broadcom NAND driver on Cygnus
- Kevin provides a change to the Broadcom GISB arbiter driver to make it work with
MIPS-based big-endian STB SoCs (this was a long-standing change that had dependencies on
code in drivers/of/*)
- Gregory enables the use of GPIOLIB for brcmstb SoCs and bumps the number of GPIOs for
these platforms
* tag 'arm-soc/for-4.2/soc-part2' of http://github.com/broadcom/stblinux:
ARM: brcmstb: Add default gpio number
ARM: brcmstb: Select ARCH_WANT_OPTIONAL_GPIOLIB
bus: brcmstb_gisb: Honor the "big-endian" and "native-endian" DT properties
ARM: BCM: Enable NAND support for iProc SoCs
ARM: BCM63xx: fix an error path in bcm63xx_pmb_power_on_cpu()
Diffstat (limited to 'drivers/bus')
| -rw-r--r-- | drivers/bus/brcmstb_gisb.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c index 738612c45266..f364fa4d24eb 100644 --- a/drivers/bus/brcmstb_gisb.c +++ b/drivers/bus/brcmstb_gisb.c @@ -91,6 +91,7 @@ static const int gisb_offsets_bcm7445[] = { struct brcmstb_gisb_arb_device { void __iomem *base; const int *gisb_offsets; + bool big_endian; struct mutex lock; struct list_head next; u32 valid_mask; @@ -108,7 +109,10 @@ static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) if (offset == -1) return 1; - return ioread32(gdev->base + offset); + if (gdev->big_endian) + return ioread32be(gdev->base + offset); + else + return ioread32(gdev->base + offset); } static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) @@ -117,7 +121,11 @@ static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) if (offset == -1) return; - iowrite32(val, gdev->base + reg); + + if (gdev->big_endian) + iowrite32be(val, gdev->base + reg); + else + iowrite32(val, gdev->base + reg); } static ssize_t gisb_arb_get_timeout(struct device *dev, @@ -296,6 +304,7 @@ static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) return -EINVAL; } gdev->gisb_offsets = of_id->data; + gdev->big_endian = of_device_is_big_endian(dn); err = devm_request_irq(&pdev->dev, timeout_irq, brcmstb_gisb_timeout_handler, 0, pdev->name, |