aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2008-10-29 12:33:34 +0000
committerRalf Baechle <ralf@linux-mips.org>2008-10-30 14:44:34 +0000
commit558ce12494e9e0321b77b9f1ef62c16d0b893cf5 (patch)
treeb8ebd80ade7f49e43aed728766cb85691aecdf2e /arch
parentba3049ed4086737dab200b6087138a4b8e06915d (diff)
downloadlinux-linaro-stable-558ce12494e9e0321b77b9f1ef62c16d0b893cf5.tar.gz
MIPS: Probe for watch registers on cores of all vendors, not just MTI.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: David Daney <ddaney@caviumnetworks.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/cpu-probe.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 0cf15457ecac..41a1d07b4750 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -652,21 +652,24 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
static void __cpuinit decode_configs(struct cpuinfo_mips *c)
{
+ int ok;
+
/* MIPS32 or MIPS64 compliant CPU. */
c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
c->scache.flags = MIPS_CACHE_NOT_PRESENT;
- /* Read Config registers. */
- if (!decode_config0(c))
- return; /* actually worth a panic() */
- if (!decode_config1(c))
- return;
- if (!decode_config2(c))
- return;
- if (!decode_config3(c))
- return;
+ ok = decode_config0(c); /* Read Config registers. */
+ BUG_ON(!ok); /* Arch spec violation! */
+ if (ok)
+ ok = decode_config1(c);
+ if (ok)
+ ok = decode_config2(c);
+ if (ok)
+ ok = decode_config3(c);
+
+ mips_probe_watch_registers(c);
}
#ifdef CONFIG_CPU_MIPSR2
@@ -678,7 +681,6 @@ static inline void spram_config(void) {}
static inline void cpu_probe_mips(struct cpuinfo_mips *c)
{
decode_configs(c);
- mips_probe_watch_registers(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_4KC:
c->cputype = CPU_4KC;