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authorAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:27:58 -0500
committerAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:27:58 -0500
commitd05f06e60df4f56a70fb8a3e46335b40687169e9 (patch)
treec1eec6749fed86a21b08606e1e4acefe4b033253 /arch/xtensa/include/asm/mmu_context.h
parent0af1c5300db31f25a412e6e83d42b1747d56c9de (diff)
parent1d72d9f83df057e71c7951def41138a0230bf737 (diff)
Merge branch 'arch-frv' into no-rebases
Diffstat (limited to 'arch/xtensa/include/asm/mmu_context.h')
-rw-r--r--arch/xtensa/include/asm/mmu_context.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/mmu_context.h b/arch/xtensa/include/asm/mmu_context.h
index dbd8731a876a..feb10af96519 100644
--- a/arch/xtensa/include/asm/mmu_context.h
+++ b/arch/xtensa/include/asm/mmu_context.h
@@ -51,14 +51,14 @@ extern unsigned long asid_cache;
static inline void set_rasid_register (unsigned long val)
{
- __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
+ __asm__ __volatile__ (" wsr %0, rasid\n\t"
" isync\n" : : "a" (val));
}
static inline unsigned long get_rasid_register (void)
{
unsigned long tmp;
- __asm__ __volatile__ (" rsr %0,"__stringify(RASID)"\n\t" : "=a" (tmp));
+ __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp));
return tmp;
}