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author | Alex Shi <alex.shi@linaro.org> | 2016-03-21 10:08:20 +0800 |
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committer | Alex Shi <alex.shi@linaro.org> | 2016-03-21 10:08:20 +0800 |
commit | 8cea869f71490e9e08b53e34dec030da2518bb3e (patch) | |
tree | 70f29f8bb38cf5218bac5e64931912ce1a7476cd /arch/x86/kvm/vmx.c | |
parent | 5af6a242945e39bf6ea39716d4eba316b735dce8 (diff) | |
parent | 70e00db9eb8ffc4dcaf5f035ec6a4440ba428794 (diff) |
Merge branch 'linux-linaro-lsk-v3.14' into linux-linaro-lsk-v3.14-androidlsk-v3.14-16.03-androidlinux-linaro-lsk-v3.14-android
Diffstat (limited to 'arch/x86/kvm/vmx.c')
-rw-r--r-- | arch/x86/kvm/vmx.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 8b75f5f90a96..abc64844b06e 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1555,6 +1555,13 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, return; } break; + case MSR_IA32_PEBS_ENABLE: + /* PEBS needs a quiescent period after being disabled (to write + * a record). Disabling PEBS through VMX MSR swapping doesn't + * provide that period, so a CPU could write host's record into + * guest's memory. + */ + wrmsrl(MSR_IA32_PEBS_ENABLE, 0); } for (i = 0; i < m->nr; ++i) |