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authorKevin Hilman <khilman@linaro.org>2015-09-14 14:21:39 -0700
committerKevin Hilman <khilman@linaro.org>2015-09-14 14:21:39 -0700
commitf249a14dd1b6b341e7b5e29b64c0edae6e13b7f5 (patch)
treee5b53c75e42b5ac0d9b8feac65ce4b7a1b2a17bd /arch/sparc/lib/VISsave.S
parent48cf795880b441a6c59cd840d0475fac7fdffd87 (diff)
parent0c5c1f1a4f991ee015da85cce6d2d9f9c9380b4f (diff)
Merge tag 'v4.1.7' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into linux-linaro-lsk-v4.1lsk-v4.1-15.09
This is the 4.1.7 stable release * tag 'v4.1.7' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (165 commits) Linux 4.1.7 ARM: 8405/1: VDSO: fix regression with toolchains lacking ld.bfd executable x86/idle: Restore trace_cpu_idle to mwait_idle() calls x86/apic: Fix fallout from x2apic cleanup x86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC arm64: perf: fix unassigned cpu_pmu->plat_device when probing PMU PPIs arm64: KVM: Fix host crash when injecting a fault into a 32bit guest fnic: Use the local variable instead of I/O flag to acquire io_req_lock in fnic_queuecommand() to avoid deadloack Add factory recertified Crucial M500s to blacklist can: pcan_usb: don't provide CAN FD bittimings by non-FD adapters SCSI: Fix NULL pointer dereference in runtime PM genirq: Introduce irq_chip_set_type_parent() helper genirq: Don't return ENOSYS in irq_chip_retrigger_hierarchy ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism irqchip/crossbar: Restore set_wake functionality irqchip/crossbar: Restore the mask on suspend behaviour irqchip/crossbar: Restore the irq_set_type() mechanism 9p: ensure err is initialized to 0 in p9_client_read/write drm/i915: Avoid TP3 on CHV drm/i915: remove HBR2 from chv supported list ...
Diffstat (limited to 'arch/sparc/lib/VISsave.S')
-rw-r--r--arch/sparc/lib/VISsave.S67
1 files changed, 2 insertions, 65 deletions
diff --git a/arch/sparc/lib/VISsave.S b/arch/sparc/lib/VISsave.S
index b320ae9e2e2e..a063d84336d6 100644
--- a/arch/sparc/lib/VISsave.S
+++ b/arch/sparc/lib/VISsave.S
@@ -44,9 +44,8 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3
stx %g3, [%g6 + TI_GSR]
2: add %g6, %g1, %g3
- cmp %o5, FPRS_DU
- be,pn %icc, 6f
- sll %g1, 3, %g1
+ mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5
+ sll %g1, 3, %g1
stb %o5, [%g3 + TI_FPSAVED]
rd %gsr, %g2
add %g6, %g1, %g3
@@ -80,65 +79,3 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3
.align 32
80: jmpl %g7 + %g0, %g0
nop
-
-6: ldub [%g3 + TI_FPSAVED], %o5
- or %o5, FPRS_DU, %o5
- add %g6, TI_FPREGS+0x80, %g2
- stb %o5, [%g3 + TI_FPSAVED]
-
- sll %g1, 5, %g1
- add %g6, TI_FPREGS+0xc0, %g3
- wr %g0, FPRS_FEF, %fprs
- membar #Sync
- stda %f32, [%g2 + %g1] ASI_BLK_P
- stda %f48, [%g3 + %g1] ASI_BLK_P
- membar #Sync
- ba,pt %xcc, 80f
- nop
-
- .align 32
-80: jmpl %g7 + %g0, %g0
- nop
-
- .align 32
-VISenterhalf:
- ldub [%g6 + TI_FPDEPTH], %g1
- brnz,a,pn %g1, 1f
- cmp %g1, 1
- stb %g0, [%g6 + TI_FPSAVED]
- stx %fsr, [%g6 + TI_XFSR]
- clr %o5
- jmpl %g7 + %g0, %g0
- wr %g0, FPRS_FEF, %fprs
-
-1: bne,pn %icc, 2f
- srl %g1, 1, %g1
- ba,pt %xcc, vis1
- sub %g7, 8, %g7
-2: addcc %g6, %g1, %g3
- sll %g1, 3, %g1
- andn %o5, FPRS_DU, %g2
- stb %g2, [%g3 + TI_FPSAVED]
-
- rd %gsr, %g2
- add %g6, %g1, %g3
- stx %g2, [%g3 + TI_GSR]
- add %g6, %g1, %g2
- stx %fsr, [%g2 + TI_XFSR]
- sll %g1, 5, %g1
-3: andcc %o5, FPRS_DL, %g0
- be,pn %icc, 4f
- add %g6, TI_FPREGS, %g2
-
- add %g6, TI_FPREGS+0x40, %g3
- membar #Sync
- stda %f0, [%g2 + %g1] ASI_BLK_P
- stda %f16, [%g3 + %g1] ASI_BLK_P
- membar #Sync
- ba,pt %xcc, 4f
- nop
-
- .align 32
-4: and %o5, FPRS_DU, %o5
- jmpl %g7 + %g0, %g0
- wr %o5, FPRS_FEF, %fprs