diff options
| author | Kevin Hilman <khilman@linaro.org> | 2015-09-14 14:20:05 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2015-09-14 14:20:05 -0700 |
| commit | de5cfb5acd63d7f86bd60dc4a578519fe4831bca (patch) | |
| tree | 166fde342fc3aaf31e6498d448dc4af5dc400ec9 /arch/sparc/include/asm/visasm.h | |
| parent | 6c5cc590aee3a2602edfa907120e6c1f6d0dc0e4 (diff) | |
| parent | c765e5c15e7d23d2b8b37fafdafc63c0ea75fabf (diff) | |
Merge branch 'linux-linaro-lsk-v3.14' into linux-linaro-lsk-v3.14-androidlsk-v3.14-15.09-android
* linux-linaro-lsk-v3.14: (66 commits)
Linux 3.14.52
arm64: KVM: Fix host crash when injecting a fault into a 32bit guest
SCSI: Fix NULL pointer dereference in runtime PM
arm64/mm: Remove hack in mmap randomize layout
crypto: caam - fix memory corruption in ahash_final_ctx
regmap: regcache-rbtree: Clean new present bits on present bitmap resize
libfc: Fix fc_fcp_cleanup_each_cmd()
libfc: Fix fc_exch_recv_req() error path
drm/vmwgfx: Fix execbuf locking issues
drm/radeon: add new OLAND pci id
EDAC, ppc4xx: Access mci->csrows array elements properly
localmodconfig: Use Kbuild files too
dm thin metadata: delete btrees when releasing metadata snapshot
perf: Fix PERF_EVENT_IOC_PERIOD migration race
perf: Fix fasync handling on inherited events
xen-blkfront: don't add indirect pages to list when !feature_persistent
mm/hwpoison: fix page refcount of unknown non LRU page
ipc/sem.c: update/correct memory barriers
ipc,sem: fix use after free on IPC_RMID after a task using same semaphore set exits
arm64: el0_dbg does not set link reg for return to user path, breaks debug
...
Diffstat (limited to 'arch/sparc/include/asm/visasm.h')
| -rw-r--r-- | arch/sparc/include/asm/visasm.h | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/arch/sparc/include/asm/visasm.h b/arch/sparc/include/asm/visasm.h index 11fdf0ef50bb..50d6f16a1513 100644 --- a/arch/sparc/include/asm/visasm.h +++ b/arch/sparc/include/asm/visasm.h @@ -28,16 +28,10 @@ * Must preserve %o5 between VISEntryHalf and VISExitHalf */ #define VISEntryHalf \ - rd %fprs, %o5; \ - andcc %o5, FPRS_FEF, %g0; \ - be,pt %icc, 297f; \ - sethi %hi(298f), %g7; \ - sethi %hi(VISenterhalf), %g1; \ - jmpl %g1 + %lo(VISenterhalf), %g0; \ - or %g7, %lo(298f), %g7; \ - clr %o5; \ -297: wr %o5, FPRS_FEF, %fprs; \ -298: + VISEntry + +#define VISExitHalf \ + VISExit #define VISEntryHalfFast(fail_label) \ rd %fprs, %o5; \ @@ -47,7 +41,7 @@ ba,a,pt %xcc, fail_label; \ 297: wr %o5, FPRS_FEF, %fprs; -#define VISExitHalf \ +#define VISExitHalfFast \ wr %o5, 0, %fprs; #ifndef __ASSEMBLY__ |