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authorAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:28:43 -0500
committerAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:28:43 -0500
commit2bf81c8af92dd53890557c5d87875842d573a3e9 (patch)
tree83e7e3539599b091ac69557658c06c0a39cfa60e /arch/sparc/include/asm/processor_64.h
parent9526d9bc23f362035cfabf044aa90f4ed1787955 (diff)
parent5f6c4ab6ee781c9aace7c8548ad9bd87f5678df7 (diff)
Merge branch 'arch-microblaze' into no-rebases
Diffstat (limited to 'arch/sparc/include/asm/processor_64.h')
-rw-r--r--arch/sparc/include/asm/processor_64.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 0305d56d9b1a..cce72ce4c334 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -203,7 +203,22 @@ extern unsigned long get_wchan(struct task_struct *task);
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
-#define cpu_relax() barrier()
+/* Please see the commentary in asm/backoff.h for a description of
+ * what these instructions are doing and how they have been choosen.
+ * To make a long story short, we are trying to yield the current cpu
+ * strand during busy loops.
+ */
+#define cpu_relax() asm volatile("\n99:\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ ".section .pause_3insn_patch,\"ax\"\n\t"\
+ ".word 99b\n\t" \
+ "wr %%g0, 128, %%asr27\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ ".previous" \
+ ::: "memory")
/* Prefetch support. This is tuned for UltraSPARC-III and later.
* UltraSPARC-I will treat these as nops, and UltraSPARC-II has