diff options
| author | Sam Ravnborg <sam@ravnborg.org> | 2008-07-27 23:00:59 +0200 |
|---|---|---|
| committer | Sam Ravnborg <sam@ravnborg.org> | 2008-07-27 23:00:59 +0200 |
| commit | a439fe51a1f8eb087c22dd24d69cebae4a3addac (patch) | |
| tree | e32d1fa97a220ab598d8ab364205817c5bf2bd6f /arch/sparc/include/asm/lsu.h | |
| parent | 837b41b5de356aa67abb2cadb5eef3efc7776f91 (diff) | |
sparc, sparc64: use arch/sparc/include
The majority of this patch was created by the following script:
***
ASM=arch/sparc/include/asm
mkdir -p $ASM
git mv include/asm-sparc64/ftrace.h $ASM
git rm include/asm-sparc64/*
git mv include/asm-sparc/* $ASM
sed -ie 's/asm-sparc64/asm/g' $ASM/*
sed -ie 's/asm-sparc/asm/g' $ASM/*
***
The rest was an update of the top-level Makefile to use sparc
for header files when sparc64 is being build.
And a small fixlet to pick up the correct unistd.h from
sparc64 code.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'arch/sparc/include/asm/lsu.h')
| -rw-r--r-- | arch/sparc/include/asm/lsu.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/lsu.h b/arch/sparc/include/asm/lsu.h new file mode 100644 index 000000000000..7190f8de90a0 --- /dev/null +++ b/arch/sparc/include/asm/lsu.h @@ -0,0 +1,19 @@ +#ifndef _SPARC64_LSU_H +#define _SPARC64_LSU_H + +#include <linux/const.h> + +/* LSU Control Register */ +#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/ +#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/ +#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/ +#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/ +#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/ +#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/ +#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */ +#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */ +#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */ +#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */ +#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/ + +#endif /* !(_SPARC64_LSU_H) */ |