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authorSylvain Munaut <tnt@246tNt.com>2006-03-26 13:37:38 +0200
committerPaul Mackerras <paulus@samba.org>2006-03-27 14:48:58 +1100
commitf8dd311982c86141f4f2fd326c0edf0c2d9fd97b (patch)
tree474af7852e393a112456127b1185e84f1b7b57ab /arch/ppc
parent5931c4350059ce9bd5fe398b628c478753a11e44 (diff)
[PATCH] ppc32: Adds support for the LITE5200B dev board
ppc32: Adds support for the LITE5200B dev board This LITE5200B devboard is the new development board for the Freescale MPC5200 processor. It has two PCI slots and so a different PCI IRQ routing. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/Kconfig7
-rw-r--r--arch/ppc/platforms/lite5200.c33
2 files changed, 37 insertions, 3 deletions
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 3a3e302b4ea2..75802ca0f8c7 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -715,6 +715,13 @@ config LITE5200
much but it's only been tested on this board version. I think this
board is also known as IceCube.
+config LITE5200B
+ bool "Freescale LITE5200B"
+ depends LITE5200
+ help
+ Support for the LITE5200B dev board for the MPC5200 from Freescale.
+ This is the new board with 2 PCI slots.
+
config MPC834x_SYS
bool "Freescale MPC834x SYS"
help
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index 5171b53bccb5..d91efe1dc2d1 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -34,6 +34,7 @@
#include <asm/mpc52xx.h>
#include <asm/ppc_sys.h>
#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
#include <syslib/mpc52xx_pci.h>
@@ -68,12 +69,32 @@ lite5200_show_cpuinfo(struct seq_file *m)
}
#ifdef CONFIG_PCI
+#ifdef CONFIG_LITE5200B
+static int
+lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,
+ unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},
+ {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},
+ };
+
+ const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+#else /* Original Lite */
static int
lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
}
#endif
+#endif
static void __init
lite5200_setup_cpu(void)
@@ -127,11 +148,17 @@ lite5200_setup_cpu(void)
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
- /* IRQ[0-3] setup : IRQ0 - Level Active Low */
- /* IRQ[1-3] - Level Active High */
+ /* IRQ[0-3] setup */
intr_ctrl = in_be32(&intr->ctrl);
intr_ctrl &= ~0x00ff0000;
- intr_ctrl |= 0x00c00000;
+#ifdef CONFIG_LITE5200B
+ /* IRQ[0-3] Level Active Low */
+ intr_ctrl |= 0x00ff0000;
+#else
+ /* IRQ0 Level Active Low
+ * IRQ[1-3] Level Active High */
+ intr_ctrl |= 0x00c00000;
+#endif
out_be32(&intr->ctrl, intr_ctrl);
/* Unmap reg zone */