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authorPaul Mackerras <paulus@samba.org>2008-06-09 14:01:46 +1000
committerPaul Mackerras <paulus@samba.org>2008-06-10 21:40:22 +1000
commit917f0af9e5a9ceecf9e72537fabb501254ba321d (patch)
tree1ef207755c6d83ce4af93ef2b5e4645eebd65886 /arch/ppc
parent0f3d6bcd391b058c619fc30e8022e8a29fbf4bef (diff)
downloadlinux-linaro-stable-917f0af9e5a9ceecf9e72537fabb501254ba321d.tar.gz
powerpc: Remove arch/ppc and include/asm-ppc
All the maintained platforms are now in arch/powerpc, so the old arch/ppc stuff can now go away. Acked-by: Adrian Bunk <bunk@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Becky Bruce <becky.bruce@freescale.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jochen Friedrich <jochen@scram.de> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Sean MacLennan <smaclennan@pikatech.com> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/.gitignore1
-rw-r--r--arch/ppc/4xx_io/Makefile6
-rw-r--r--arch/ppc/4xx_io/serial_sicc.c2005
-rw-r--r--arch/ppc/8260_io/Kconfig65
-rw-r--r--arch/ppc/8260_io/Makefile6
-rw-r--r--arch/ppc/8260_io/enet.c865
-rw-r--r--arch/ppc/8260_io/fcc_enet.c2379
-rw-r--r--arch/ppc/8xx_io/Kconfig134
-rw-r--r--arch/ppc/8xx_io/Makefile9
-rw-r--r--arch/ppc/8xx_io/commproc.c432
-rw-r--r--arch/ppc/8xx_io/enet.c982
-rw-r--r--arch/ppc/8xx_io/fec.c1983
-rw-r--r--arch/ppc/8xx_io/micropatch.c743
-rw-r--r--arch/ppc/Kconfig1186
-rw-r--r--arch/ppc/Kconfig.debug66
-rw-r--r--arch/ppc/Makefile135
-rw-r--r--arch/ppc/boot/Makefile37
-rw-r--r--arch/ppc/boot/common/Makefile10
-rw-r--r--arch/ppc/boot/common/bootinfo.c68
-rw-r--r--arch/ppc/boot/common/crt0.S80
-rw-r--r--arch/ppc/boot/common/misc-common.c555
-rw-r--r--arch/ppc/boot/common/ns16550.c103
-rw-r--r--arch/ppc/boot/common/serial_stub.c21
-rw-r--r--arch/ppc/boot/common/string.S150
-rw-r--r--arch/ppc/boot/common/util.S293
-rw-r--r--arch/ppc/boot/images/.gitignore6
-rw-r--r--arch/ppc/boot/images/Makefile34
-rw-r--r--arch/ppc/boot/include/cpc700.h26
-rw-r--r--arch/ppc/boot/include/iso_font.h257
-rw-r--r--arch/ppc/boot/include/mpc10x.h63
-rw-r--r--arch/ppc/boot/include/mpsc_defs.h146
-rw-r--r--arch/ppc/boot/include/nonstdio.h34
-rw-r--r--arch/ppc/boot/include/of1275.h42
-rw-r--r--arch/ppc/boot/include/rs6000.h243
-rw-r--r--arch/ppc/boot/include/serial.h46
-rw-r--r--arch/ppc/boot/ld.script85
-rw-r--r--arch/ppc/boot/lib/.gitignore3
-rw-r--r--arch/ppc/boot/lib/Makefile23
-rw-r--r--arch/ppc/boot/lib/div64.S58
-rw-r--r--arch/ppc/boot/lib/kbd.c248
-rw-r--r--arch/ppc/boot/lib/vreset.c805
-rw-r--r--arch/ppc/boot/of1275/Makefile6
-rw-r--r--arch/ppc/boot/of1275/call_prom.c74
-rw-r--r--arch/ppc/boot/of1275/claim.c92
-rw-r--r--arch/ppc/boot/of1275/enter.c22
-rw-r--r--arch/ppc/boot/of1275/exit.c24
-rw-r--r--arch/ppc/boot/of1275/finddevice.c16
-rw-r--r--arch/ppc/boot/of1275/getprop.c37
-rw-r--r--arch/ppc/boot/of1275/map.c48
-rw-r--r--arch/ppc/boot/of1275/ofinit.c27
-rw-r--r--arch/ppc/boot/of1275/ofstdio.c32
-rw-r--r--arch/ppc/boot/of1275/read.c35
-rw-r--r--arch/ppc/boot/of1275/release.c30
-rw-r--r--arch/ppc/boot/of1275/write.c35
-rw-r--r--arch/ppc/boot/simple/Makefile277
-rw-r--r--arch/ppc/boot/simple/chrpmap.c12
-rw-r--r--arch/ppc/boot/simple/clear.S19
-rw-r--r--arch/ppc/boot/simple/cpc700_memory.c34
-rw-r--r--arch/ppc/boot/simple/dummy.c4
-rw-r--r--arch/ppc/boot/simple/embed_config.c938
-rw-r--r--arch/ppc/boot/simple/head.S137
-rw-r--r--arch/ppc/boot/simple/iic.c214
-rw-r--r--arch/ppc/boot/simple/m8260_tty.c325
-rw-r--r--arch/ppc/boot/simple/m8xx_tty.c289
-rw-r--r--arch/ppc/boot/simple/misc-chestnut.c32
-rw-r--r--arch/ppc/boot/simple/misc-cpci690.c65
-rw-r--r--arch/ppc/boot/simple/misc-embedded.c276
-rw-r--r--arch/ppc/boot/simple/misc-ev64260.c54
-rw-r--r--arch/ppc/boot/simple/misc-ev64360.c42
-rw-r--r--arch/ppc/boot/simple/misc-katana.c42
-rw-r--r--arch/ppc/boot/simple/misc-mv64x60.c85
-rw-r--r--arch/ppc/boot/simple/misc-prep.c209
-rw-r--r--arch/ppc/boot/simple/misc-radstone_ppc7d.c24
-rw-r--r--arch/ppc/boot/simple/misc-spruce.c271
-rw-r--r--arch/ppc/boot/simple/misc.c278
-rw-r--r--arch/ppc/boot/simple/mpc10x_memory.c109
-rw-r--r--arch/ppc/boot/simple/mpc52xx_tty.c137
-rw-r--r--arch/ppc/boot/simple/mv64x60_tty.c364
-rw-r--r--arch/ppc/boot/simple/openbios.c128
-rw-r--r--arch/ppc/boot/simple/pci.c274
-rw-r--r--arch/ppc/boot/simple/pibs.c104
-rw-r--r--arch/ppc/boot/simple/prepmap.c12
-rw-r--r--arch/ppc/boot/simple/qspan_pci.c269
-rw-r--r--arch/ppc/boot/simple/relocate.S213
-rw-r--r--arch/ppc/boot/simple/rw4/ppc_40x.h664
-rw-r--r--arch/ppc/boot/simple/rw4/rw4_init.S78
-rw-r--r--arch/ppc/boot/simple/rw4/rw4_init_brd.S1125
-rw-r--r--arch/ppc/boot/simple/rw4/stb.h239
-rw-r--r--arch/ppc/boot/simple/uartlite_tty.c45
-rw-r--r--arch/ppc/boot/utils/.gitignore3
-rw-r--r--arch/ppc/boot/utils/elf.pl33
-rw-r--r--arch/ppc/boot/utils/mkbugboot.c147
-rw-r--r--arch/ppc/boot/utils/mkprep.c241
-rw-r--r--arch/ppc/boot/utils/mktree.c152
-rw-r--r--arch/ppc/configs/FADS_defconfig520
-rw-r--r--arch/ppc/configs/IVMS8_defconfig548
-rw-r--r--arch/ppc/configs/TQM823L_defconfig521
-rw-r--r--arch/ppc/configs/TQM8260_defconfig499
-rw-r--r--arch/ppc/configs/TQM850L_defconfig521
-rw-r--r--arch/ppc/configs/TQM860L_defconfig549
-rw-r--r--arch/ppc/configs/bamboo_defconfig944
-rw-r--r--arch/ppc/configs/bseip_defconfig517
-rw-r--r--arch/ppc/configs/bubinga_defconfig592
-rw-r--r--arch/ppc/configs/chestnut_defconfig794
-rw-r--r--arch/ppc/configs/cpci405_defconfig631
-rw-r--r--arch/ppc/configs/cpci690_defconfig798
-rw-r--r--arch/ppc/configs/ebony_defconfig585
-rw-r--r--arch/ppc/configs/ep405_defconfig572
-rw-r--r--arch/ppc/configs/est8260_defconfig491
-rw-r--r--arch/ppc/configs/ev64260_defconfig758
-rw-r--r--arch/ppc/configs/ev64360_defconfig817
-rw-r--r--arch/ppc/configs/hdpu_defconfig890
-rw-r--r--arch/ppc/configs/katana_defconfig948
-rw-r--r--arch/ppc/configs/lite5200_defconfig436
-rw-r--r--arch/ppc/configs/lopec_defconfig814
-rw-r--r--arch/ppc/configs/luan_defconfig668
-rw-r--r--arch/ppc/configs/mbx_defconfig512
-rw-r--r--arch/ppc/configs/ml300_defconfig739
-rw-r--r--arch/ppc/configs/ml403_defconfig740
-rw-r--r--arch/ppc/configs/mvme5100_defconfig746
-rw-r--r--arch/ppc/configs/ocotea_defconfig599
-rw-r--r--arch/ppc/configs/pplus_defconfig720
-rw-r--r--arch/ppc/configs/prep_defconfig1679
-rw-r--r--arch/ppc/configs/prpmc750_defconfig594
-rw-r--r--arch/ppc/configs/prpmc800_defconfig656
-rw-r--r--arch/ppc/configs/radstone_ppc7d_defconfig991
-rw-r--r--arch/ppc/configs/redwood5_defconfig557
-rw-r--r--arch/ppc/configs/redwood6_defconfig535
-rw-r--r--arch/ppc/configs/rpx8260_defconfig555
-rw-r--r--arch/ppc/configs/rpxcllf_defconfig582
-rw-r--r--arch/ppc/configs/rpxlite_defconfig581
-rw-r--r--arch/ppc/configs/sandpoint_defconfig737
-rw-r--r--arch/ppc/configs/spruce_defconfig577
-rw-r--r--arch/ppc/configs/sycamore_defconfig663
-rw-r--r--arch/ppc/configs/taishan_defconfig1077
-rw-r--r--arch/ppc/configs/walnut_defconfig578
-rw-r--r--arch/ppc/kernel/Makefile21
-rw-r--r--arch/ppc/kernel/asm-offsets.c164
-rw-r--r--arch/ppc/kernel/cpu_setup_power4.S197
-rw-r--r--arch/ppc/kernel/entry.S960
-rw-r--r--arch/ppc/kernel/head.S1220
-rw-r--r--arch/ppc/kernel/head_44x.S769
-rw-r--r--arch/ppc/kernel/head_4xx.S1021
-rw-r--r--arch/ppc/kernel/head_8xx.S959
-rw-r--r--arch/ppc/kernel/head_booke.h308
-rw-r--r--arch/ppc/kernel/machine_kexec.c118
-rw-r--r--arch/ppc/kernel/misc.S868
-rw-r--r--arch/ppc/kernel/pci.c1233
-rw-r--r--arch/ppc/kernel/ppc-stub.c866
-rw-r--r--arch/ppc/kernel/ppc_htab.c464
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c258
-rw-r--r--arch/ppc/kernel/relocate_kernel.S123
-rw-r--r--arch/ppc/kernel/setup.c572
-rw-r--r--arch/ppc/kernel/smp-tbsync.c180
-rw-r--r--arch/ppc/kernel/smp.c414
-rw-r--r--arch/ppc/kernel/softemu8xx.c147
-rw-r--r--arch/ppc/kernel/time.c445
-rw-r--r--arch/ppc/kernel/traps.c826
-rw-r--r--arch/ppc/kernel/vmlinux.lds.S164
-rw-r--r--arch/ppc/lib/Makefile5
-rw-r--r--arch/ppc/lib/checksum.S225
-rw-r--r--arch/ppc/lib/div64.S58
-rw-r--r--arch/ppc/lib/locks.c189
-rw-r--r--arch/ppc/lib/string.S732
-rw-r--r--arch/ppc/mm/44x_mmu.c101
-rw-r--r--arch/ppc/mm/4xx_mmu.c135
-rw-r--r--arch/ppc/mm/Makefile10
-rw-r--r--arch/ppc/mm/fault.c436
-rw-r--r--arch/ppc/mm/hashtable.S617
-rw-r--r--arch/ppc/mm/init.c603
-rw-r--r--arch/ppc/mm/mem_pieces.c162
-rw-r--r--arch/ppc/mm/mem_pieces.h48
-rw-r--r--arch/ppc/mm/mmu_context.c85
-rw-r--r--arch/ppc/mm/mmu_decl.h79
-rw-r--r--arch/ppc/mm/pgtable.c403
-rw-r--r--arch/ppc/mm/ppc_mmu.c269
-rw-r--r--arch/ppc/mm/tlb.c183
-rw-r--r--arch/ppc/platforms/4xx/Kconfig285
-rw-r--r--arch/ppc/platforms/4xx/Makefile31
-rw-r--r--arch/ppc/platforms/4xx/bamboo.c442
-rw-r--r--arch/ppc/platforms/4xx/bamboo.h133
-rw-r--r--arch/ppc/platforms/4xx/bubinga.c265
-rw-r--r--arch/ppc/platforms/4xx/bubinga.h54
-rw-r--r--arch/ppc/platforms/4xx/cpci405.c201
-rw-r--r--arch/ppc/platforms/4xx/cpci405.h28
-rw-r--r--arch/ppc/platforms/4xx/ebony.c334
-rw-r--r--arch/ppc/platforms/4xx/ebony.h97
-rw-r--r--arch/ppc/platforms/4xx/ep405.c196
-rw-r--r--arch/ppc/platforms/4xx/ep405.h52
-rw-r--r--arch/ppc/platforms/4xx/ibm405ep.c141
-rw-r--r--arch/ppc/platforms/4xx/ibm405ep.h145
-rw-r--r--arch/ppc/platforms/4xx/ibm405gp.c120
-rw-r--r--arch/ppc/platforms/4xx/ibm405gp.h148
-rw-r--r--arch/ppc/platforms/4xx/ibm405gpr.c115
-rw-r--r--arch/ppc/platforms/4xx/ibm405gpr.h148
-rw-r--r--arch/ppc/platforms/4xx/ibm440ep.c220
-rw-r--r--arch/ppc/platforms/4xx/ibm440ep.h73
-rw-r--r--arch/ppc/platforms/4xx/ibm440gp.c163
-rw-r--r--arch/ppc/platforms/4xx/ibm440gp.h63
-rw-r--r--arch/ppc/platforms/4xx/ibm440gx.c231
-rw-r--r--arch/ppc/platforms/4xx/ibm440gx.h71
-rw-r--r--arch/ppc/platforms/4xx/ibm440sp.c129
-rw-r--r--arch/ppc/platforms/4xx/ibm440sp.h61
-rw-r--r--arch/ppc/platforms/4xx/ibmnp405h.c170
-rw-r--r--arch/ppc/platforms/4xx/ibmnp405h.h154
-rw-r--r--arch/ppc/platforms/4xx/ibmstb4.c122
-rw-r--r--arch/ppc/platforms/4xx/ibmstb4.h235
-rw-r--r--arch/ppc/platforms/4xx/ibmstbx25.c66
-rw-r--r--arch/ppc/platforms/4xx/ibmstbx25.h258
-rw-r--r--arch/ppc/platforms/4xx/luan.c371
-rw-r--r--arch/ppc/platforms/4xx/luan.h77
-rw-r--r--arch/ppc/platforms/4xx/ocotea.c350
-rw-r--r--arch/ppc/platforms/4xx/ocotea.h94
-rw-r--r--arch/ppc/platforms/4xx/ppc440spe.c146
-rw-r--r--arch/ppc/platforms/4xx/ppc440spe.h63
-rw-r--r--arch/ppc/platforms/4xx/redwood5.c120
-rw-r--r--arch/ppc/platforms/4xx/redwood5.h52
-rw-r--r--arch/ppc/platforms/4xx/redwood6.c156
-rw-r--r--arch/ppc/platforms/4xx/redwood6.h53
-rw-r--r--arch/ppc/platforms/4xx/sycamore.c272
-rw-r--r--arch/ppc/platforms/4xx/sycamore.h49
-rw-r--r--arch/ppc/platforms/4xx/taishan.c395
-rw-r--r--arch/ppc/platforms/4xx/taishan.h67
-rw-r--r--arch/ppc/platforms/4xx/virtex.h35
-rw-r--r--arch/ppc/platforms/4xx/walnut.c246
-rw-r--r--arch/ppc/platforms/4xx/walnut.h52
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml300.c118
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml403.c120
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters.h104
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h310
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h243
-rw-r--r--arch/ppc/platforms/4xx/yucca.c393
-rw-r--r--arch/ppc/platforms/4xx/yucca.h108
-rw-r--r--arch/ppc/platforms/Makefile25
-rw-r--r--arch/ppc/platforms/bseip.h38
-rw-r--r--arch/ppc/platforms/ccm.h27
-rw-r--r--arch/ppc/platforms/chestnut.c574
-rw-r--r--arch/ppc/platforms/chestnut.h127
-rw-r--r--arch/ppc/platforms/cpci690.c453
-rw-r--r--arch/ppc/platforms/cpci690.h74
-rw-r--r--arch/ppc/platforms/est8260.h35
-rw-r--r--arch/ppc/platforms/ev64260.c649
-rw-r--r--arch/ppc/platforms/ev64260.h126
-rw-r--r--arch/ppc/platforms/ev64360.c517
-rw-r--r--arch/ppc/platforms/ev64360.h114
-rw-r--r--arch/ppc/platforms/fads.h130
-rw-r--r--arch/ppc/platforms/hdpu.c1015
-rw-r--r--arch/ppc/platforms/hdpu.h80
-rw-r--r--arch/ppc/platforms/hermes.h26
-rw-r--r--arch/ppc/platforms/ip860.h35
-rw-r--r--arch/ppc/platforms/ivms8.h55
-rw-r--r--arch/ppc/platforms/katana.c902
-rw-r--r--arch/ppc/platforms/katana.h253
-rw-r--r--arch/ppc/platforms/lantec.h20
-rw-r--r--arch/ppc/platforms/lite5200.c245
-rw-r--r--arch/ppc/platforms/lite5200.h21
-rw-r--r--arch/ppc/platforms/lopec.c310
-rw-r--r--arch/ppc/platforms/lopec.h39
-rw-r--r--arch/ppc/platforms/lwmon.h59
-rw-r--r--arch/ppc/platforms/mbx.h117
-rw-r--r--arch/ppc/platforms/mpc866ads_setup.c413
-rw-r--r--arch/ppc/platforms/mvme5100.c340
-rw-r--r--arch/ppc/platforms/mvme5100.h91
-rw-r--r--arch/ppc/platforms/pal4.h40
-rw-r--r--arch/ppc/platforms/pal4_pci.c75
-rw-r--r--arch/ppc/platforms/pal4_serial.h37
-rw-r--r--arch/ppc/platforms/pal4_setup.c173
-rw-r--r--arch/ppc/platforms/pcu_e.h27
-rw-r--r--arch/ppc/platforms/powerpmc250.c378
-rw-r--r--arch/ppc/platforms/powerpmc250.h52
-rw-r--r--arch/ppc/platforms/pplus.c844
-rw-r--r--arch/ppc/platforms/pplus.h65
-rw-r--r--arch/ppc/platforms/prep_pci.c1339
-rw-r--r--arch/ppc/platforms/prep_setup.c1043
-rw-r--r--arch/ppc/platforms/prpmc750.c360
-rw-r--r--arch/ppc/platforms/prpmc750.h95
-rw-r--r--arch/ppc/platforms/prpmc800.c472
-rw-r--r--arch/ppc/platforms/prpmc800.h82
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.c1492
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.h433
-rw-r--r--arch/ppc/platforms/residual.c1034
-rw-r--r--arch/ppc/platforms/rpx8260.h81
-rw-r--r--arch/ppc/platforms/rpxclassic.h114
-rw-r--r--arch/ppc/platforms/rpxlite.h91
-rw-r--r--arch/ppc/platforms/sandpoint.c651
-rw-r--r--arch/ppc/platforms/sandpoint.h75
-rw-r--r--arch/ppc/platforms/sbc82xx.c256
-rw-r--r--arch/ppc/platforms/sbc82xx.h36
-rw-r--r--arch/ppc/platforms/sbs8260.h28
-rw-r--r--arch/ppc/platforms/spruce.c322
-rw-r--r--arch/ppc/platforms/spruce.h71
-rw-r--r--arch/ppc/platforms/tqm8260.h22
-rw-r--r--arch/ppc/platforms/tqm8260_setup.c42
-rw-r--r--arch/ppc/platforms/tqm8xx.h155
-rw-r--r--arch/ppc/syslib/Makefile96
-rw-r--r--arch/ppc/syslib/btext.c860
-rw-r--r--arch/ppc/syslib/cpc700.h96
-rw-r--r--arch/ppc/syslib/cpc700_pic.c181
-rw-r--r--arch/ppc/syslib/cpm2_common.c196
-rw-r--r--arch/ppc/syslib/cpm2_pic.c177
-rw-r--r--arch/ppc/syslib/cpm2_pic.h8
-rw-r--r--arch/ppc/syslib/gen550.h14
-rw-r--r--arch/ppc/syslib/gen550_dbg.c179
-rw-r--r--arch/ppc/syslib/gen550_kgdb.c83
-rw-r--r--arch/ppc/syslib/gt64260_pic.c323
-rw-r--r--arch/ppc/syslib/harrier.c300
-rw-r--r--arch/ppc/syslib/hawk_common.c317
-rw-r--r--arch/ppc/syslib/i8259.c213
-rw-r--r--arch/ppc/syslib/ibm440gp_common.c73
-rw-r--r--arch/ppc/syslib/ibm440gp_common.h32
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c294
-rw-r--r--arch/ppc/syslib/ibm440gx_common.h58
-rw-r--r--arch/ppc/syslib/ibm440sp_common.c68
-rw-r--r--arch/ppc/syslib/ibm440sp_common.h23
-rw-r--r--arch/ppc/syslib/ibm44x_common.c235
-rw-r--r--arch/ppc/syslib/ibm44x_common.h45
-rw-r--r--arch/ppc/syslib/ibm_ocp.c10
-rw-r--r--arch/ppc/syslib/indirect_pci.c134
-rw-r--r--arch/ppc/syslib/m8260_pci_erratum9.c455
-rw-r--r--arch/ppc/syslib/m8260_setup.c266
-rw-r--r--arch/ppc/syslib/m82xx_pci.c346
-rw-r--r--arch/ppc/syslib/m82xx_pci.h92
-rw-r--r--arch/ppc/syslib/m8xx_setup.c465
-rw-r--r--arch/ppc/syslib/m8xx_wdt.c148
-rw-r--r--arch/ppc/syslib/m8xx_wdt.h20
-rw-r--r--arch/ppc/syslib/mpc10x_common.c654
-rw-r--r--arch/ppc/syslib/mpc52xx_devices.c317
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.c289
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.h137
-rw-r--r--arch/ppc/syslib/mpc52xx_pic.c254
-rw-r--r--arch/ppc/syslib/mpc52xx_setup.c313
-rw-r--r--arch/ppc/syslib/mpc52xx_sys.c36
-rw-r--r--arch/ppc/syslib/mpc8xx_devices.c243
-rw-r--r--arch/ppc/syslib/mpc8xx_sys.c61
-rw-r--r--arch/ppc/syslib/mv64360_pic.c423
-rw-r--r--arch/ppc/syslib/mv64x60.c2485
-rw-r--r--arch/ppc/syslib/mv64x60_dbg.c121
-rw-r--r--arch/ppc/syslib/mv64x60_win.c1165
-rw-r--r--arch/ppc/syslib/ocp.c482
-rw-r--r--arch/ppc/syslib/open_pic.c1087
-rw-r--r--arch/ppc/syslib/open_pic2.c710
-rw-r--r--arch/ppc/syslib/open_pic_defs.h287
-rw-r--r--arch/ppc/syslib/pci_auto.c515
-rw-r--r--arch/ppc/syslib/ppc403_pic.c125
-rw-r--r--arch/ppc/syslib/ppc405_pci.c170
-rw-r--r--arch/ppc/syslib/ppc440spe_pcie.c441
-rw-r--r--arch/ppc/syslib/ppc440spe_pcie.h149
-rw-r--r--arch/ppc/syslib/ppc4xx_dma.c710
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c284
-rw-r--r--arch/ppc/syslib/ppc4xx_setup.c271
-rw-r--r--arch/ppc/syslib/ppc4xx_sgdma.c464
-rw-r--r--arch/ppc/syslib/ppc8xx_pic.c126
-rw-r--r--arch/ppc/syslib/ppc8xx_pic.h19
-rw-r--r--arch/ppc/syslib/ppc_sys.c329
-rw-r--r--arch/ppc/syslib/pq2_devices.c393
-rw-r--r--arch/ppc/syslib/pq2_sys.c203
-rw-r--r--arch/ppc/syslib/prep_nvram.c135
-rw-r--r--arch/ppc/syslib/qspan_pci.c380
-rw-r--r--arch/ppc/syslib/todc_time.c511
-rw-r--r--arch/ppc/syslib/virtex_devices.c276
-rw-r--r--arch/ppc/syslib/virtex_devices.h35
-rw-r--r--arch/ppc/syslib/xilinx_pic.c153
-rw-r--r--arch/ppc/xmon/Makefile8
-rw-r--r--arch/ppc/xmon/ansidecl.h141
-rw-r--r--arch/ppc/xmon/nonstdio.h22
-rw-r--r--arch/ppc/xmon/ppc-dis.c190
-rw-r--r--arch/ppc/xmon/ppc-opc.c2720
-rw-r--r--arch/ppc/xmon/ppc.h240
-rw-r--r--arch/ppc/xmon/privinst.h90
-rw-r--r--arch/ppc/xmon/setjmp.c29
-rw-r--r--arch/ppc/xmon/start.c342
-rw-r--r--arch/ppc/xmon/start_8xx.c287
-rw-r--r--arch/ppc/xmon/subr_prf.c55
-rw-r--r--arch/ppc/xmon/xmon.c1780
374 files changed, 0 insertions, 120647 deletions
diff --git a/arch/ppc/.gitignore b/arch/ppc/.gitignore
deleted file mode 100644
index 1e79a0ae4473..000000000000
--- a/arch/ppc/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-/include
diff --git a/arch/ppc/4xx_io/Makefile b/arch/ppc/4xx_io/Makefile
deleted file mode 100644
index 6a8cd575f382..000000000000
--- a/arch/ppc/4xx_io/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile for the linux MPC4xx ppc-specific parts
-#
-
-
-obj-$(CONFIG_SERIAL_SICC) += serial_sicc.o
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c
deleted file mode 100644
index efa0a56e230b..000000000000
--- a/arch/ppc/4xx_io/serial_sicc.c
+++ /dev/null
@@ -1,2005 +0,0 @@
-/*
- * Driver for IBM STB3xxx SICC serial port
- *
- * Based on drivers/char/serial_amba.c, by ARM Ltd.
- *
- * Copyright 2001 IBM Corp.
- * Author: IBM China Research Lab
- * Yudong Yang <yangyud@cn.ibm.com>
- * Yi Ge <geyi@cn.ibm.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *
- * This is a driver for SICC serial port on IBM Redwood 4 evaluation board.
- * The driver support both as a console device and normal serial device and
- * is compatible with normal ttyS* devices.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/capability.h>
-#include <linux/circ_buf.h>
-#include <linux/serial.h>
-#include <linux/console.h>
-#include <linux/sysrq.h>
-#include <linux/bitops.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/serial.h>
-
-
-#include <linux/serialP.h>
-
-
-/* -----------------------------------------------------------------------------
- * From STB03xxx SICC UART Specification
- * -----------------------------------------------------------------------------
- * UART Register Offsets.
- */
-
-#define BL_SICC_LSR 0x0000000 /* line status register read/clear */
-#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */
-#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */
-#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */
-#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */
-#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */
-#define BL_SICC_LCR 0x0000006 /* control register r/w */
-#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */
-#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */
-#define BL_SICC_RBR 0x0000009 /* receive buffer r */
-#define BL_SICC_TBR 0x0000009 /* transmit buffer w */
-#define BL_SICC_CTL2 0x000000A /* added for Vesta */
-#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */
-
-/* masks and definitions for serial port control register */
-
-#define _LCR_LM_MASK 0xc0 /* loop back modes */
-#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */
-#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */
-#define _LCR_DB_MASK 0x08 /* data bits mask */
-#define _LCR_PE_MASK 0x04 /* parity enable */
-#define _LCR_PTY_MASK 0x02 /* parity */
-#define _LCR_SB_MASK 0x01 /* stop bit mask */
-
-#define _LCR_LM_NORM 0x00 /* normal operation */
-#define _LCR_LM_LOOP 0x40 /* internal loopback mode */
-#define _LCR_LM_ECHO 0x80 /* automatic echo mode */
-#define _LCR_LM_RES 0xc0 /* reserved */
-
-#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */
-#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */
-#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */
-#define _LCR_DB_7_BITS 0x00 /* 7 data bits */
-#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */
-#define _LCR_PE_DISABLE 0x00 /* parity disabled */
-#define _LCR_PTY_EVEN 0x00 /* even parity */
-#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */
-#define _LCR_SB_1_BIT 0x00 /* one stop bit */
-#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */
-
-/* serial port handshake register */
-
-#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */
-#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */
-#define _HSR_DIS_ACT 0x00 /* dsr input is active */
-#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */
-#define _HSR_CS_ACT 0x00 /* cts input is active */
-#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */
-
-/* serial port line status register */
-
-#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */
-#define _LSR_FE_MASK 0x40 /* framing error */
-#define _LSR_OE_MASK 0x20 /* overrun error */
-#define _LSR_PE_MASK 0x10 /* parity error */
-#define _LSR_LB_MASK 0x08 /* line break */
-#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */
-#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */
-
-#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */
-#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */
-#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */
-#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */
-#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */
-#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */
-#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */
-#define _LSR_TX_ALL 0x06 /* all physical transmit is done */
-
-#define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \
- _LSR_PE_MASK )
-
-/* serial port receiver command register */
-
-#define _RCR_ER_MASK 0x80 /* enable receiver mask */
-#define _RCR_DME_MASK 0x60 /* dma mode */
-#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */
-#define _RCR_PME_MASK 0x08 /* pause mode mask */
-
-#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */
-#define _RCR_DME_DISABLE 0x00 /* dma disabled */
-#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/
-#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */
-#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */
-#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */
-#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */
-
-/* serial port transmit command register */
-
-#define _TxCR_ET_MASK 0x80 /* transmitter enable mask */
-#define _TxCR_DME_MASK 0x60 /* dma mode mask */
-#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */
-#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */
-#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */
-#define _TxCR_TB_MASK 0x02 /* transmit break mask */
-
-#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmitter enabled */
-#define _TxCR_DME_DISABLE 0x00 /* transmitter disabled, TBR intr disabled */
-#define _TxCR_DME_TBR 0x20 /* transmitter disabled, TBR intr enabled */
-#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */
-#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */
-
-/* serial ctl reg 2 - added for Vesta */
-
-#define _CTL2_EXTERN 0x80 /* */
-#define _CTL2_USEFIFO 0x40 /* */
-#define _CTL2_RESETRF 0x08 /* */
-#define _CTL2_RESETTF 0x04 /* */
-
-
-
-#define SERIAL_SICC_NAME "ttySICC"
-#define SERIAL_SICC_MAJOR 150
-#define SERIAL_SICC_MINOR 1
-#define SERIAL_SICC_NR 1
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/*
- * Things needed by tty driver
- */
-static struct tty_driver *siccnormal_driver;
-
-#if defined(CONFIG_SERIAL_SICC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
-#endif
-
-/*
- * Things needed internally to this driver
- */
-
-/*
- * tmp_buf is used as a temporary buffer by serial_write. We need to
- * lock it in case the copy_from_user blocks while swapping in a page,
- * and some other program tries to do a serial write at the same time.
- * Since the lock will only come under contention when the system is
- * swapping and available memory is low, it makes sense to share one
- * buffer across all the serial ports, since it significantly saves
- * memory if large numbers of serial ports are open.
- */
-static u_char *tmp_buf;
-
-#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
-
-/* number of characters left in xmit buffer before we ask for more */
-#define WAKEUP_CHARS 256
-#define SICC_ISR_PASS_LIMIT 256
-
-#define EVT_WRITE_WAKEUP 0
-
-struct SICC_icount {
- __u32 cts;
- __u32 dsr;
- __u32 rng;
- __u32 dcd;
- __u32 rx;
- __u32 tx;
- __u32 frame;
- __u32 overrun;
- __u32 parity;
- __u32 brk;
- __u32 buf_overrun;
-};
-
-/*
- * Static information about the port
- */
-struct SICC_port {
- unsigned int uart_base;
- unsigned int uart_base_phys;
- unsigned int irqrx;
- unsigned int irqtx;
- unsigned int uartclk;
- unsigned int fifosize;
- unsigned int tiocm_support;
- void (*set_mctrl)(struct SICC_port *, u_int mctrl);
-};
-
-/*
- * This is the state information which is persistent across opens
- */
-struct SICC_state {
- struct SICC_icount icount;
- unsigned int line;
- unsigned int close_delay;
- unsigned int closing_wait;
- unsigned int custom_divisor;
- unsigned int flags;
- int count;
- struct SICC_info *info;
- spinlock_t sicc_lock;
-};
-
-#define SICC_XMIT_SIZE 1024
-/*
- * This is the state information which is only valid when the port is open.
- */
-struct SICC_info {
- struct SICC_port *port;
- struct SICC_state *state;
- struct tty_struct *tty;
- unsigned char x_char;
- unsigned char old_status;
- unsigned char read_status_mask;
- unsigned char ignore_status_mask;
- struct circ_buf xmit;
- unsigned int flags;
-#ifdef SUPPORT_SYSRQ
- unsigned long sysrq;
-#endif
-
- unsigned int event;
- unsigned int timeout;
- unsigned int lcr_h;
- unsigned int mctrl;
- int blocked_open;
-
- struct tasklet_struct tlet;
-
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
- wait_queue_head_t delta_msr_wait;
-};
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
-static struct console siccuart_cons;
-#endif
-static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios);
-static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout);
-
-
-
-static void powerpcMtcic_cr(unsigned long value)
-{
- mtdcr(DCRN_CICCR, value);
-}
-
-static unsigned long powerpcMfcic_cr(void)
-{
- return mfdcr(DCRN_CICCR);
-}
-
-static unsigned long powerpcMfclkgpcr(void)
-{
- return mfdcr(DCRN_SCCR);
-}
-
-static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl)
-{
-}
-
-static struct SICC_port sicc_ports[SERIAL_SICC_NR] = {
- {
- .uart_base = 0,
- .uart_base_phys = SICC0_IO_BASE,
- .irqrx = SICC0_INTRX,
- .irqtx = SICC0_INTTX,
-// .uartclk = 0,
- .fifosize = 1,
- .set_mctrl = sicc_set_mctrl_null,
- }
-};
-
-static struct SICC_state sicc_state[SERIAL_SICC_NR];
-
-static void siccuart_enable_rx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_RCR);
- cr &= ~_RCR_DME_MASK;
- cr |= _RCR_DME_RXRDY;
- writeb(cr, info->port->uart_base+BL_SICC_RCR);
-}
-
-static void siccuart_disable_rx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_RCR);
- cr &= ~_RCR_DME_MASK;
- cr |= _RCR_DME_DISABLE;
- writeb(cr, info->port->uart_base+BL_SICC_RCR);
-}
-
-
-static void siccuart_enable_tx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_TxCR);
- cr &= ~_TxCR_DME_MASK;
- cr |= _TxCR_DME_TBR;
- writeb(cr, info->port->uart_base+BL_SICC_TxCR);
-}
-
-static void siccuart_disable_tx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_TxCR);
- cr &= ~_TxCR_DME_MASK;
- cr |= _TxCR_DME_DISABLE;
- writeb(cr, info->port->uart_base+BL_SICC_TxCR);
-}
-
-
-static void siccuart_stop(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- /* disable interrupts while stopping serial port interrupts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- siccuart_disable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static void siccuart_start(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- /* disable interrupts while starting serial port interrupts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (info->xmit.head != info->xmit.tail
- && info->xmit.buf)
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static void siccuart_event(struct SICC_info *info, int event)
-{
- info->event |= 1 << event;
- tasklet_schedule(&info->tlet);
-}
-
-static void
-siccuart_rx_chars(struct SICC_info *info)
-{
- struct tty_struct *tty = info->tty;
- unsigned int status, ch, rsr, flg, ignored = 0;
- struct SICC_icount *icount = &info->state->icount;
- struct SICC_port *port = info->port;
-
- status = readb(port->uart_base+BL_SICC_LSR );
- while (status & _LSR_RBR_FULL) {
- ch = readb(port->uart_base+BL_SICC_RBR);
-
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- goto ignore_char;
- icount->rx++;
-
- flg = TTY_NORMAL;
-
- /*
- * Note that the error handling code is
- * out of the main execution path
- */
- rsr = readb(port->uart_base+BL_SICC_LSR);
- if (rsr & _LSR_RX_ERR)
- goto handle_error;
-#ifdef SUPPORT_SYSRQ
- if (info->sysrq) {
- if (ch && time_before(jiffies, info->sysrq)) {
- handle_sysrq(ch, NULL);
- info->sysrq = 0;
- goto ignore_char;
- }
- info->sysrq = 0;
- }
-#endif
- error_return:
- *tty->flip.flag_buf_ptr++ = flg;
- *tty->flip.char_buf_ptr++ = ch;
- tty->flip.count++;
- ignore_char:
- status = readb(port->uart_base+BL_SICC_LSR );
- }
-out:
- tty_flip_buffer_push(tty);
- return;
-
-handle_error:
- if (rsr & _LSR_LB_BREAK) {
- rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK);
- icount->brk++;
-
-#ifdef SUPPORT_SYSRQ
- if (info->state->line == siccuart_cons.index) {
- if (!info->sysrq) {
- info->sysrq = jiffies + HZ*5;
- goto ignore_char;
- }
- }
-#endif
- } else if (rsr & _LSR_PE_MASK)
- icount->parity++;
- else if (rsr & _LSR_FE_MASK)
- icount->frame++;
- if (rsr & _LSR_OE_MASK)
- icount->overrun++;
-
- if (rsr & info->ignore_status_mask) {
- if (++ignored > 100)
- goto out;
- goto ignore_char;
- }
- rsr &= info->read_status_mask;
-
- if (rsr & _LSR_LB_BREAK)
- flg = TTY_BREAK;
- else if (rsr & _LSR_PE_MASK)
- flg = TTY_PARITY;
- else if (rsr & _LSR_FE_MASK)
- flg = TTY_FRAME;
-
- if (rsr & _LSR_OE_MASK) {
- /*
- * CHECK: does overrun affect the current character?
- * ASSUMPTION: it does not.
- */
- *tty->flip.flag_buf_ptr++ = flg;
- *tty->flip.char_buf_ptr++ = ch;
- tty->flip.count++;
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- goto ignore_char;
- ch = 0;
- flg = TTY_OVERRUN;
- }
-#ifdef SUPPORT_SYSRQ
- info->sysrq = 0;
-#endif
- goto error_return;
-}
-
-static void siccuart_tx_chars(struct SICC_info *info)
-{
- struct SICC_port *port = info->port;
- int count;
- unsigned char status;
-
-
- if (info->x_char) {
- writeb(info->x_char, port->uart_base+ BL_SICC_TBR);
- info->state->icount.tx++;
- info->x_char = 0;
- return;
- }
- if (info->xmit.head == info->xmit.tail
- || info->tty->stopped
- || info->tty->hw_stopped) {
- siccuart_disable_tx_interrupt(info);
- writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR);
- return;
- }
-
- count = port->fifosize;
- do {
- writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR);
- info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1);
- info->state->icount.tx++;
- if (info->xmit.head == info->xmit.tail)
- break;
- } while (--count > 0);
-
- if (CIRC_CNT(info->xmit.head,
- info->xmit.tail,
- SICC_XMIT_SIZE) < WAKEUP_CHARS)
- siccuart_event(info, EVT_WRITE_WAKEUP);
-
- if (info->xmit.head == info->xmit.tail) {
- siccuart_disable_tx_interrupt(info);
- }
-}
-
-
-static irqreturn_t siccuart_int_rx(int irq, void *dev_id)
-{
- struct SICC_info *info = dev_id;
- siccuart_rx_chars(info)
- return IRQ_HANDLED;
-}
-
-
-static irqreturn_t siccuart_int_tx(int irq, void *dev_id)
-{
- struct SICC_info *info = dev_id;
- siccuart_tx_chars(info);
- return IRQ_HANDLED;
-}
-
-static void siccuart_tasklet_action(unsigned long data)
-{
- struct SICC_info *info = (struct SICC_info *)data;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event))
- return;
-
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
-}
-
-static int siccuart_startup(struct SICC_info *info)
-{
- unsigned long flags;
- unsigned long page;
- int retval = 0;
-
- if (info->flags & ASYNC_INITIALIZED) {
- return 0;
- }
-
- page = get_zeroed_page(GFP_KERNEL);
- if (!page)
- return -ENOMEM;
-
- if (info->port->uart_base == 0)
- info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE);
- if (info->port->uart_base == 0) {
- free_page(page);
- return -ENOMEM;
- }
-
- /* lock access to info while doing setup */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- if (info->xmit.buf)
- free_page(page);
- else
- info->xmit.buf = (unsigned char *) page;
-
-
- info->mctrl = 0;
- if (info->tty->termios->c_cflag & CBAUD)
- info->mctrl = TIOCM_RTS | TIOCM_DTR;
- info->port->set_mctrl(info->port, info->mctrl);
-
- /*
- * initialise the old status of the modem signals
- */
- info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY;
-
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
- info->xmit.head = info->xmit.tail = 0;
-
- /*
- * Set up the tty->alt_speed kludge
- */
- if (info->tty) {
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
- info->tty->alt_speed = 57600;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
- info->tty->alt_speed = 115200;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
- info->tty->alt_speed = 230400;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
- info->tty->alt_speed = 460800;
- }
-
-
- writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA
-
-
- /*
- * and set the speed of the serial port
- */
- siccuart_change_speed(info, 0);
-
- // enable rx/tx ports
- writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR);
- writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR);
-
- readb(info->port->uart_base + BL_SICC_RBR); // clear rx port
-
- writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
-
- /*
- * Finally, enable interrupts
- */
-
- /*
- * Allocate the IRQ
- */
- retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info);
- if (retval) {
- if (capable(CAP_SYS_ADMIN)) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- retval = 0;
- }
- goto errout;
- }
- retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info);
- if (retval) {
- if (capable(CAP_SYS_ADMIN)) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- retval = 0;
- }
- free_irq(info->port->irqrx, info);
- goto errout;
- }
-
- siccuart_enable_rx_interrupt(info);
-
- info->flags |= ASYNC_INITIALIZED;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return 0;
-
-
-errout:
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return retval;
-}
-
-/*
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- */
-static void siccuart_shutdown(struct SICC_info *info)
-{
- unsigned long flags;
-
- if (!(info->flags & ASYNC_INITIALIZED))
- return;
-
- /* lock while shutting down port */
- spin_lock_irqsave(&info->state->sicc_lock,flags); /* Disable interrupts */
-
- /*
- * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
- * here so the queue might never be woken up
- */
- wake_up_interruptible(&info->delta_msr_wait);
-
- /*
- * disable all interrupts, disable the port
- */
- siccuart_disable_rx_interrupt(info);
- siccuart_disable_tx_interrupt(info);
-
- /*
- * Free the IRQ
- */
- free_irq(info->port->irqtx, info);
- free_irq(info->port->irqrx, info);
-
- if (info->xmit.buf) {
- unsigned long pg = (unsigned long) info->xmit.buf;
- info->xmit.buf = NULL;
- free_page(pg);
- }
-
-
- if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
- info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS);
- info->port->set_mctrl(info->port, info->mctrl);
-
- /* kill off our tasklet */
- tasklet_kill(&info->tlet);
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
-
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-
-static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios)
-{
- unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits;
- unsigned long flags;
-
- if (!info->tty || !info->tty->termios)
- return;
-
- cflag = info->tty->termios->c_cflag;
-
- pr_debug("siccuart_set_cflag(0x%x) called\n", cflag);
- /* byte size and parity */
- switch (cflag & CSIZE) {
- case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break;
- default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8
- }
- if (cflag & CSTOPB) {
- lcr_h |= _LCR_SB_2_BIT;
- bits ++;
- }
- if (cflag & PARENB) {
- lcr_h |= _LCR_PE_ENABLE;
- bits++;
- if (!(cflag & PARODD))
- lcr_h |= _LCR_PTY_ODD;
- else
- lcr_h |= _LCR_PTY_EVEN;
- }
-
- do {
- /* Determine divisor based on baud rate */
- baud = tty_get_baud_rate(info->tty);
- if (!baud)
- baud = 9600;
-
-
- {
- // here is ppc403SetBaud(com_port, baud);
- unsigned long divisor, clockSource, temp;
-
- /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
- powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
-
- /* Determine Internal Baud Clock Frequency */
- /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
- /* SCCR (Serial Clock Control Register) on Vesta */
- temp = powerpcMfclkgpcr();
-
- if(temp & 0x00000080) {
- clockSource = 324000000;
- }
- else {
- clockSource = 216000000;
- }
- clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
- divisor = clockSource/(16*baud) - 1;
- /* divisor has only 12 bits of resolution */
- if(divisor>0x00000FFF){
- divisor=0x00000FFF;
- }
-
- quot = divisor;
- }
-
- if (baud == 38400 &&
- ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST))
- quot = info->state->custom_divisor;
-
- if (!quot && old_termios) {
- info->tty->termios->c_cflag &= ~CBAUD;
- info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
- old_termios = NULL;
- }
- } while (quot == 0 && old_termios);
-
- /* As a last resort, if the quotient is zero, default to 9600 bps */
- if (!quot)
- quot = (info->port->uartclk / (16 * 9600)) - 1;
-
- info->timeout = info->port->fifosize * HZ * bits / baud;
- info->timeout += HZ/50; /* Add .02 seconds of slop */
-
- if (cflag & CRTSCTS)
- info->flags |= ASYNC_CTS_FLOW;
- else
- info->flags &= ~ASYNC_CTS_FLOW;
- if (cflag & CLOCAL)
- info->flags &= ~ASYNC_CHECK_CD;
- else
- info->flags |= ASYNC_CHECK_CD;
-
- /*
- * Set up parity check flag
- */
-#define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
-
- info->read_status_mask = _LSR_OE_MASK;
- if (I_INPCK(info->tty))
- info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
- if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
- info->read_status_mask |= _LSR_LB_MASK;
-
- /*
- * Characters to ignore
- */
- info->ignore_status_mask = 0;
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
- if (I_IGNBRK(info->tty)) {
- info->ignore_status_mask |= _LSR_LB_MASK;
- /*
- * If we're ignoring parity and break indicators,
- * ignore overruns to (for real raw support).
- */
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= _LSR_OE_MASK;
- }
-
- /* disable interrupts while reading and clearing registers */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- old_rcr = readb(info->port->uart_base + BL_SICC_RCR);
- old_tcr = readb(info->port->uart_base + BL_SICC_TxCR);
-
-
- writeb(0, info->port->uart_base + BL_SICC_RCR);
- writeb(0, info->port->uart_base + BL_SICC_TxCR);
-
- /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/
-
-
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-
-
- /* Set baud rate */
- writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH );
- writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL );
-
- /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
- /* For now, do NOT use FIFOs since 403 UART did not have this */
- /* capability and this driver was inherited from 403UART. */
- writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2);
-
- writeb(lcr_h, info->port->uart_base + BL_SICC_LCR);
-
- writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr
- writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr
-
-}
-
-
-static void siccuart_put_char(struct tty_struct *tty, u_char ch)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (!tty || !info->xmit.buf)
- return;
-
- /* lock info->xmit while adding character to tx buffer */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) {
- info->xmit.buf[info->xmit.head] = ch;
- info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1);
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static void siccuart_flush_chars(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (info->xmit.head == info->xmit.tail
- || tty->stopped
- || tty->hw_stopped
- || !info->xmit.buf)
- return;
-
- /* disable interrupts while transmitting characters */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static int siccuart_write(struct tty_struct *tty,
- const u_char * buf, int count)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- int c, ret = 0;
-
- if (!tty || !info->xmit.buf || !tmp_buf)
- return 0;
-
- /* lock info->xmit while removing characters from buffer */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- while (1) {
- c = CIRC_SPACE_TO_END(info->xmit.head,
- info->xmit.tail,
- SICC_XMIT_SIZE);
- if (count < c)
- c = count;
- if (c <= 0)
- break;
- memcpy(info->xmit.buf + info->xmit.head, buf, c);
- info->xmit.head = (info->xmit.head + c) &
- (SICC_XMIT_SIZE - 1);
- buf += c;
- count -= c;
- ret += c;
- }
- if (info->xmit.head != info->xmit.tail
- && !tty->stopped
- && !tty->hw_stopped)
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return ret;
-}
-
-static int siccuart_write_room(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
-
- return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
-}
-
-static int siccuart_chars_in_buffer(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
-
- return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
-}
-
-static void siccuart_flush_buffer(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- pr_debug("siccuart_flush_buffer(%d) called\n", tty->index);
- /* lock info->xmit while zeroing buffer counts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->xmit.head = info->xmit.tail = 0;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- wake_up_interruptible(&tty->write_wait);
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
-}
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- */
-static void siccuart_send_xchar(struct tty_struct *tty, char ch)
-{
- struct SICC_info *info = tty->driver_data;
-
- info->x_char = ch;
- if (ch)
- siccuart_enable_tx_interrupt(info);
-}
-
-static void siccuart_throttle(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (I_IXOFF(tty))
- siccuart_send_xchar(tty, STOP_CHAR(tty));
-
- if (tty->termios->c_cflag & CRTSCTS) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl &= ~TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-}
-
-static void siccuart_unthrottle(struct tty_struct *tty)
-{
- struct SICC_info *info = (struct SICC_info *) tty->driver_data;
- unsigned long flags;
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- siccuart_send_xchar(tty, START_CHAR(tty));
- }
-
- if (tty->termios->c_cflag & CRTSCTS) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl |= TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-}
-
-static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo)
-{
- struct SICC_state *state = info->state;
- struct SICC_port *port = info->port;
- struct serial_struct tmp;
-
- memset(&tmp, 0, sizeof(tmp));
- tmp.type = 0;
- tmp.line = state->line;
- tmp.port = port->uart_base;
- if (HIGH_BITS_OFFSET)
- tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET;
- tmp.irq = port->irqrx;
- tmp.flags = 0;
- tmp.xmit_fifo_size = port->fifosize;
- tmp.baud_base = port->uartclk / 16;
- tmp.close_delay = state->close_delay;
- tmp.closing_wait = state->closing_wait;
- tmp.custom_divisor = state->custom_divisor;
-
- if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
- return -EFAULT;
- return 0;
-}
-
-static int set_serial_info(struct SICC_info *info,
- struct serial_struct *newinfo)
-{
- struct serial_struct new_serial;
- struct SICC_state *state, old_state;
- struct SICC_port *port;
- unsigned long new_port;
- unsigned int i, change_irq, change_port;
- int retval = 0;
-
- if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
- return -EFAULT;
-
- state = info->state;
- old_state = *state;
- port = info->port;
-
- new_port = new_serial.port;
- if (HIGH_BITS_OFFSET)
- new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
-
- change_irq = new_serial.irq != port->irqrx;
- change_port = new_port != port->uart_base;
-
- if (!capable(CAP_SYS_ADMIN)) {
- if (change_irq || change_port ||
- (new_serial.baud_base != port->uartclk / 16) ||
- (new_serial.close_delay != state->close_delay) ||
- (new_serial.xmit_fifo_size != port->fifosize) ||
- ((new_serial.flags & ~ASYNC_USR_MASK) !=
- (state->flags & ~ASYNC_USR_MASK)))
- return -EPERM;
- state->flags = ((state->flags & ~ASYNC_USR_MASK) |
- (new_serial.flags & ASYNC_USR_MASK));
- info->flags = ((info->flags & ~ASYNC_USR_MASK) |
- (new_serial.flags & ASYNC_USR_MASK));
- state->custom_divisor = new_serial.custom_divisor;
- goto check_and_exit;
- }
-
- if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) ||
- (new_serial.baud_base < 9600))
- return -EINVAL;
-
- if (new_serial.type && change_port) {
- for (i = 0; i < SERIAL_SICC_NR; i++)
- if ((port != sicc_ports + i) &&
- sicc_ports[i].uart_base != new_port)
- return -EADDRINUSE;
- }
-
- if ((change_port || change_irq) && (state->count > 1))
- return -EBUSY;
-
- /*
- * OK, past this point, all the error checking has been done.
- * At this point, we start making changes.....
- */
- port->uartclk = new_serial.baud_base * 16;
- state->flags = ((state->flags & ~ASYNC_FLAGS) |
- (new_serial.flags & ASYNC_FLAGS));
- info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) |
- (info->flags & ASYNC_INTERNAL_FLAGS));
- state->custom_divisor = new_serial.custom_divisor;
- state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay);
- state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait);
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
- port->fifosize = new_serial.xmit_fifo_size;
-
- if (change_port || change_irq) {
- /*
- * We need to shutdown the serial port at the old
- * port/irq combination.
- */
- siccuart_shutdown(info);
- port->irqrx = new_serial.irq;
- port->uart_base = new_port;
- }
-
-check_and_exit:
- if (!port->uart_base)
- return 0;
- if (info->flags & ASYNC_INITIALIZED) {
- if ((old_state.flags & ASYNC_SPD_MASK) !=
- (state->flags & ASYNC_SPD_MASK) ||
- (old_state.custom_divisor != state->custom_divisor)) {
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
- info->tty->alt_speed = 57600;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
- info->tty->alt_speed = 115200;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
- info->tty->alt_speed = 230400;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
- info->tty->alt_speed = 460800;
- siccuart_change_speed(info, NULL);
- }
- } else
- retval = siccuart_startup(info);
- return retval;
-}
-
-
-/*
- * get_lsr_info - get line status register info
- */
-static int get_lsr_info(struct SICC_info *info, unsigned int *value)
-{
- unsigned int result, status;
- unsigned long flags;
-
- /* disable interrupts while reading status from port */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- status = readb(info->port->uart_base + BL_SICC_LSR);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- result = status & _LSR_TSR_EMPTY ? TIOCSER_TEMT : 0;
-
- /*
- * If we're about to load something into the transmit
- * register, we'll pretend the transmitter isn't empty to
- * avoid a race condition (depending on when the transmit
- * interrupt happens).
- */
- if (info->x_char ||
- ((CIRC_CNT(info->xmit.head, info->xmit.tail,
- SICC_XMIT_SIZE) > 0) &&
- !info->tty->stopped && !info->tty->hw_stopped))
- result &= TIOCSER_TEMT;
-
- return put_user(result, value);
-}
-
-static int get_modem_info(struct SICC_info *info, unsigned int *value)
-{
- unsigned int result = info->mctrl;
-
- return put_user(result, value);
-}
-
-static int set_modem_info(struct SICC_info *info, unsigned int cmd,
- unsigned int *value)
-{
- unsigned int arg, old;
- unsigned long flags;
-
- if (get_user(arg, value))
- return -EFAULT;
-
- old = info->mctrl;
- switch (cmd) {
- case TIOCMBIS:
- info->mctrl |= arg;
- break;
-
- case TIOCMBIC:
- info->mctrl &= ~arg;
- break;
-
- case TIOCMSET:
- info->mctrl = arg;
- break;
-
- default:
- return -EINVAL;
- }
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (old != info->mctrl)
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return 0;
-}
-
-static void siccuart_break_ctl(struct tty_struct *tty, int break_state)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- unsigned int lcr_h;
-
-
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- lcr_h = readb(info->port + BL_SICC_LSR);
- if (break_state == -1)
- lcr_h |= _LSR_LB_MASK;
- else
- lcr_h &= ~_LSR_LB_MASK;
- writeb(lcr_h, info->port + BL_SICC_LSRS);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static int siccuart_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_icount cnow;
- struct serial_icounter_struct icount;
- unsigned long flags;
-
- if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
- (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
- (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *)arg);
- case TIOCMBIS:
- case TIOCMBIC:
- case TIOCMSET:
- return set_modem_info(info, cmd, (unsigned int *)arg);
- case TIOCGSERIAL:
- return get_serial_info(info,
- (struct serial_struct *)arg);
- case TIOCSSERIAL:
- return set_serial_info(info,
- (struct serial_struct *)arg);
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info(info, (unsigned int *)arg);
- /*
- * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
- * - mask passed in arg for lines of interest
- * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
- * Caller should use TIOCGICOUNT to see which one it was
- */
- case TIOCMIWAIT:
- return 0;
- /*
- * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
- * Return: write counters to the user passed counter struct
- * NB: both 1->0 and 0->1 transitions are counted except for
- * RI where only 0->1 is counted.
- */
- case TIOCGICOUNT:
- /* disable interrupts while getting interrupt count */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- cnow = info->state->icount;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- icount.cts = cnow.cts;
- icount.dsr = cnow.dsr;
- icount.rng = cnow.rng;
- icount.dcd = cnow.dcd;
- icount.rx = cnow.rx;
- icount.tx = cnow.tx;
- icount.frame = cnow.frame;
- icount.overrun = cnow.overrun;
- icount.parity = cnow.parity;
- icount.brk = cnow.brk;
- icount.buf_overrun = cnow.buf_overrun;
-
- return copy_to_user((void *)arg, &icount, sizeof(icount))
- ? -EFAULT : 0;
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-static void siccuart_set_termios(struct tty_struct *tty, struct termios *old_termios)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- unsigned int cflag = tty->termios->c_cflag;
-
- if ((cflag ^ old_termios->c_cflag) == 0 &&
- RELEVENT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0)
- return;
-
- siccuart_change_speed(info, old_termios);
-
- /* Handle transition to B0 status */
- if ((old_termios->c_cflag & CBAUD) &&
- !(cflag & CBAUD)) {
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl &= ~(TIOCM_RTS | TIOCM_DTR);
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-
- /* Handle transition away from B0 status */
- if (!(old_termios->c_cflag & CBAUD) &&
- (cflag & CBAUD)) {
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl |= TIOCM_DTR;
- if (!(cflag & CRTSCTS) ||
- !test_bit(TTY_THROTTLED, &tty->flags))
- info->mctrl |= TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-
- /* Handle turning off CRTSCTS */
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- siccuart_start(tty);
- }
-
-#if 0
- /*
- * No need to wake up processes in open wait, since they
- * sample the CLOCAL flag once, and don't recheck it.
- * XXX It's not clear whether the current behavior is correct
- * or not. Hence, this may change.....
- */
- if (!(old_termios->c_cflag & CLOCAL) &&
- (tty->termios->c_cflag & CLOCAL))
- wake_up_interruptible(&info->open_wait);
-#endif
-}
-
-static void siccuart_close(struct tty_struct *tty, struct file *filp)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_state *state;
- unsigned long flags;
-
- if (!info)
- return;
-
- state = info->state;
-
- //pr_debug("siccuart_close() called\n");
-
- /* lock tty->driver_data while closing port */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- if (tty_hung_up_p(filp)) {
- goto quick_close;
- }
-
- if ((tty->count == 1) && (state->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. state->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk("siccuart_close: bad serial port count; tty->count is 1, state->count is %d\n", state->count);
- state->count = 1;
- }
- if (--state->count < 0) {
- printk("rs_close: bad serial port count for %s: %d\n", tty->name, state->count);
- state->count = 0;
- }
- if (state->count) {
- goto quick_close;
- }
- info->flags |= ASYNC_CLOSING;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- /*
- * Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
- if (info->state->closing_wait != ASYNC_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->state->closing_wait);
- /*
- * At this point, we stop accepting input. To do this, we
- * disable the receive line status interrupts.
- */
- if (info->flags & ASYNC_INITIALIZED) {
- siccuart_disable_rx_interrupt(info);
- /*
- * Before we drop DTR, make sure the UART transmitter
- * has completely drained; this is especially
- * important if there is a transmit FIFO!
- */
- siccuart_wait_until_sent(tty, info->timeout);
- }
- siccuart_shutdown(info);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = NULL;
- if (info->blocked_open) {
- if (info->state->close_delay)
- schedule_timeout_interruptible(info->state->close_delay);
- wake_up_interruptible(&info->open_wait);
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
- return;
-
-quick_close:
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return;
-}
-
-static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- struct SICC_info *info = (struct SICC_info *) tty->driver_data;
- unsigned long char_time, expire;
-
- if (info->port->fifosize == 0)
- return;
-
- /*
- * Set the check interval to be 1/5 of the estimated time to
- * send a single character, and make it at least 1. The check
- * interval should also be less than the timeout.
- *
- * Note: we have to use pretty tight timings here to satisfy
- * the NIST-PCTS.
- */
- char_time = (info->timeout - msecs_to_jiffies(20)) / info->port->fifosize;
- char_time = char_time / 5;
- if (char_time == 0)
- char_time = 1;
-
- // Crazy!! sometimes the input arg 'timeout' can be negtive numbers :-(
- if (timeout >= 0 && timeout < char_time)
- char_time = timeout;
- /*
- * If the transmitter hasn't cleared in twice the approximate
- * amount of time to send the entire FIFO, it probably won't
- * ever clear. This assumes the UART isn't doing flow
- * control, which is currently the case. Hence, if it ever
- * takes longer than info->timeout, this is probably due to a
- * UART bug of some kind. So, we clamp the timeout parameter at
- * 2*info->timeout.
- */
- if (!timeout || timeout > 2 * info->timeout)
- timeout = 2 * info->timeout;
-
- expire = jiffies + timeout;
- pr_debug("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n",
- tty->index, jiffies,
- expire, char_time);
- while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) {
- schedule_timeout_interruptible(char_time);
- if (signal_pending(current))
- break;
- if (timeout && time_after(jiffies, expire))
- break;
- }
- set_current_state(TASK_RUNNING);
-}
-
-static void siccuart_hangup(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_state *state = info->state;
-
- siccuart_flush_buffer(tty);
- if (info->flags & ASYNC_CLOSING)
- return;
- siccuart_shutdown(info);
- info->event = 0;
- state->count = 0;
- info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = NULL;
- wake_up_interruptible(&info->open_wait);
-}
-
-static int block_til_ready(struct tty_struct *tty, struct file *filp,
- struct SICC_info *info)
-{
- DECLARE_WAITQUEUE(wait, current);
- struct SICC_state *state = info->state;
- unsigned long flags;
- int do_clocal = 0, extra_count = 0, retval;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
- return (info->flags & ASYNC_HUP_NOTIFY) ?
- -EAGAIN : -ERESTARTSYS;
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled,
- * then make the check up front and then exit.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR))) {
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL)
- do_clocal = 1;
-
- /*
- * Block waiting for the carrier detect and the line to become
- * free (i.e., not in use by the callout). While we are in
- * this loop, state->count is dropped by one, so that
- * rs_close() knows when to free things. We restore it upon
- * exit, either normal or abnormal.
- */
- retval = 0;
- add_wait_queue(&info->open_wait, &wait);
- /* lock while decrementing state->count */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (!tty_hung_up_p(filp)) {
- extra_count = 1;
- state->count--;
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- info->blocked_open++;
- while (1) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (tty->termios->c_cflag & CBAUD) {
- info->mctrl = TIOCM_DTR | TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
- if (info->flags & ASYNC_HUP_NOTIFY)
- retval = -EAGAIN;
- else
- retval = -ERESTARTSYS;
- break;
- }
- if (!(info->flags & ASYNC_CLOSING) &&
- (do_clocal /*|| (UART_GET_FR(info->port) & SICC_UARTFR_DCD)*/))
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
- schedule();
- }
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&info->open_wait, &wait);
- if (extra_count)
- state->count++;
- info->blocked_open--;
- if (retval)
- return retval;
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
-}
-
-static struct SICC_info *siccuart_get(int line)
-{
- struct SICC_info *info;
- struct SICC_state *state = sicc_state + line;
-
- state->count++;
- if (state->info)
- return state->info;
- info = kzalloc(sizeof(struct SICC_info), GFP_KERNEL);
- if (info) {
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
- init_waitqueue_head(&info->delta_msr_wait);
- info->flags = state->flags;
- info->state = state;
- info->port = sicc_ports + line;
- tasklet_init(&info->tlet, siccuart_tasklet_action,
- (unsigned long)info);
- }
- if (state->info) {
- kfree(info);
- return state->info;
- }
- state->info = info;
- return info;
-}
-
-static int siccuart_open(struct tty_struct *tty, struct file *filp)
-{
- struct SICC_info *info;
- int retval, line = tty->index;
-
-
- // is this a line that we've got?
- if (line >= SERIAL_SICC_NR) {
- return -ENODEV;
- }
-
- info = siccuart_get(line);
- if (!info)
- return -ENOMEM;
-
- tty->driver_data = info;
- info->tty = tty;
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
-
- /*
- * Make sure we have the temporary buffer allocated
- */
- if (!tmp_buf) {
- unsigned long page = get_zeroed_page(GFP_KERNEL);
- if (tmp_buf)
- free_page(page);
- else if (!page) {
- return -ENOMEM;
- }
- tmp_buf = (u_char *)page;
- }
-
- /*
- * If the port is in the middle of closing, bail out now.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
- return -EAGAIN;
- }
-
- /*
- * Start up the serial port
- */
- retval = siccuart_startup(info);
- if (retval) {
- return retval;
- }
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
- return retval;
- }
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
- if (siccuart_cons.cflag && siccuart_cons.index == line) {
- tty->termios->c_cflag = siccuart_cons.cflag;
- siccuart_cons.cflag = 0;
- siccuart_change_speed(info, NULL);
- }
-#endif
- return 0;
-}
-
-static const struct tty_operations sicc_ops = {
- .open = siccuart_open,
- .close = siccuart_close,
- .write = siccuart_write,
- .put_char = siccuart_put_char,
- .flush_chars = siccuart_flush_chars,
- .write_room = siccuart_write_room,
- .chars_in_buffer = siccuart_chars_in_buffer,
- .flush_buffer = siccuart_flush_buffer,
- .ioctl = siccuart_ioctl,
- .throttle = siccuart_throttle,
- .unthrottle = siccuart_unthrottle,
- .send_xchar = siccuart_send_xchar,
- .set_termios = siccuart_set_termios,
- .stop = siccuart_stop,
- .start = siccuart_start,
- .hangup = siccuart_hangup,
- .break_ctl = siccuart_break_ctl,
- .wait_until_sent = siccuart_wait_until_sent,
-};
-
-int __init siccuart_init(void)
-{
- int i;
- siccnormal_driver = alloc_tty_driver(SERIAL_SICC_NR);
- if (!siccnormal_driver)
- return -ENOMEM;
- printk("IBM Vesta SICC serial port driver V 0.1 by Yudong Yang and Yi Ge / IBM CRL .\n");
- siccnormal_driver->driver_name = "serial_sicc";
- siccnormal_driver->owner = THIS_MODULE;
- siccnormal_driver->name = SERIAL_SICC_NAME;
- siccnormal_driver->major = SERIAL_SICC_MAJOR;
- siccnormal_driver->minor_start = SERIAL_SICC_MINOR;
- siccnormal_driver->type = TTY_DRIVER_TYPE_SERIAL;
- siccnormal_driver->subtype = SERIAL_TYPE_NORMAL;
- siccnormal_driver->init_termios = tty_std_termios;
- siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
- siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
- tty_set_operations(siccnormal_driver, &sicc_ops);
-
- if (tty_register_driver(siccnormal_driver))
- panic("Couldn't register SICC serial driver\n");
-
- for (i = 0; i < SERIAL_SICC_NR; i++) {
- struct SICC_state *state = sicc_state + i;
- state->line = i;
- state->close_delay = msecs_to_jiffies(500);
- state->closing_wait = 30 * HZ;
- spin_lock_init(&state->sicc_lock);
- }
-
-
- return 0;
-}
-
-__initcall(siccuart_init);
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
-/************** console driver *****************/
-
-/*
- * This code is currently never used; console->read is never called.
- * Therefore, although we have an implementation, we don't use it.
- * FIXME: the "const char *s" should be fixed to "char *s" some day.
- * (when the definition in include/linux/console.h is also fixed)
- */
-#ifdef used_and_not_const_char_pointer
-static int siccuart_console_read(struct console *co, const char *s, u_int count)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- unsigned int status;
- char *w;
- int c;
-
- pr_debug("siccuart_console_read() called\n");
-
- c = 0;
- w = s;
- while (c < count) {
- if(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL) {
- *w++ = readb(port->uart_base + BL_SICC_RBR);
- c++;
- } else {
- // nothing more to get, return
- return c;
- }
- }
- // return the count
- return c;
-}
-#endif
-
-/*
- * Print a string to the serial port trying not to disturb
- * any possible real use of the port...
- *
- * The console_lock must be held when we get here.
- */
-static void siccuart_console_write(struct console *co, const char *s, u_int count)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- unsigned int old_cr;
- int i;
-
- /*
- * First save the CR then disable the interrupts
- */
- old_cr = readb(port->uart_base + BL_SICC_TxCR);
- writeb(old_cr & ~_TxCR_DME_MASK, port->uart_base + BL_SICC_TxCR);
-
- /*
- * Now, do each character
- */
- for (i = 0; i < count; i++) {
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb(s[i], port->uart_base + BL_SICC_TBR);
- if (s[i] == '\n') {
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb('\r', port->uart_base + BL_SICC_TBR);
- }
- }
-
- /*
- * Finally, wait for transmitter to become empty
- * and restore the TCR
- */
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb(old_cr, port->uart_base + BL_SICC_TxCR);
-}
-
-/*
- * Receive character from the serial port
- */
-static int siccuart_console_wait_key(struct console *co)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- int c;
-
- while(!(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL));
- c = readb(port->uart_base + BL_SICC_RBR);
- return c;
-}
-
-static struct tty_driver *siccuart_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return siccnormal_driver;
-}
-
-static int __init siccuart_console_setup(struct console *co, char *options)
-{
- struct SICC_port *port;
- int baud = 9600;
- int bits = 8;
- int parity = 'n';
- u_int cflag = CREAD | HUPCL | CLOCAL;
- u_int lcr_h, quot;
-
-
- if (co->index >= SERIAL_SICC_NR)
- co->index = 0;
-
- port = &sicc_ports[co->index];
-
- if (port->uart_base == 0)
- port->uart_base = (int)ioremap(port->uart_base_phys, PAGE_SIZE);
-
- if (options) {
- char *s = options;
- baud = simple_strtoul(s, NULL, 10);
- while (*s >= '0' && *s <= '9')
- s++;
- if (*s) parity = *s++;
- if (*s) bits = *s - '0';
- }
-
- /*
- * Now construct a cflag setting.
- */
- switch (baud) {
- case 1200: cflag |= B1200; break;
- case 2400: cflag |= B2400; break;
- case 4800: cflag |= B4800; break;
- default: cflag |= B9600; baud = 9600; break;
- case 19200: cflag |= B19200; break;
- case 38400: cflag |= B38400; break;
- case 57600: cflag |= B57600; break;
- case 115200: cflag |= B115200; break;
- }
- switch (bits) {
- case 7: cflag |= CS7; lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; break;
- default: cflag |= CS8; lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; break;
- }
- switch (parity) {
- case 'o':
- case 'O': cflag |= PARODD; lcr_h |= _LCR_PTY_ODD; break;
- case 'e':
- case 'E': cflag |= PARENB; lcr_h |= _LCR_PE_ENABLE | _LCR_PTY_ODD; break;
- }
-
- co->cflag = cflag;
-
-
- {
- // a copy of is inserted here ppc403SetBaud(com_port, (int)9600);
- unsigned long divisor, clockSource, temp;
- unsigned int rate = baud;
-
- /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
- powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
-
- /* Determine Internal Baud Clock Frequency */
- /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
- /* SCCR (Serial Clock Control Register) on Vesta */
- temp = powerpcMfclkgpcr();
-
- if(temp & 0x00000080) {
- clockSource = 324000000;
- }
- else {
- clockSource = 216000000;
- }
- clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
- divisor = clockSource/(16*rate) - 1;
- /* divisor has only 12 bits of resolution */
- if(divisor>0x00000FFF){
- divisor=0x00000FFF;
- }
-
- quot = divisor;
- }
-
- writeb((quot & 0x00000F00)>>8, port->uart_base + BL_SICC_BRDH );
- writeb( quot & 0x00000FF, port->uart_base + BL_SICC_BRDL );
-
- /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
- /* For now, do NOT use FIFOs since 403 UART did not have this */
- /* capability and this driver was inherited from 403UART. */
- writeb(_CTL2_EXTERN, port->uart_base + BL_SICC_CTL2);
-
- writeb(lcr_h, port->uart_base + BL_SICC_LCR);
- writeb(_RCR_ER_ENABLE | _RCR_PME_HARD, port->uart_base + BL_SICC_RCR);
- writeb( _TxCR_ET_ENABLE , port->uart_base + BL_SICC_TxCR);
-
- // writeb(, info->port->uart_base + BL_SICC_RCR );
- /*
- * Transmitter Command Register: Transmitter enabled & DMA + TBR interrupt
- * + Transmitter Empty interrupt + Transmitter error interrupt disabled &
- * Stop mode when CTS active enabled & Transmit Break + Pattern Generation
- * mode disabled.
- */
-
- writeb( 0x00, port->uart_base + BL_SICC_IrCR ); // disable IrDA
-
- readb(port->uart_base + BL_SICC_RBR);
-
- writeb(0xf8, port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
-
- /* we will enable the port as we need it */
-
- return 0;
-}
-
-static struct console siccuart_cons =
-{
- .name = SERIAL_SICC_NAME,
- .write = siccuart_console_write,
-#ifdef used_and_not_const_char_pointer
- .read = siccuart_console_read,
-#endif
- .device = siccuart_console_device,
- .wait_key = siccuart_console_wait_key,
- .setup = siccuart_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-void __init sicc_console_init(void)
-{
- register_console(&siccuart_cons);
-}
-
-#endif /* CONFIG_SERIAL_SICC_CONSOLE */
diff --git a/arch/ppc/8260_io/Kconfig b/arch/ppc/8260_io/Kconfig
deleted file mode 100644
index ea9651e2dd6a..000000000000
--- a/arch/ppc/8260_io/Kconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# CPM2 Communication options
-#
-
-menu "CPM2 Options"
- depends on CPM2
-
-config SCC_ENET
- bool "CPM SCC Ethernet"
- depends on NET_ETHERNET
-
-#
-# CONFIG_FEC_ENET is only used to get netdevices to call our init
-# function. Any combination of FCC1,2,3 are supported.
-#
-config FEC_ENET
- bool "FCC Ethernet"
- depends on NET_ETHERNET
-
-config FCC1_ENET
- bool "Ethernet on FCC1"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 1 to drive Ethernet (default).
-
-config FCC2_ENET
- bool "Ethernet on FCC2"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 2 to drive Ethernet.
-
-config FCC3_ENET
- bool "Ethernet on FCC3"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 3 to drive Ethernet.
-
-config USE_MDIO
- bool "Use MDIO for PHY configuration"
- depends on FEC_ENET
-
-choice
- prompt "Type of PHY"
- depends on 8260 && USE_MDIO
- default FCC_GENERIC_PHY
-
-config FCC_LXT970
- bool "LXT970"
-
-config FCC_LXT971
- bool "LXT971"
-
-config FCC_QS6612
- bool "QS6612"
-
-config FCC_DM9131
- bool "DM9131"
-
-config FCC_DM9161
- bool "DM9161"
-
-config FCC_GENERIC_PHY
- bool "Generic"
-endchoice
-endmenu
diff --git a/arch/ppc/8260_io/Makefile b/arch/ppc/8260_io/Makefile
deleted file mode 100644
index 971f292c5d48..000000000000
--- a/arch/ppc/8260_io/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile for the linux ppc-specific parts of comm processor (v2)
-#
-
-obj-$(CONFIG_FEC_ENET) += fcc_enet.o
-obj-$(CONFIG_SCC_ENET) += enet.o
diff --git a/arch/ppc/8260_io/enet.c b/arch/ppc/8260_io/enet.c
deleted file mode 100644
index ec1defea9c1e..000000000000
--- a/arch/ppc/8260_io/enet.c
+++ /dev/null
@@ -1,865 +0,0 @@
-/*
- * Ethernet driver for Motorola MPC8260.
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- * Copyright (c) 2000 MontaVista Software Inc. (source@mvista.com)
- * 2.3.99 Updates
- *
- * I copied this from the 8xx CPM Ethernet driver, so follow the
- * credits back through that.
- *
- * This version of the driver is somewhat selectable for the different
- * processor/board combinations. It works for the boards I know about
- * now, and should be easily modified to include others. Some of the
- * configuration information is contained in <asm/cpm1.h> and the
- * remainder is here.
- *
- * Buffer descriptors are kept in the CPM dual port RAM, and the frame
- * buffers are in the host memory.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-
-#include <asm/immap_cpm2.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8260.h>
-#include <asm/uaccess.h>
-#include <asm/cpm2.h>
-#include <asm/irq.h>
-
-/*
- * Theory of Operation
- *
- * The MPC8260 CPM performs the Ethernet processing on an SCC. It can use
- * an aribtrary number of buffers on byte boundaries, but must have at
- * least two receive buffers to prevent constant overrun conditions.
- *
- * The buffer descriptors are allocated from the CPM dual port memory
- * with the data buffers allocated from host memory, just like all other
- * serial communication protocols. The host memory buffers are allocated
- * from the free page pool, and then divided into smaller receive and
- * transmit buffers. The size of the buffers should be a power of two,
- * since that nicely divides the page. This creates a ring buffer
- * structure similar to the LANCE and other controllers.
- *
- * Like the LANCE driver:
- * The driver runs as two independent, single-threaded flows of control. One
- * is the send-packet routine, which enforces single-threaded use by the
- * cep->tx_busy flag. The other thread is the interrupt handler, which is
- * single threaded by the hardware and other software.
- */
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#define CPM_ENET_RX_PAGES 4
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-
-/* The CPM stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct scc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- scc_t *sccp;
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-};
-
-static int scc_enet_open(struct net_device *dev);
-static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int scc_enet_rx(struct net_device *dev);
-static irqreturn_t scc_enet_interrupt(int irq, void *dev_id);
-static int scc_enet_close(struct net_device *dev);
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-
-/* These will be configurable for the SCC choice.
-*/
-#define CPM_ENET_BLOCK CPM_CR_SCC1_SBLOCK
-#define CPM_ENET_PAGE CPM_CR_SCC1_PAGE
-#define PROFF_ENET PROFF_SCC1
-#define SCC_ENET 0
-#define SIU_INT_ENET SIU_INT_SCC1
-
-/* These are both board and SCC dependent....
-*/
-#define PD_ENET_RXD ((uint)0x00000001)
-#define PD_ENET_TXD ((uint)0x00000002)
-#define PD_ENET_TENA ((uint)0x00000004)
-#define PC_ENET_RENA ((uint)0x00020000)
-#define PC_ENET_CLSN ((uint)0x00000004)
-#define PC_ENET_TXCLK ((uint)0x00000800)
-#define PC_ENET_RXCLK ((uint)0x00000400)
-#define CMX_CLK_ROUTE ((uint)0x25000000)
-#define CMX_CLK_MASK ((uint)0xff000000)
-
-/* Specific to a board.
-*/
-#define PC_EST8260_ENET_LOOPBACK ((uint)0x80000000)
-#define PC_EST8260_ENET_SQE ((uint)0x40000000)
-#define PC_EST8260_ENET_NOTFD ((uint)0x20000000)
-
-static int
-scc_enet_open(struct net_device *dev)
-{
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
- netif_start_queue(dev);
- return 0; /* Always succeed */
-}
-
-static int
-scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since cep->tx_full should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it.
- */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- /* Save skb pointer.
- */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- spin_lock_irq(&cep->lock);
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- cep->tx_full = 1;
- }
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-static void
-scc_enet_timeout(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
- cep->cur_tx, cep->tx_full ? " (full)" : "",
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- printk(" Tx @base %p :\n", bdp);
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- printk(" Rx @base %p :\n", bdp);
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (!cep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the CPM handler, not the MPC core interrupt.
- */
-static irqreturn_t
-scc_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->sccp->scc_scce;
- cep->sccp->scc_scce = int_events;
- must_restart = 0;
-
- /* Handle receive event in its own function.
- */
- if (int_events & SCCE_ENET_RXF)
- scc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (cep->tx_full) {
- cep->tx_full = 0;
- if (netif_queue_stopped(dev)) {
- netif_wake_queue(dev);
- }
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm_cpm2_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either.
- */
-
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
- CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them. This "can't happen" because the receive interrupt
- * is tossing previous frames.
- */
- if (int_events & SCCE_ENET_BSY) {
- cep->stats.rx_dropped++;
- printk("SCC ENET: BSY can't happen.\n");
- }
-
- return IRQ_HANDLED;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-scc_enet_rx(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short.
- */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- cep->stats.rx_frame_errors++;
- }
- else {
-
- /* Process the incoming frame.
- */
- cep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb,
- (unsigned char *)__va(bdp->cbd_bufaddr),
- pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-scc_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
-
- return 0;
-}
-
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile scc_enet_t *ep;
- int i, j;
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->sccp->scc_psmr |= SCC_PSMR_PRO;
- } else {
-
- cep->sccp->scc_psmr &= ~SCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->sen_gaddr1 = 0xffff;
- ep->sen_gaddr2 = 0xffff;
- ep->sen_gaddr3 = 0xffff;
- ep->sen_gaddr4 = 0xffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE,
- CPM_ENET_BLOCK, 0,
- CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-
-/* Initialize the CPM Ethernet on SCC.
- */
-static int __init scc_enet_init(void)
-{
- struct net_device *dev;
- struct scc_enet_private *cep;
- int i, j, err;
- uint dp_offset;
- unsigned char *eap;
- unsigned long mem_addr;
- bd_t *bd;
- volatile cbd_t *bdp;
- volatile cpm_cpm2_t *cp;
- volatile scc_t *sccp;
- volatile scc_enet_t *ep;
- volatile cpm2_map_t *immap;
- volatile iop_cpm2_t *io;
-
- cp = cpmp; /* Get pointer to Communication Processor */
-
- immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
- io = &immap->im_ioport;
-
- bd = (bd_t *)__res;
-
- /* Create an Ethernet device instance.
- */
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)(&immap->im_dprambase[PROFF_ENET]);
-
- /* And another to the SCC register area.
- */
- sccp = (volatile scc_t *)(&immap->im_scc[SCC_ENET]);
- cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
-
- /* Disable receive and transmit in case someone left it running.
- */
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Configure port C and D pins for SCC Ethernet. This
- * won't work for all SCC possibilities....it will be
- * board/port specific.
- */
- io->iop_pparc |=
- (PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_pdirc &=
- ~(PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_psorc &=
- ~(PC_ENET_RENA | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_psorc |= PC_ENET_CLSN;
-
- io->iop_ppard |= (PD_ENET_RXD | PD_ENET_TXD | PD_ENET_TENA);
- io->iop_pdird |= (PD_ENET_TXD | PD_ENET_TENA);
- io->iop_pdird &= ~PD_ENET_RXD;
- io->iop_psord |= PD_ENET_TXD;
- io->iop_psord &= ~(PD_ENET_RXD | PD_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- immap->im_cpmux.cmx_scr &= ~CMX_CLK_MASK;
- immap->im_cpmux.cmx_scr |= CMX_CLK_ROUTE;
-
- /* Allocate space for the buffer descriptors in the DP ram.
- * These are relative offsets in the DP ram address space.
- * Initialize base addresses for the buffer descriptors.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
- ep->sen_genscc.scc_rbase = dp_offset;
- cep->rx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset);
-
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
- ep->sen_genscc.scc_tbase = dp_offset;
- cep->tx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- ep->sen_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- ep->sen_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- /* Set maximum bytes per receive buffer.
- * This appears to be an Ethernet frame size, not the buffer
- * fragment size. It must be a multiple of four.
- */
- ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Set CRC preset and mask.
- */
- ep->sen_cpres = 0xffffffff;
- ep->sen_cmask = 0xdebb20e3;
-
- ep->sen_crcec = 0; /* CRC Error counter */
- ep->sen_alec = 0; /* alignment error counter */
- ep->sen_disfc = 0; /* discard frame counter */
-
- ep->sen_pads = 0x8888; /* Tx short frame pad character */
- ep->sen_retlim = 15; /* Retry limit threshold */
-
- ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
- ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
-
- /* Clear hash tables.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
- ep->sen_iaddr1 = 0;
- ep->sen_iaddr2 = 0;
- ep->sen_iaddr3 = 0;
- ep->sen_iaddr4 = 0;
-
- /* Set Ethernet station address.
- *
- * This is supplied in the board information structure, so we
- * copy that into the controller.
- */
- eap = (unsigned char *)&(ep->sen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
-
- ep->sen_pper = 0; /* 'cause the book says so */
- ep->sen_taddrl = 0; /* temp address (LSB) */
- ep->sen_taddrm = 0;
- ep->sen_taddrh = 0; /* temp address (MSB) */
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- for (i=0; i<CPM_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- mem_addr = __get_free_page(GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_bufaddr = __pa(mem_addr);
- mem_addr += CPM_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-
- sccp->scc_scce = 0xffff; /* Clear any pending events */
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
-
- /* Install our interrupt handler.
- */
- request_irq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev);
- /* BUG: no check for failure */
-
- /* Set GSMR_H to enable all normal operating modes.
- * Set GSMR_L to enable Ethernet to MC68160.
- */
- sccp->scc_gsmrh = 0;
- sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- sccp->scc_dsr = 0xd555;
-
- /* Set processing mode. Use Ethernet CRC, catch broadcast, and
- * start frame search 22 bit times after RENA.
- */
- sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
-
- /* It is now OK to enable the Ethernet transmitter.
- * Unfortunately, there are board implementation differences here.
- */
- io->iop_pparc &= ~(PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_psorc &= ~(PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_pdirc |= (PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_pdatc &= ~(PC_EST8260_ENET_LOOPBACK | PC_EST8260_ENET_SQE);
- io->iop_pdatc |= PC_EST8260_ENET_NOTFD;
-
- dev->base_addr = (unsigned long)ep;
-
- /* The CPM Ethernet specific entries in the device structure. */
- dev->open = scc_enet_open;
- dev->hard_start_xmit = scc_enet_start_xmit;
- dev->tx_timeout = scc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = scc_enet_close;
- dev->get_stats = scc_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
- /* And last, enable the transmit and receive processing.
- */
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk("%s: SCC ENET Version 0.1, ", dev->name);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
- return 0;
-}
-
-module_init(scc_enet_init);
diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
deleted file mode 100644
index d38b57e24cee..000000000000
--- a/arch/ppc/8260_io/fcc_enet.c
+++ /dev/null
@@ -1,2379 +0,0 @@
-/*
- * Fast Ethernet Controller (FCC) driver for Motorola MPC8260.
- * Copyright (c) 2000 MontaVista Software, Inc. Dan Malek (dmalek@jlc.net)
- *
- * This version of the driver is a combination of the 8xx fec and
- * 8260 SCC Ethernet drivers. This version has some additional
- * configuration options, which should probably be moved out of
- * here. This driver currently works for the EST SBC8260,
- * SBS Diablo/BCM, Embedded Planet RPX6, TQM8260, and others.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets. Since this is a cache coherent processor and CPM,
- * I could also preallocate SKB's and use them directly on the interface.
- *
- * 2004-12 Leo Li (leoli@freescale.com)
- * - Rework the FCC clock configuration part, make it easier to configure.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/workqueue.h>
-#include <linux/bitops.h>
-
-#include <asm/immap_cpm2.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/signal.h>
-
-/* We can't use the PHY interrupt if we aren't using MDIO. */
-#if !defined(CONFIG_USE_MDIO)
-#undef PHY_INTERRUPT
-#endif
-
-/* If we have a PHY interrupt, we will advertise both full-duplex and half-
- * duplex capabilities. If we don't have a PHY interrupt, then we will only
- * advertise half-duplex capabilities.
- */
-#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | ADVERTISE_10HALF | \
- ADVERTISE_CSMA)
-#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
- MII_ADVERTISE_HALF)
-#ifdef PHY_INTERRUPT
-#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_ALL
-#else
-#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_HALF
-#endif
-#include <asm/cpm2.h>
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-#ifdef CONFIG_USE_MDIO
-/* Forward declarations of some structures to support different PHYs */
-
-typedef struct {
- uint mii_data;
- void (*funct)(uint mii_reg, struct net_device *dev);
-} phy_cmd_t;
-
-typedef struct {
- uint id;
- char *name;
-
- const phy_cmd_t *config;
- const phy_cmd_t *startup;
- const phy_cmd_t *ack_int;
- const phy_cmd_t *shutdown;
-} phy_info_t;
-
-/* values for phy_status */
-
-#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
-#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
-#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
-#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
-#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
-#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
-#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
-
-#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
-#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
-#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
-#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
-#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
-#endif /* CONFIG_USE_MDIO */
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#define FCC_ENET_RX_PAGES 16
-#define FCC_ENET_RX_FRSIZE 2048
-#define FCC_ENET_RX_FRPPG (PAGE_SIZE / FCC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FCC_ENET_RX_FRPPG * FCC_ENET_RX_PAGES)
-#define TX_RING_SIZE 16 /* Must be power of two */
-#define TX_RING_MOD_MASK 15 /* for this to work */
-
-/* The FCC stores dest/src/type, data, and checksum for receive packets.
- * size includes support for VLAN
- */
-#define PKT_MAXBUF_SIZE 1522
-#define PKT_MINBUF_SIZE 64
-
-/* Maximum input DMA size. Must be a should(?) be a multiple of 4.
- * size includes support for VLAN
- */
-#define PKT_MAXDMA_SIZE 1524
-
-/* Maximum input buffer size. Must be a multiple of 32.
-*/
-#define PKT_MAXBLR_SIZE 1536
-
-static int fcc_enet_open(struct net_device *dev);
-static int fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int fcc_enet_rx(struct net_device *dev);
-static irqreturn_t fcc_enet_interrupt(int irq, void *dev_id);
-static int fcc_enet_close(struct net_device *dev);
-static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev);
-/* static void set_multicast_list(struct net_device *dev); */
-static void fcc_restart(struct net_device *dev, int duplex);
-static void fcc_stop(struct net_device *dev);
-static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
-
-/* These will be configurable for the FCC choice.
- * Multiple ports can be configured. There is little choice among the
- * I/O pins to the PHY, except the clocks. We will need some board
- * dependent clock selection.
- * Why in the hell did I put these inside #ifdef's? I dunno, maybe to
- * help show what pins are used for each device.
- */
-
-/* Since the CLK setting changes greatly from board to board, I changed
- * it to a easy way. You just need to specify which CLK number to use.
- * Note that only limited choices can be make on each port.
- */
-
-/* FCC1 Clock Source Configuration. There are board specific.
- Can only choose from CLK9-12 */
-#ifdef CONFIG_SBC82xx
-#define F1_RXCLK 9
-#define F1_TXCLK 10
-#else
-#define F1_RXCLK 12
-#define F1_TXCLK 11
-#endif
-
-/* FCC2 Clock Source Configuration. There are board specific.
- Can only choose from CLK13-16 */
-#define F2_RXCLK 13
-#define F2_TXCLK 14
-
-/* FCC3 Clock Source Configuration. There are board specific.
- Can only choose from CLK13-16 */
-#define F3_RXCLK 15
-#define F3_TXCLK 16
-
-/* Automatically generates register configurations */
-#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
-
-#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
-#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
-#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
-#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
-#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
-#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
-
-#define PC_F1RXCLK PC_CLK(F1_RXCLK)
-#define PC_F1TXCLK PC_CLK(F1_TXCLK)
-#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
-#define CMX1_CLK_MASK ((uint)0xff000000)
-
-#define PC_F2RXCLK PC_CLK(F2_RXCLK)
-#define PC_F2TXCLK PC_CLK(F2_TXCLK)
-#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
-#define CMX2_CLK_MASK ((uint)0x00ff0000)
-
-#define PC_F3RXCLK PC_CLK(F3_RXCLK)
-#define PC_F3TXCLK PC_CLK(F3_TXCLK)
-#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
-#define CMX3_CLK_MASK ((uint)0x0000ff00)
-
-
-/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PA1_COL ((uint)0x00000001)
-#define PA1_CRS ((uint)0x00000002)
-#define PA1_TXER ((uint)0x00000004)
-#define PA1_TXEN ((uint)0x00000008)
-#define PA1_RXDV ((uint)0x00000010)
-#define PA1_RXER ((uint)0x00000020)
-#define PA1_TXDAT ((uint)0x00003c00)
-#define PA1_RXDAT ((uint)0x0003c000)
-#define PA1_PSORA_BOUT (PA1_RXDAT | PA1_TXDAT)
-#define PA1_PSORA_BIN (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
- PA1_RXDV | PA1_RXER)
-#define PA1_DIRA_BOUT (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
-#define PA1_DIRA_BIN (PA1_TXDAT | PA1_TXEN | PA1_TXER)
-
-
-/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB2_TXER ((uint)0x00000001)
-#define PB2_RXDV ((uint)0x00000002)
-#define PB2_TXEN ((uint)0x00000004)
-#define PB2_RXER ((uint)0x00000008)
-#define PB2_COL ((uint)0x00000010)
-#define PB2_CRS ((uint)0x00000020)
-#define PB2_TXDAT ((uint)0x000003c0)
-#define PB2_RXDAT ((uint)0x00003c00)
-#define PB2_PSORB_BOUT (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
- PB2_RXER | PB2_RXDV | PB2_TXER)
-#define PB2_PSORB_BIN (PB2_TXEN)
-#define PB2_DIRB_BOUT (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
-#define PB2_DIRB_BIN (PB2_TXDAT | PB2_TXEN | PB2_TXER)
-
-
-/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB3_RXDV ((uint)0x00004000)
-#define PB3_RXER ((uint)0x00008000)
-#define PB3_TXER ((uint)0x00010000)
-#define PB3_TXEN ((uint)0x00020000)
-#define PB3_COL ((uint)0x00040000)
-#define PB3_CRS ((uint)0x00080000)
-#ifndef CONFIG_RPX8260
-#define PB3_TXDAT ((uint)0x0f000000)
-#define PC3_TXDAT ((uint)0x00000000)
-#else
-#define PB3_TXDAT ((uint)0x0f000000)
-#define PC3_TXDAT 0
-#endif
-#define PB3_RXDAT ((uint)0x00f00000)
-#define PB3_PSORB_BOUT (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
- PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
-#define PB3_PSORB_BIN (0)
-#define PB3_DIRB_BOUT (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
-#define PB3_DIRB_BIN (PB3_TXDAT | PB3_TXEN | PB3_TXER)
-
-#define PC3_PSORC_BOUT (PC3_TXDAT)
-#define PC3_PSORC_BIN (0)
-#define PC3_DIRC_BOUT (0)
-#define PC3_DIRC_BIN (PC3_TXDAT)
-
-
-/* MII status/control serial interface.
-*/
-#if defined(CONFIG_RPX8260)
-/* The EP8260 doesn't use Port C for MDIO */
-#define PC_MDIO ((uint)0x00000000)
-#define PC_MDCK ((uint)0x00000000)
-#elif defined(CONFIG_TQM8260)
-/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
-#define PC_MDIO ((uint)0x00000002)
-#define PC_MDCK ((uint)0x00000001)
-#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
-#define PC_MDIO ((uint)0x00400000)
-#define PC_MDCK ((uint)0x00200000)
-#else
-#define PC_MDIO ((uint)0x00000004)
-#define PC_MDCK ((uint)0x00000020)
-#endif
-
-#if defined(CONFIG_USE_MDIO) && (!defined(PC_MDIO) || !defined(PC_MDCK))
-#error "Must define PC_MDIO and PC_MDCK if using MDIO"
-#endif
-
-/* PHY addresses */
-/* default to dynamic config of phy addresses */
-#define FCC1_PHY_ADDR 0
-#ifdef CONFIG_PQ2FADS
-#define FCC2_PHY_ADDR 0
-#else
-#define FCC2_PHY_ADDR 2
-#endif
-#define FCC3_PHY_ADDR 3
-
-/* A table of information for supporting FCCs. This does two things.
- * First, we know how many FCCs we have and they are always externally
- * numbered from zero. Second, it holds control register and I/O
- * information that could be different among board designs.
- */
-typedef struct fcc_info {
- uint fc_fccnum;
- uint fc_phyaddr;
- uint fc_cpmblock;
- uint fc_cpmpage;
- uint fc_proff;
- uint fc_interrupt;
- uint fc_trxclocks;
- uint fc_clockroute;
- uint fc_clockmask;
- uint fc_mdio;
- uint fc_mdck;
-} fcc_info_t;
-
-static fcc_info_t fcc_ports[] = {
-#ifdef CONFIG_FCC1_ENET
- { 0, FCC1_PHY_ADDR, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1,
- (PC_F1RXCLK | PC_F1TXCLK), CMX1_CLK_ROUTE, CMX1_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-#ifdef CONFIG_FCC2_ENET
- { 1, FCC2_PHY_ADDR, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2,
- (PC_F2RXCLK | PC_F2TXCLK), CMX2_CLK_ROUTE, CMX2_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-#ifdef CONFIG_FCC3_ENET
- { 2, FCC3_PHY_ADDR, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3,
- (PC_F3RXCLK | PC_F3TXCLK), CMX3_CLK_ROUTE, CMX3_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-};
-
-/* The FCC buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct fcc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- volatile fcc_t *fccp;
- volatile fcc_enet_t *ep;
- struct net_device_stats stats;
- uint tx_free;
- spinlock_t lock;
-
-#ifdef CONFIG_USE_MDIO
- uint phy_id;
- uint phy_id_done;
- uint phy_status;
- phy_info_t *phy;
- struct work_struct phy_relink;
- struct work_struct phy_display_config;
- struct net_device *dev;
-
- uint sequence_done;
-
- uint phy_addr;
-#endif /* CONFIG_USE_MDIO */
-
- int link;
- int old_link;
- int full_duplex;
-
- fcc_info_t *fip;
-};
-
-static void init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
- volatile cpm2_map_t *immap);
-static void init_fcc_startup(fcc_info_t *fip, struct net_device *dev);
-static void init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io,
- volatile cpm2_map_t *immap);
-static void init_fcc_param(fcc_info_t *fip, struct net_device *dev,
- volatile cpm2_map_t *immap);
-
-#ifdef CONFIG_USE_MDIO
-static int mii_queue(struct net_device *dev, int request, void (*func)(uint, struct net_device *));
-static uint mii_send_receive(fcc_info_t *fip, uint cmd);
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c);
-
-/* Make MII read/write commands for the FCC.
-*/
-#define mk_mii_read(REG) (0x60020000 | (((REG) & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | (((REG) & 0x1f) << 18) | \
- ((VAL) & 0xffff))
-#define mk_mii_end 0
-#endif /* CONFIG_USE_MDIO */
-
-
-static int
-fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (!cep->tx_free || (bdp->cbd_sc & BD_ENET_TX_READY)) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since the tx queue should be stopped.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags. */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it. */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer. */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- spin_lock_irq(&cep->lock);
-
- /* Save skb pointer. */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
-#if 0
- /* Errata says don't do this. */
- cep->fccp->fcc_ftodr = 0x8000;
-#endif
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again. */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (!--cep->tx_free)
- netif_stop_queue(dev);
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-
-static void
-fcc_enet_timeout(struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p tx_free %d cur_rx %p.\n",
- cep->cur_tx, cep->tx_free,
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- printk(" Tx @base %p :\n", bdp);
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- printk(" Rx @base %p :\n", bdp);
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (cep->tx_free)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler. */
-static irqreturn_t
-fcc_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct fcc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->fccp->fcc_fcce;
- cep->fccp->fcc_fcce = (int_events & cep->fccp->fcc_fccm);
- must_restart = 0;
-
-#ifdef PHY_INTERRUPT
- /* We have to be careful here to make sure that we aren't
- * interrupted by a PHY interrupt.
- */
- disable_irq_nosync(PHY_INTERRUPT);
-#endif
-
- /* Handle receive event in its own function.
- */
- if (int_events & FCC_ENET_RXF)
- fcc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (FCC_ENET_TXE | FCC_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if (cep->tx_free == TX_RING_SIZE)
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit. */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->tx_skbuff[cep->skb_dirty] = NULL;
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted. */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (!cep->tx_free++) {
- if (netif_queue_stopped(dev)) {
- netif_wake_queue(dev);
- }
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm_cpm2_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either. Also, To workaround 8260 device erratum
- * CPM37, we must disable and then re-enable the transmitter
- * following a Late Collision, Underrun, or Retry Limit error.
- */
- cep->fccp->fcc_gfmr &= ~FCC_GFMR_ENT;
- udelay(10); /* wait a few microseconds just on principle */
- cep->fccp->fcc_gfmr |= FCC_GFMR_ENT;
-
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(cep->fip->fc_cpmpage, cep->fip->fc_cpmblock,
- 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them.
- */
- if (int_events & FCC_ENET_BSY) {
- cep->fccp->fcc_fcce = FCC_ENET_BSY;
- cep->stats.rx_dropped++;
- }
-
-#ifdef PHY_INTERRUPT
- enable_irq(PHY_INTERRUPT);
-#endif
- return IRQ_HANDLED;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-fcc_enet_rx(struct net_device *dev)
-{
- struct fcc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short. */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CL) /* Late Collision */
- cep->stats.rx_frame_errors++;
-
- if (!(bdp->cbd_sc &
- (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | BD_ENET_RX_CR
- | BD_ENET_RX_OV | BD_ENET_RX_CL)))
- {
- /* Process the incoming frame. */
- cep->stats.rx_packets++;
-
- /* Remove the FCS from the packet length. */
- pkt_len = bdp->cbd_datlen - 4;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need. */
- skb = dev_alloc_skb(pkt_len);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len); /* Make room */
- skb_copy_to_linear_data(skb,
- (unsigned char *)__va(bdp->cbd_bufaddr),
- pkt_len);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer. */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty. */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry. */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-fcc_enet_close(struct net_device *dev)
-{
-#ifdef CONFIG_USE_MDIO
- struct fcc_enet_private *fep = dev->priv;
-#endif
-
- netif_stop_queue(dev);
- fcc_stop(dev);
-#ifdef CONFIG_USE_MDIO
- if (fep->phy)
- mii_do_cmd(dev, fep->phy->shutdown);
-#endif
-
- return 0;
-}
-
-static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-#ifdef CONFIG_USE_MDIO
-
-/* NOTE: Most of the following comes from the FEC driver for 860. The
- * overall structure of MII code has been retained (as it's proved stable
- * and well-tested), but actual transfer requests are processed "at once"
- * instead of being queued (there's no interrupt-driven MII transfer
- * mechanism, one has to toggle the data/clock bits manually).
- */
-static int
-mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
-{
- struct fcc_enet_private *fep;
- int retval, tmp;
-
- /* Add PHY address to register command. */
- fep = dev->priv;
- regval |= fep->phy_addr << 23;
-
- retval = 0;
-
- tmp = mii_send_receive(fep->fip, regval);
- if (func)
- func(tmp, dev);
-
- return retval;
-}
-
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
-{
- int k;
-
- if(!c)
- return;
-
- for(k = 0; (c+k)->mii_data != mk_mii_end; k++)
- mii_queue(dev, (c+k)->mii_data, (c+k)->funct);
-}
-
-static void mii_parse_sr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
-
- if (mii_reg & BMSR_LSTATUS)
- s |= PHY_STAT_LINK;
- if (mii_reg & BMSR_RFAULT)
- s |= PHY_STAT_FAULT;
- if (mii_reg & BMSR_ANEGCOMPLETE)
- s |= PHY_STAT_ANC;
-
- fep->phy_status = s;
-}
-
-static void mii_parse_cr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);
-
- if (mii_reg & BMCR_ANENABLE)
- s |= PHY_CONF_ANE;
- if (mii_reg & BMCR_LOOPBACK)
- s |= PHY_CONF_LOOP;
-
- fep->phy_status = s;
-}
-
-static void mii_parse_anar(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_CONF_SPMASK);
-
- if (mii_reg & ADVERTISE_10HALF)
- s |= PHY_CONF_10HDX;
- if (mii_reg & ADVERTISE_10FULL)
- s |= PHY_CONF_10FDX;
- if (mii_reg & ADVERTISE_100HALF)
- s |= PHY_CONF_100HDX;
- if (mii_reg & ADVERTISE_100FULL)
- s |= PHY_CONF_100FDX;
-
- fep->phy_status = s;
-}
-
-/* ------------------------------------------------------------------------- */
-/* Generic PHY support. Should work for all PHYs, but does not support link
- * change interrupts.
- */
-#ifdef CONFIG_FCC_GENERIC_PHY
-
-static phy_info_t phy_info_generic = {
- 0x00000000, /* 0-->match any PHY */
- "GENERIC",
-
- (const phy_cmd_t []) { /* config */
- /* advertise only half-duplex capabilities */
- { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_HALF),
- mii_parse_anar },
-
- /* enable auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup */
- /* restart auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
- NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* We don't actually use the ack_int table with a generic
- * PHY, but putting a reference to mii_parse_sr here keeps
- * us from getting a compiler warning about unused static
- * functions in the case where we only compile in generic
- * PHY support.
- */
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown */
- { mk_mii_end, }
- },
-};
-#endif /* ifdef CONFIG_FCC_GENERIC_PHY */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT970 is used by many boards */
-
-#ifdef CONFIG_FCC_LXT970
-
-#define MII_LXT970_MIRROR 16 /* Mirror register */
-#define MII_LXT970_IER 17 /* Interrupt Enable Register */
-#define MII_LXT970_ISR 18 /* Interrupt Status Register */
-#define MII_LXT970_CONFIG 19 /* Configuration Register */
-#define MII_LXT970_CSR 20 /* Chip Status Register */
-
-static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x0800) {
- if (mii_reg & 0x1000)
- s |= PHY_STAT_100FDX;
- else
- s |= PHY_STAT_100HDX;
- } else {
- if (mii_reg & 0x1000)
- s |= PHY_STAT_10FDX;
- else
- s |= PHY_STAT_10HDX;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_lxt970 = {
- 0x07810000,
- "LXT970",
-
- (const phy_cmd_t []) { /* config */
-#if 0
-// { mk_mii_write(MII_ADVERTISE, 0x0021), NULL },
-
- /* Set default operation of 100-TX....for some reason
- * some of these bits are set on power up, which is wrong.
- */
- { mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
-#endif
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* read SR and ISR to acknowledge */
-
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_LXT970_ISR), NULL },
-
- /* find out the current status */
-
- { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT971 is used on some of my custom boards */
-
-#ifdef CONFIG_FCC_LXT971
-
-/* register definitions for the 971 */
-
-#define MII_LXT971_PCR 16 /* Port Control Register */
-#define MII_LXT971_SR2 17 /* Status Register 2 */
-#define MII_LXT971_IER 18 /* Interrupt Enable Register */
-#define MII_LXT971_ISR 19 /* Interrupt Status Register */
-#define MII_LXT971_LCR 20 /* LED Control Register */
-#define MII_LXT971_TCR 30 /* Transmit Control Register */
-
-/*
- * I had some nice ideas of running the MDIO faster...
- * The 971 should support 8MHz and I tried it, but things acted really
- * weird, so 2.5 MHz ought to be enough for anyone...
- */
-
-static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x4000) {
- if (mii_reg & 0x0200)
- s |= PHY_STAT_100FDX;
- else
- s |= PHY_STAT_100HDX;
- } else {
- if (mii_reg & 0x0200)
- s |= PHY_STAT_10FDX;
- else
- s |= PHY_STAT_10HDX;
- }
- if (mii_reg & 0x0008)
- s |= PHY_STAT_FAULT;
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_lxt971 = {
- 0x0001378e,
- "LXT971",
-
- (const phy_cmd_t []) { /* config */
- /* configure link capabilities to advertise */
- { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_DEFAULT),
- mii_parse_anar },
-
- /* enable auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
-
- /* restart auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
- NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
- { mk_mii_read(MII_BMSR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
-
- /* we only need to read ISR to acknowledge */
- { mk_mii_read(MII_LXT971_ISR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FCC_LXT971 */
-
-/* ------------------------------------------------------------------------- */
-/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
-
-#ifdef CONFIG_FCC_QS6612
-
-/* register definitions */
-
-#define MII_QS6612_MCR 17 /* Mode Control Register */
-#define MII_QS6612_FTR 27 /* Factory Test Register */
-#define MII_QS6612_MCO 28 /* Misc. Control Register */
-#define MII_QS6612_ISR 29 /* Interrupt Source Register */
-#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
-#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
-
-static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- switch((mii_reg >> 2) & 7) {
- case 1: s |= PHY_STAT_10HDX; break;
- case 2: s |= PHY_STAT_100HDX; break;
- case 5: s |= PHY_STAT_10FDX; break;
- case 6: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_qs6612 = {
- 0x00181440,
- "QS6612",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_ADVERTISE, 0x061), NULL }, /* 10 Mbps */
-
- /* The PHY powers up isolated on the RPX,
- * so send a command to allow operation.
- */
-
- { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
-
- /* parse cr and anar to get some info */
-
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read ISR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_QS6612_ISR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_EXPANSION), NULL },
-
- /* read pcr to get info */
-
- { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-
-#endif /* CONFIG_FEC_QS6612 */
-
-
-/* ------------------------------------------------------------------------- */
-/* The Davicom DM9131 is used on the HYMOD board */
-
-#ifdef CONFIG_FCC_DM9131
-
-/* register definitions */
-
-#define MII_DM9131_ACR 16 /* Aux. Config Register */
-#define MII_DM9131_ACSR 17 /* Aux. Config/Status Register */
-#define MII_DM9131_10TCSR 18 /* 10BaseT Config/Status Reg. */
-#define MII_DM9131_INTR 21 /* Interrupt Register */
-#define MII_DM9131_RECR 22 /* Receive Error Counter Reg. */
-#define MII_DM9131_DISCR 23 /* Disconnect Counter Register */
-
-static void mii_parse_dm9131_acsr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- switch ((mii_reg >> 12) & 0xf) {
- case 1: s |= PHY_STAT_10HDX; break;
- case 2: s |= PHY_STAT_10FDX; break;
- case 4: s |= PHY_STAT_100HDX; break;
- case 8: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_dm9131 = {
- 0x00181b80,
- "DM9131",
-
- (const phy_cmd_t []) { /* config */
- /* parse cr and anar to get some info */
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_DM9131_INTR, 0x0002), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read INTR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_DM9131_INTR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_EXPANSION), NULL },
-
- /* read acsr to get info */
-
- { mk_mii_read(MII_DM9131_ACSR), mii_parse_dm9131_acsr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_DM9131_INTR, 0x0f00), NULL },
- { mk_mii_end, }
- },
-};
-
-
-#endif /* CONFIG_FEC_DM9131 */
-#ifdef CONFIG_FCC_DM9161
-/* ------------------------------------------------------------------------- */
-/* DM9161 Control register values */
-#define MIIM_DM9161_CR_STOP 0x0400
-#define MIIM_DM9161_CR_RSTAN 0x1200
-
-#define MIIM_DM9161_SCR 0x10
-#define MIIM_DM9161_SCR_INIT 0x0610
-
-/* DM9161 Specified Configuration and Status Register */
-#define MIIM_DM9161_SCSR 0x11
-#define MIIM_DM9161_SCSR_100F 0x8000
-#define MIIM_DM9161_SCSR_100H 0x4000
-#define MIIM_DM9161_SCSR_10F 0x2000
-#define MIIM_DM9161_SCSR_10H 0x1000
-/* DM9161 10BT register */
-#define MIIM_DM9161_10BTCSR 0x12
-#define MIIM_DM9161_10BTCSR_INIT 0x7800
-/* DM9161 Interrupt Register */
-#define MIIM_DM9161_INTR 0x15
-#define MIIM_DM9161_INTR_PEND 0x8000
-#define MIIM_DM9161_INTR_DPLX_MASK 0x0800
-#define MIIM_DM9161_INTR_SPD_MASK 0x0400
-#define MIIM_DM9161_INTR_LINK_MASK 0x0200
-#define MIIM_DM9161_INTR_MASK 0x0100
-#define MIIM_DM9161_INTR_DPLX_CHANGE 0x0010
-#define MIIM_DM9161_INTR_SPD_CHANGE 0x0008
-#define MIIM_DM9161_INTR_LINK_CHANGE 0x0004
-#define MIIM_DM9161_INTR_INIT 0x0000
-#define MIIM_DM9161_INTR_STOP \
-(MIIM_DM9161_INTR_DPLX_MASK | MIIM_DM9161_INTR_SPD_MASK \
- | MIIM_DM9161_INTR_LINK_MASK | MIIM_DM9161_INTR_MASK)
-
-static void mii_parse_dm9161_sr(uint mii_reg, struct net_device * dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint regstat, timeout=0xffff;
-
- while(!(mii_reg & 0x0020) && timeout--)
- {
- regstat=mk_mii_read(MII_BMSR);
- regstat |= fep->phy_addr <<23;
- mii_reg = mii_send_receive(fep->fip,regstat);
- }
-
- mii_parse_sr(mii_reg, dev);
-}
-
-static void mii_parse_dm9161_scsr(uint mii_reg, struct net_device * dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
- switch((mii_reg >>12) & 0xf) {
- case 1:
- {
- s |= PHY_STAT_10HDX;
- printk("10BaseT Half Duplex\n");
- break;
- }
- case 2:
- {
- s |= PHY_STAT_10FDX;
- printk("10BaseT Full Duplex\n");
- break;
- }
- case 4:
- {
- s |= PHY_STAT_100HDX;
- printk("100BaseT Half Duplex\n");
- break;
- }
- case 8:
- {
- s |= PHY_STAT_100FDX;
- printk("100BaseT Full Duplex\n");
- break;
- }
- }
-
- fep->phy_status = s;
-
-}
-
-static void mii_dm9161_wait(uint mii_reg, struct net_device *dev)
-{
- int timeout = HZ;
-
- /* Davicom takes a bit to come up after a reset,
- * so wait here for a bit */
- schedule_timeout_uninterruptible(timeout);
-}
-
-static phy_info_t phy_info_dm9161 = {
- 0x00181b88,
- "Davicom DM9161E",
- (const phy_cmd_t[]) { /* config */
- { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_STOP), NULL},
- /* Do not bypass the scrambler/descrambler */
- { mk_mii_write(MIIM_DM9161_SCR, MIIM_DM9161_SCR_INIT), NULL},
- /* Configure 10BTCSR register */
- { mk_mii_write(MIIM_DM9161_10BTCSR, MIIM_DM9161_10BTCSR_INIT),NULL},
- /* Configure some basic stuff */
- { mk_mii_write(MII_BMCR, 0x1000), NULL},
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* startup */
- /* Restart Auto Negotiation */
- { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_RSTAN), NULL},
- /* Status is read once to clear old link state */
- { mk_mii_read(MII_BMSR), mii_dm9161_wait},
- /* Auto-negotiate */
- { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
- /* Read the status */
- { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
- /* Clear any pending interrupts */
- { mk_mii_read(MIIM_DM9161_INTR), NULL},
- /* Enable Interrupts */
- { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_INIT), NULL},
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* ack_int */
- { mk_mii_read(MIIM_DM9161_INTR), NULL},
-#if 0
- { mk_mii_read(MII_BMSR), NULL},
- { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
- { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
-#endif
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* shutdown */
- { mk_mii_read(MIIM_DM9161_INTR),NULL},
- { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_STOP), NULL},
- { mk_mii_end,}
- },
-};
-#endif /* CONFIG_FCC_DM9161 */
-
-static phy_info_t *phy_info[] = {
-
-#ifdef CONFIG_FCC_LXT970
- &phy_info_lxt970,
-#endif /* CONFIG_FEC_LXT970 */
-
-#ifdef CONFIG_FCC_LXT971
- &phy_info_lxt971,
-#endif /* CONFIG_FEC_LXT971 */
-
-#ifdef CONFIG_FCC_QS6612
- &phy_info_qs6612,
-#endif /* CONFIG_FEC_QS6612 */
-
-#ifdef CONFIG_FCC_DM9131
- &phy_info_dm9131,
-#endif /* CONFIG_FEC_DM9131 */
-
-#ifdef CONFIG_FCC_DM9161
- &phy_info_dm9161,
-#endif /* CONFIG_FCC_DM9161 */
-
-#ifdef CONFIG_FCC_GENERIC_PHY
- /* Generic PHY support. This must be the last PHY in the table.
- * It will be used to support any PHY that doesn't match a previous
- * entry in the table.
- */
- &phy_info_generic,
-#endif /* CONFIG_FCC_GENERIC_PHY */
-
- NULL
-};
-
-static void mii_display_status(struct work_struct *work)
-{
- volatile struct fcc_enet_private *fep =
- container_of(work, struct fcc_enet_private, phy_relink);
- struct net_device *dev = fep->dev;
- uint s = fep->phy_status;
-
- if (!fep->link && !fep->old_link) {
- /* Link is still down - don't print anything */
- return;
- }
-
- printk("%s: status: ", dev->name);
-
- if (!fep->link) {
- printk("link down");
- } else {
- printk("link up");
-
- switch(s & PHY_STAT_SPMASK) {
- case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break;
- case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break;
- case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break;
- case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break;
- default:
- printk(", Unknown speed/duplex");
- }
-
- if (s & PHY_STAT_ANC)
- printk(", auto-negotiation complete");
- }
-
- if (s & PHY_STAT_FAULT)
- printk(", remote fault");
-
- printk(".\n");
-}
-
-static void mii_display_config(struct work_struct *work)
-{
- volatile struct fcc_enet_private *fep =
- container_of(work, struct fcc_enet_private,
- phy_display_config);
- struct net_device *dev = fep->dev;
- uint s = fep->phy_status;
-
- printk("%s: config: auto-negotiation ", dev->name);
-
- if (s & PHY_CONF_ANE)
- printk("on");
- else
- printk("off");
-
- if (s & PHY_CONF_100FDX)
- printk(", 100FDX");
- if (s & PHY_CONF_100HDX)
- printk(", 100HDX");
- if (s & PHY_CONF_10FDX)
- printk(", 10FDX");
- if (s & PHY_CONF_10HDX)
- printk(", 10HDX");
- if (!(s & PHY_CONF_SPMASK))
- printk(", No speed/duplex selected?");
-
- if (s & PHY_CONF_LOOP)
- printk(", loopback enabled");
-
- printk(".\n");
-
- fep->sequence_done = 1;
-}
-
-static void mii_relink(struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
- int duplex = 0;
-
- fep->old_link = fep->link;
- fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
-
-#ifdef MDIO_DEBUG
- printk(" mii_relink: link=%d\n", fep->link);
-#endif
-
- if (fep->link) {
- if (fep->phy_status
- & (PHY_STAT_100FDX | PHY_STAT_10FDX))
- duplex = 1;
- fcc_restart(dev, duplex);
-#ifdef MDIO_DEBUG
- printk(" mii_relink: duplex=%d\n", duplex);
-#endif
- }
-}
-
-static void mii_queue_relink(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
- mii_relink(dev);
-
- schedule_work(&fep->phy_relink);
-}
-
-static void mii_queue_config(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
- schedule_work(&fep->phy_display_config);
-}
-
-phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_BMCR), mii_queue_relink },
- { mk_mii_end, } };
-phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_BMCR), mii_queue_config },
- { mk_mii_end, } };
-
-
-/* Read remainder of PHY ID.
-*/
-static void
-mii_discover_phy3(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep;
- int i;
-
- fep = dev->priv;
- printk("mii_reg: %08x\n", mii_reg);
- fep->phy_id |= (mii_reg & 0xffff);
-
- for(i = 0; phy_info[i]; i++)
- if((phy_info[i]->id == (fep->phy_id >> 4)) || !phy_info[i]->id)
- break;
-
- if(!phy_info[i])
- panic("%s: PHY id 0x%08x is not supported!\n",
- dev->name, fep->phy_id);
-
- fep->phy = phy_info[i];
- fep->phy_id_done = 1;
-
- printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
- dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
-}
-
-/* Scan all of the MII PHY addresses looking for someone to respond
- * with a valid ID. This usually happens quickly.
- */
-static void
-mii_discover_phy(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep;
- uint phytype;
-
- fep = dev->priv;
-
- if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
-
- /* Got first part of ID, now get remainder. */
- fep->phy_id = phytype << 16;
- mii_queue(dev, mk_mii_read(MII_PHYSID2), mii_discover_phy3);
- } else {
- fep->phy_addr++;
- if (fep->phy_addr < 32) {
- mii_queue(dev, mk_mii_read(MII_PHYSID1),
- mii_discover_phy);
- } else {
- printk("fec: No PHY device found.\n");
- }
- }
-}
-#endif /* CONFIG_USE_MDIO */
-
-#ifdef PHY_INTERRUPT
-/* This interrupt occurs when the PHY detects a link change. */
-static irqreturn_t
-mii_link_interrupt(int irq, void * dev_id)
-{
- struct net_device *dev = dev_id;
- struct fcc_enet_private *fep = dev->priv;
- fcc_info_t *fip = fep->fip;
-
- if (fep->phy) {
- /* We don't want to be interrupted by an FCC
- * interrupt here.
- */
- disable_irq_nosync(fip->fc_interrupt);
-
- mii_do_cmd(dev, fep->phy->ack_int);
- /* restart and display status */
- mii_do_cmd(dev, phy_cmd_relink);
-
- enable_irq(fip->fc_interrupt);
- }
- return IRQ_HANDLED;
-}
-#endif /* ifdef PHY_INTERRUPT */
-
-#if 0 /* This should be fixed someday */
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-static void
-set_multicast_list(struct net_device *dev)
-{
- struct fcc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile fcc_enet_t *ep;
- int i, j;
-
- cep = (struct fcc_enet_private *)dev->priv;
-
-return;
- /* Get pointer to FCC area in parameter RAM.
- */
- ep = (fcc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->fccp->fcc_fpsmr |= FCC_PSMR_PRO;
- } else {
-
- cep->fccp->fcc_fpsmr &= ~FCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->fen_gaddrh = 0xffffffff;
- ep->fen_gaddrl = 0xffffffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->fen_gaddrh = 0;
- ep->fen_gaddrl = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++, dmi = dmi->next) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->fen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(cep->fip->fc_cpmpage,
- cep->fip->fc_cpmblock, 0x0c,
- CPM_CR_SET_GADDR) | CPM_CR_FLG;
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-#endif /* if 0 */
-
-
-/* Set the individual MAC address.
- */
-int fcc_enet_set_mac_address(struct net_device *dev, void *p)
-{
- struct sockaddr *addr= (struct sockaddr *) p;
- struct fcc_enet_private *cep;
- volatile fcc_enet_t *ep;
- unsigned char *eap;
- int i;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- ep = cep->ep;
-
- if (netif_running(dev))
- return -EBUSY;
-
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
-
- eap = (unsigned char *) &(ep->fen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = addr->sa_data[i];
-
- return 0;
-}
-
-
-/* Initialize the CPM Ethernet on FCC.
- */
-static int __init fec_enet_init(void)
-{
- struct net_device *dev;
- struct fcc_enet_private *cep;
- fcc_info_t *fip;
- int i, np, err;
- volatile cpm2_map_t *immap;
- volatile iop_cpm2_t *io;
-
- immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
- io = &immap->im_ioport;
-
- np = sizeof(fcc_ports) / sizeof(fcc_info_t);
- fip = fcc_ports;
-
- while (np-- > 0) {
- /* Create an Ethernet device instance.
- */
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
- cep->fip = fip;
-
- init_fcc_shutdown(fip, cep, immap);
- init_fcc_ioports(fip, io, immap);
- init_fcc_param(fip, dev, immap);
-
- dev->base_addr = (unsigned long)(cep->ep);
-
- /* The CPM Ethernet specific entries in the device
- * structure.
- */
- dev->open = fcc_enet_open;
- dev->hard_start_xmit = fcc_enet_start_xmit;
- dev->tx_timeout = fcc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fcc_enet_close;
- dev->get_stats = fcc_enet_get_stats;
- /* dev->set_multicast_list = set_multicast_list; */
- dev->set_mac_address = fcc_enet_set_mac_address;
-
- init_fcc_startup(fip, dev);
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk("%s: FCC ENET Version 0.3, ", dev->name);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
-#ifdef CONFIG_USE_MDIO
- /* Queue up command to detect the PHY and initialize the
- * remainder of the interface.
- */
- cep->phy_id_done = 0;
- cep->phy_addr = fip->fc_phyaddr;
- mii_queue(dev, mk_mii_read(MII_PHYSID1), mii_discover_phy);
- INIT_WORK(&cep->phy_relink, mii_display_status);
- INIT_WORK(&cep->phy_display_config, mii_display_config);
- cep->dev = dev;
-#endif /* CONFIG_USE_MDIO */
-
- fip++;
- }
-
- return 0;
-}
-module_init(fec_enet_init);
-
-/* Make sure the device is shut down during initialization.
-*/
-static void __init
-init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
- volatile cpm2_map_t *immap)
-{
- volatile fcc_enet_t *ep;
- volatile fcc_t *fccp;
-
- /* Get pointer to FCC area in parameter RAM.
- */
- ep = (fcc_enet_t *)(&immap->im_dprambase[fip->fc_proff]);
-
- /* And another to the FCC register area.
- */
- fccp = (volatile fcc_t *)(&immap->im_fcc[fip->fc_fccnum]);
- cep->fccp = fccp; /* Keep the pointers handy */
- cep->ep = ep;
-
- /* Disable receive and transmit in case someone left it running.
- */
- fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
-}
-
-/* Initialize the I/O pins for the FCC Ethernet.
-*/
-static void __init
-init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io,
- volatile cpm2_map_t *immap)
-{
-
- /* FCC1 pins are on port A/C. FCC2/3 are port B/C.
- */
- if (fip->fc_proff == PROFF_FCC1) {
- /* Configure port A and C pins for FCC1 Ethernet.
- */
- io->iop_pdira &= ~PA1_DIRA_BOUT;
- io->iop_pdira |= PA1_DIRA_BIN;
- io->iop_psora &= ~PA1_PSORA_BOUT;
- io->iop_psora |= PA1_PSORA_BIN;
- io->iop_ppara |= (PA1_DIRA_BOUT | PA1_DIRA_BIN);
- }
- if (fip->fc_proff == PROFF_FCC2) {
- /* Configure port B and C pins for FCC Ethernet.
- */
- io->iop_pdirb &= ~PB2_DIRB_BOUT;
- io->iop_pdirb |= PB2_DIRB_BIN;
- io->iop_psorb &= ~PB2_PSORB_BOUT;
- io->iop_psorb |= PB2_PSORB_BIN;
- io->iop_pparb |= (PB2_DIRB_BOUT | PB2_DIRB_BIN);
- }
- if (fip->fc_proff == PROFF_FCC3) {
- /* Configure port B and C pins for FCC Ethernet.
- */
- io->iop_pdirb &= ~PB3_DIRB_BOUT;
- io->iop_pdirb |= PB3_DIRB_BIN;
- io->iop_psorb &= ~PB3_PSORB_BOUT;
- io->iop_psorb |= PB3_PSORB_BIN;
- io->iop_pparb |= (PB3_DIRB_BOUT | PB3_DIRB_BIN);
-
- io->iop_pdirc &= ~PC3_DIRC_BOUT;
- io->iop_pdirc |= PC3_DIRC_BIN;
- io->iop_psorc &= ~PC3_PSORC_BOUT;
- io->iop_psorc |= PC3_PSORC_BIN;
- io->iop_pparc |= (PC3_DIRC_BOUT | PC3_DIRC_BIN);
-
- }
-
- /* Port C has clocks......
- */
- io->iop_psorc &= ~(fip->fc_trxclocks);
- io->iop_pdirc &= ~(fip->fc_trxclocks);
- io->iop_pparc |= fip->fc_trxclocks;
-
-#ifdef CONFIG_USE_MDIO
- /* ....and the MII serial clock/data.
- */
- io->iop_pdatc |= (fip->fc_mdio | fip->fc_mdck);
- io->iop_podrc &= ~(fip->fc_mdio | fip->fc_mdck);
- io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck);
- io->iop_pparc &= ~(fip->fc_mdio | fip->fc_mdck);
-#endif /* CONFIG_USE_MDIO */
-
- /* Configure Serial Interface clock routing.
- * First, clear all FCC bits to zero,
- * then set the ones we want.
- */
- immap->im_cpmux.cmx_fcr &= ~(fip->fc_clockmask);
- immap->im_cpmux.cmx_fcr |= fip->fc_clockroute;
-}
-
-static void __init
-init_fcc_param(fcc_info_t *fip, struct net_device *dev,
- volatile cpm2_map_t *immap)
-{
- unsigned char *eap;
- unsigned long mem_addr;
- bd_t *bd;
- int i, j;
- struct fcc_enet_private *cep;
- volatile fcc_enet_t *ep;
- volatile cbd_t *bdp;
- volatile cpm_cpm2_t *cp;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- ep = cep->ep;
- cp = cpmp;
-
- bd = (bd_t *)__res;
-
- /* Zero the whole thing.....I must have missed some individually.
- * It works when I do this.
- */
- memset((char *)ep, 0, sizeof(fcc_enet_t));
-
- /* Allocate space for the buffer descriptors from regular memory.
- * Initialize base addresses for the buffer descriptors.
- */
- cep->rx_bd_base = kmalloc(sizeof(cbd_t) * RX_RING_SIZE,
- GFP_KERNEL | GFP_DMA);
- ep->fen_genfcc.fcc_rbase = __pa(cep->rx_bd_base);
- cep->tx_bd_base = kmalloc(sizeof(cbd_t) * TX_RING_SIZE,
- GFP_KERNEL | GFP_DMA);
- ep->fen_genfcc.fcc_tbase = __pa(cep->tx_bd_base);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- ep->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB) << 24;
- ep->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB) << 24;
-
- /* Set maximum bytes per receive buffer.
- * It must be a multiple of 32.
- */
- ep->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Allocate space in the reserved FCC area of DPRAM for the
- * internal buffers. No one uses this space (yet), so we
- * can do this. Later, we will add resource management for
- * this area.
- */
- mem_addr = CPM_FCC_SPECIAL_BASE + (fip->fc_fccnum * 128);
- ep->fen_genfcc.fcc_riptr = mem_addr;
- ep->fen_genfcc.fcc_tiptr = mem_addr+32;
- ep->fen_padptr = mem_addr+64;
- memset((char *)(&(immap->im_dprambase[(mem_addr+64)])), 0x88, 32);
-
- ep->fen_genfcc.fcc_rbptr = 0;
- ep->fen_genfcc.fcc_tbptr = 0;
- ep->fen_genfcc.fcc_rcrc = 0;
- ep->fen_genfcc.fcc_tcrc = 0;
- ep->fen_genfcc.fcc_res1 = 0;
- ep->fen_genfcc.fcc_res2 = 0;
-
- ep->fen_camptr = 0; /* CAM isn't used in this driver */
-
- /* Set CRC preset and mask.
- */
- ep->fen_cmask = 0xdebb20e3;
- ep->fen_cpres = 0xffffffff;
-
- ep->fen_crcec = 0; /* CRC Error counter */
- ep->fen_alec = 0; /* alignment error counter */
- ep->fen_disfc = 0; /* discard frame counter */
- ep->fen_retlim = 15; /* Retry limit threshold */
- ep->fen_pper = 0; /* Normal persistence */
-
- /* Clear hash filter tables.
- */
- ep->fen_gaddrh = 0;
- ep->fen_gaddrl = 0;
- ep->fen_iaddrh = 0;
- ep->fen_iaddrl = 0;
-
- /* Clear the Out-of-sequence TxBD.
- */
- ep->fen_tfcstat = 0;
- ep->fen_tfclen = 0;
- ep->fen_tfcptr = 0;
-
- ep->fen_mflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->fen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- /* Set Ethernet station address.
- *
- * This is supplied in the board information structure, so we
- * copy that into the controller.
- * So, far we have only been given one Ethernet address. We make
- * it unique by setting a few bits in the upper byte of the
- * non-static part of the address.
- */
- eap = (unsigned char *)&(ep->fen_paddrh);
- for (i=5; i>=0; i--) {
-
-/*
- * The EP8260 only uses FCC3, so we can safely give it the real
- * MAC address.
- */
-#ifdef CONFIG_SBC82xx
- if (i == 5) {
- /* bd->bi_enetaddr holds the SCC0 address; the FCC
- devices count up from there */
- dev->dev_addr[i] = bd->bi_enetaddr[i] & ~3;
- dev->dev_addr[i] += 1 + fip->fc_fccnum;
- *eap++ = dev->dev_addr[i];
- }
-#else
-#ifndef CONFIG_RPX8260
- if (i == 3) {
- dev->dev_addr[i] = bd->bi_enetaddr[i];
- dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum));
- *eap++ = dev->dev_addr[i];
- } else
-#endif
- {
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
- }
-#endif
- }
-
- ep->fen_taddrh = 0;
- ep->fen_taddrm = 0;
- ep->fen_taddrl = 0;
-
- ep->fen_maxd1 = PKT_MAXDMA_SIZE; /* maximum DMA1 length */
- ep->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length */
-
- /* Clear stat counters, in case we ever enable RMON.
- */
- ep->fen_octc = 0;
- ep->fen_colc = 0;
- ep->fen_broc = 0;
- ep->fen_mulc = 0;
- ep->fen_uspc = 0;
- ep->fen_frgc = 0;
- ep->fen_ospc = 0;
- ep->fen_jbrc = 0;
- ep->fen_p64c = 0;
- ep->fen_p65c = 0;
- ep->fen_p128c = 0;
- ep->fen_p256c = 0;
- ep->fen_p512c = 0;
- ep->fen_p1024c = 0;
-
- ep->fen_rfthr = 0; /* Suggested by manual */
- ep->fen_rfcnt = 0;
- ep->fen_cftype = 0;
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- for (i=0; i<FCC_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- mem_addr = __get_free_page(GFP_KERNEL);
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<FCC_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = __pa(mem_addr);
- mem_addr += FCC_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, 0x0c,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-}
-
-/* Let 'er rip.
-*/
-static void __init
-init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
-{
- volatile fcc_t *fccp;
- struct fcc_enet_private *cep;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- fccp = cep->fccp;
-
-#ifdef CONFIG_RPX8260
-#ifdef PHY_INTERRUPT
- /* Route PHY interrupt to IRQ. The following code only works for
- * IRQ1 - IRQ7. It does not work for Port C interrupts.
- */
- *((volatile u_char *) (RPX_CSR_ADDR + 13)) &= ~BCSR13_FETH_IRQMASK;
- *((volatile u_char *) (RPX_CSR_ADDR + 13)) |=
- ((PHY_INTERRUPT - SIU_INT_IRQ1 + 1) << 4);
-#endif
- /* Initialize MDIO pins. */
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) &= ~BCSR4_MII_MDC;
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) |=
- BCSR4_MII_READ | BCSR4_MII_MDIO;
- /* Enable external LXT971 PHY. */
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) |= BCSR4_EN_PHY;
- udelay(1000);
- *((volatile u_char *) (RPX_CSR_ADDR+ 4)) |= BCSR4_EN_MII;
- udelay(1000);
-#endif /* ifdef CONFIG_RPX8260 */
-
- fccp->fcc_fcce = 0xffff; /* Clear any pending events */
-
- /* Leave FCC interrupts masked for now. Will be unmasked by
- * fcc_restart().
- */
- fccp->fcc_fccm = 0;
-
- /* Install our interrupt handler.
- */
- if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0, "fenet",
- dev) < 0)
- printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
-
-#ifdef PHY_INTERRUPT
- /* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
- * on Port C.
- */
- ((volatile cpm2_map_t *) CPM_MAP_ADDR)->im_intctl.ic_siexr |=
- (1 << (14 - (PHY_INTERRUPT - SIU_INT_IRQ1)));
-
- if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
- "mii", dev) < 0)
- printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
-#endif /* PHY_INTERRUPT */
-
- /* Set GFMR to enable Ethernet operating mode.
- */
- fccp->fcc_gfmr = (FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- fccp->fcc_fdsr = 0xd555;
-
- /* Set protocol specific processing mode for Ethernet.
- * This has to be adjusted for Full Duplex operation after we can
- * determine how to detect that.
- */
- fccp->fcc_fpsmr = FCC_PSMR_ENCRC;
-
-#ifdef CONFIG_PQ2ADS
- /* Enable the PHY. */
- *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_FETHIEN;
- *(volatile uint *)(BCSR_ADDR + 4) |= BCSR1_FETH_RST;
-#endif
-#if defined(CONFIG_PQ2ADS) || defined(CONFIG_PQ2FADS)
- /* Enable the 2nd PHY. */
- *(volatile uint *)(BCSR_ADDR + 12) &= ~BCSR3_FETHIEN2;
- *(volatile uint *)(BCSR_ADDR + 12) |= BCSR3_FETH2_RST;
-#endif
-
-#if defined(CONFIG_USE_MDIO) || defined(CONFIG_TQM8260)
- /* start in full duplex mode, and negotiate speed
- */
- fcc_restart (dev, 1);
-#else
- /* start in half duplex mode
- */
- fcc_restart (dev, 0);
-#endif
-}
-
-#ifdef CONFIG_USE_MDIO
-/* MII command/status interface.
- * I'm not going to describe all of the details. You can find the
- * protocol definition in many other places, including the data sheet
- * of most PHY parts.
- * I wonder what "they" were thinking (maybe weren't) when they leave
- * the I2C in the CPM but I have to toggle these bits......
- */
-#ifdef CONFIG_RPX8260
- /* The EP8260 has the MDIO pins in a BCSR instead of on Port C
- * like most other boards.
- */
-#define MDIO_ADDR ((volatile u_char *)(RPX_CSR_ADDR + 4))
-#define MAKE_MDIO_OUTPUT *MDIO_ADDR &= ~BCSR4_MII_READ
-#define MAKE_MDIO_INPUT *MDIO_ADDR |= BCSR4_MII_READ | BCSR4_MII_MDIO
-#define OUT_MDIO(bit) \
- if (bit) \
- *MDIO_ADDR |= BCSR4_MII_MDIO; \
- else \
- *MDIO_ADDR &= ~BCSR4_MII_MDIO;
-#define IN_MDIO (*MDIO_ADDR & BCSR4_MII_MDIO)
-#define OUT_MDC(bit) \
- if (bit) \
- *MDIO_ADDR |= BCSR4_MII_MDC; \
- else \
- *MDIO_ADDR &= ~BCSR4_MII_MDC;
-#else /* ifdef CONFIG_RPX8260 */
- /* This is for the usual case where the MDIO pins are on Port C.
- */
-#define MDIO_ADDR (((volatile cpm2_map_t *)CPM_MAP_ADDR)->im_ioport)
-#define MAKE_MDIO_OUTPUT MDIO_ADDR.iop_pdirc |= fip->fc_mdio
-#define MAKE_MDIO_INPUT MDIO_ADDR.iop_pdirc &= ~fip->fc_mdio
-#define OUT_MDIO(bit) \
- if (bit) \
- MDIO_ADDR.iop_pdatc |= fip->fc_mdio; \
- else \
- MDIO_ADDR.iop_pdatc &= ~fip->fc_mdio;
-#define IN_MDIO ((MDIO_ADDR.iop_pdatc) & fip->fc_mdio)
-#define OUT_MDC(bit) \
- if (bit) \
- MDIO_ADDR.iop_pdatc |= fip->fc_mdck; \
- else \
- MDIO_ADDR.iop_pdatc &= ~fip->fc_mdck;
-#endif /* ifdef CONFIG_RPX8260 */
-
-static uint
-mii_send_receive(fcc_info_t *fip, uint cmd)
-{
- uint retval;
- int read_op, i, off;
- const int us = 1;
-
- read_op = ((cmd & 0xf0000000) == 0x60000000);
-
- /* Write preamble
- */
- OUT_MDIO(1);
- MAKE_MDIO_OUTPUT;
- OUT_MDIO(1);
- for (i = 0; i < 32; i++)
- {
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
- }
-
- /* Write data
- */
- for (i = 0, off = 31; i < (read_op ? 14 : 32); i++, --off)
- {
- OUT_MDIO((cmd >> off) & 0x00000001);
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
- }
-
- retval = cmd;
-
- if (read_op)
- {
- retval >>= 16;
-
- MAKE_MDIO_INPUT;
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
-
- for (i = 0; i < 16; i++)
- {
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- retval <<= 1;
- if (IN_MDIO)
- retval++;
- OUT_MDC(0);
- }
- }
-
- MAKE_MDIO_INPUT;
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
-
- return retval;
-}
-#endif /* CONFIG_USE_MDIO */
-
-static void
-fcc_stop(struct net_device *dev)
-{
- struct fcc_enet_private *fep= (struct fcc_enet_private *)(dev->priv);
- volatile fcc_t *fccp = fep->fccp;
- fcc_info_t *fip = fep->fip;
- volatile fcc_enet_t *ep = fep->ep;
- volatile cpm_cpm2_t *cp = cpmp;
- volatile cbd_t *bdp;
- int i;
-
- if ((fccp->fcc_gfmr & (FCC_GFMR_ENR | FCC_GFMR_ENT)) == 0)
- return; /* already down */
-
- fccp->fcc_fccm = 0;
-
- /* issue the graceful stop tx command */
- while (cp->cp_cpcr & CPM_CR_FLG);
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
- 0x0c, CPM_CR_GRA_STOP_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Disable transmit/receive */
- fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
-
- /* issue the restart tx command */
- fccp->fcc_fcce = FCC_ENET_GRA;
- while (cp->cp_cpcr & CPM_CR_FLG);
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
- 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* free tx buffers */
- fep->skb_cur = fep->skb_dirty = 0;
- for (i=0; i<=TX_RING_MOD_MASK; i++) {
- if (fep->tx_skbuff[i] != NULL) {
- dev_kfree_skb(fep->tx_skbuff[i]);
- fep->tx_skbuff[i] = NULL;
- }
- }
- fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
- fep->tx_free = TX_RING_SIZE;
- ep->fen_genfcc.fcc_tbptr = ep->fen_genfcc.fcc_tbase;
-
- /* Initialize the tx buffer descriptors. */
- bdp = fep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
- bdp->cbd_sc = 0;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
- /* Set the last buffer to wrap. */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-}
-
-static void
-fcc_restart(struct net_device *dev, int duplex)
-{
- struct fcc_enet_private *fep = (struct fcc_enet_private *)(dev->priv);
- volatile fcc_t *fccp = fep->fccp;
-
- /* stop any transmissions in progress */
- fcc_stop(dev);
-
- if (duplex)
- fccp->fcc_fpsmr |= FCC_PSMR_FDE | FCC_PSMR_LPB;
- else
- fccp->fcc_fpsmr &= ~(FCC_PSMR_FDE | FCC_PSMR_LPB);
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
-
- /* Enable transmit/receive */
- fccp->fcc_gfmr |= FCC_GFMR_ENR | FCC_GFMR_ENT;
-}
-
-static int
-fcc_enet_open(struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
-#ifdef CONFIG_USE_MDIO
- fep->sequence_done = 0;
- fep->link = 0;
-
- if (fep->phy) {
- fcc_restart(dev, 0); /* always start in half-duplex */
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, fep->phy->config);
- mii_do_cmd(dev, phy_cmd_config); /* display configuration */
- while(!fep->sequence_done)
- schedule();
-
- mii_do_cmd(dev, fep->phy->startup);
- netif_start_queue(dev);
- return 0; /* Success */
- }
- return -ENODEV; /* No PHY we understand */
-#else
- fep->link = 1;
- fcc_restart(dev, 0); /* always start in half-duplex */
- netif_start_queue(dev);
- return 0; /* Always succeed */
-#endif /* CONFIG_USE_MDIO */
-}
-
diff --git a/arch/ppc/8xx_io/Kconfig b/arch/ppc/8xx_io/Kconfig
deleted file mode 100644
index c623e44f01ad..000000000000
--- a/arch/ppc/8xx_io/Kconfig
+++ /dev/null
@@ -1,134 +0,0 @@
-#
-# MPC8xx Communication options
-#
-
-menu "MPC8xx CPM Options"
- depends on 8xx
-
-config SCC_ENET
- bool "CPM SCC Ethernet"
- depends on NET_ETHERNET
- help
- Enable Ethernet support via the Motorola MPC8xx serial
- communications controller.
-
-choice
- prompt "SCC used for Ethernet"
- depends on SCC_ENET
- default SCC1_ENET
-
-config SCC1_ENET
- bool "SCC1"
- help
- Use MPC8xx serial communications controller 1 to drive Ethernet
- (default).
-
-config SCC2_ENET
- bool "SCC2"
- help
- Use MPC8xx serial communications controller 2 to drive Ethernet.
-
-config SCC3_ENET
- bool "SCC3"
- help
- Use MPC8xx serial communications controller 3 to drive Ethernet.
-
-endchoice
-
-config FEC_ENET
- bool "860T FEC Ethernet"
- depends on NET_ETHERNET
- help
- Enable Ethernet support via the Fast Ethernet Controller (FCC) on
- the Motorola MPC8260.
-
-config USE_MDIO
- bool "Use MDIO for PHY configuration"
- depends on FEC_ENET
- help
- On some boards the hardware configuration of the ethernet PHY can be
- used without any software interaction over the MDIO interface, so
- all MII code can be omitted. Say N here if unsure or if you don't
- need link status reports.
-
-config FEC_AM79C874
- bool "Support AMD79C874 PHY"
- depends on USE_MDIO
-
-config FEC_LXT970
- bool "Support LXT970 PHY"
- depends on USE_MDIO
-
-config FEC_LXT971
- bool "Support LXT971 PHY"
- depends on USE_MDIO
-
-config FEC_QS6612
- bool "Support QS6612 PHY"
- depends on USE_MDIO
-
-config ENET_BIG_BUFFERS
- bool "Use Big CPM Ethernet Buffers"
- depends on SCC_ENET || FEC_ENET
- help
- Allocate large buffers for MPC8xx Ethernet. Increases throughput
- and decreases the likelihood of dropped packets, but costs memory.
-
-# This doesn't really belong here, but it is convenient to ask
-# 8xx specific questions.
-comment "Generic MPC8xx Options"
-
-config 8xx_COPYBACK
- bool "Copy-Back Data Cache (else Writethrough)"
- help
- Saying Y here will cause the cache on an MPC8xx processor to be used
- in Copy-Back mode. If you say N here, it is used in Writethrough
- mode.
-
- If in doubt, say Y here.
-
-config 8xx_CPU6
- bool "CPU6 Silicon Errata (860 Pre Rev. C)"
- help
- MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
- require workarounds for Linux (and most other OSes to work). If you
- get a BUG() very early in boot, this might fix the problem. For
- more details read the document entitled "MPC860 Family Device Errata
- Reference" on Motorola's website. This option also incurs a
- performance hit.
-
- If in doubt, say N here.
-
-choice
- prompt "Microcode patch selection"
- default NO_UCODE_PATCH
- help
- Help not implemented yet, coming soon.
-
-config NO_UCODE_PATCH
- bool "None"
-
-config USB_SOF_UCODE_PATCH
- bool "USB SOF patch"
- help
- Help not implemented yet, coming soon.
-
-config I2C_SPI_UCODE_PATCH
- bool "I2C/SPI relocation patch"
- help
- Help not implemented yet, coming soon.
-
-config I2C_SPI_SMC1_UCODE_PATCH
- bool "I2C/SPI/SMC1 relocation patch"
- help
- Help not implemented yet, coming soon.
-
-endchoice
-
-config UCODE_PATCH
- bool
- default y
- depends on !NO_UCODE_PATCH
-
-endmenu
-
diff --git a/arch/ppc/8xx_io/Makefile b/arch/ppc/8xx_io/Makefile
deleted file mode 100644
index 1051a06df7e0..000000000000
--- a/arch/ppc/8xx_io/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for the linux MPC8xx ppc-specific parts of comm processor
-#
-
-obj-y := commproc.o
-
-obj-$(CONFIG_FEC_ENET) += fec.o
-obj-$(CONFIG_SCC_ENET) += enet.o
-obj-$(CONFIG_UCODE_PATCH) += micropatch.o
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
deleted file mode 100644
index 752443df5ecf..000000000000
--- a/arch/ppc/8xx_io/commproc.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * General Purpose functions for the global management of the
- * Communication Processor Module.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * In addition to the individual control of the communication
- * channels, there are a few functions that globally affect the
- * communication processor.
- *
- * Buffer descriptors must be allocated from the dual ported memory
- * space. The allocator for that is here. When the communication
- * process is reset, we reclaim the memory available. There is
- * currently no deallocator for this memory.
- * The amount of space available is platform dependent. On the
- * MBX, the EPPC software loads additional microcode into the
- * communication processor, and uses some of the DP ram for this
- * purpose. Current, the first 512 bytes and the last 256 bytes of
- * memory are used. Right now I am conservative and only use the
- * memory that can never be used for microcode. If there are
- * applications that require more DP ram, we can expand the boundaries
- * but then we have to be careful of any downloaded microcode.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/dma-mapping.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <asm/mpc8xx.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-#include <asm/io.h>
-#include <asm/tlbflush.h>
-#include <asm/rheap.h>
-
-#define immr_map(member) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, \
- FIELD_SIZEOF(immap_t, member)); \
- addr; \
-})
-
-#define immr_map_size(member, size) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, size); \
- addr; \
-})
-
-static void m8xx_cpm_dpinit(void);
-cpm8xx_t *cpmp; /* Pointer to comm processor space */
-
-/* CPM interrupt vector functions.
-*/
-struct cpm_action {
- void (*handler)(void *);
- void *dev_id;
-};
-static struct cpm_action cpm_vecs[CPMVEC_NR];
-static irqreturn_t cpm_interrupt(int irq, void * dev);
-static irqreturn_t cpm_error_interrupt(int irq, void *dev);
-/* Define a table of names to identify CPM interrupt handlers in
- * /proc/interrupts.
- */
-const char *cpm_int_name[] =
- { "error", "PC4", "PC5", "SMC2",
- "SMC1", "SPI", "PC6", "Timer 4",
- "", "PC7", "PC8", "PC9",
- "Timer 3", "", "PC10", "PC11",
- "I2C", "RISC Timer", "Timer 2", "",
- "IDMA2", "IDMA1", "SDMA error", "PC12",
- "PC13", "Timer 1", "PC14", "SCC4",
- "SCC3", "SCC2", "SCC1", "PC15"
- };
-
-static void
-cpm_mask_irq(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
-}
-
-static void
-cpm_unmask_irq(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
-}
-
-static void
-cpm_ack(unsigned int irq)
-{
- /* We do not need to do anything here. */
-}
-
-static void
-cpm_eoi(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
-}
-
-struct hw_interrupt_type cpm_pic = {
- .typename = " CPM ",
- .enable = cpm_unmask_irq,
- .disable = cpm_mask_irq,
- .ack = cpm_ack,
- .end = cpm_eoi,
-};
-
-void
-m8xx_cpm_reset(void)
-{
- volatile immap_t *imp;
- volatile cpm8xx_t *commproc;
-
- imp = (immap_t *)IMAP_ADDR;
- commproc = (cpm8xx_t *)&imp->im_cpm;
-
-#ifdef CONFIG_UCODE_PATCH
- /* Perform a reset.
- */
- commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
-
- /* Wait for it.
- */
- while (commproc->cp_cpcr & CPM_CR_FLG);
-
- cpm_load_patch(imp);
-#endif
-
- /* Set SDMA Bus Request priority 5.
- * On 860T, this also enables FEC priority 6. I am not sure
- * this is what we really want for some applications, but the
- * manual recommends it.
- * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
- */
- out_be32(&imp->im_siu_conf.sc_sdcr, 1),
-
- /* Reclaim the DP memory for our use. */
- m8xx_cpm_dpinit();
-
- /* Tell everyone where the comm processor resides.
- */
- cpmp = (cpm8xx_t *)commproc;
-}
-
-/* This is called during init_IRQ. We used to do it above, but this
- * was too early since init_IRQ was not yet called.
- */
-static struct irqaction cpm_error_irqaction = {
- .handler = cpm_error_interrupt,
- .mask = CPU_MASK_NONE,
-};
-static struct irqaction cpm_interrupt_irqaction = {
- .handler = cpm_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "CPM cascade",
-};
-
-void
-cpm_interrupt_init(void)
-{
- int i;
-
- /* Initialize the CPM interrupt controller.
- */
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr,
- (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
- ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK);
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0);
-
- /* install the CPM interrupt controller routines for the CPM
- * interrupt vectors
- */
- for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ )
- irq_desc[i].chip = &cpm_pic;
-
- /* Set our interrupt handler with the core CPU. */
- if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction))
- panic("Could not allocate CPM IRQ!");
-
- /* Install our own error handler. */
- cpm_error_irqaction.name = cpm_int_name[CPMVEC_ERROR];
- if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
- panic("Could not allocate CPM error IRQ!");
-
- setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN);
-}
-
-/*
- * Get the CPM interrupt vector.
- */
-int
-cpm_get_irq(void)
-{
- int cpm_vec;
-
- /* Get the vector by setting the ACK bit and then reading
- * the register.
- */
- out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1);
- cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr);
- cpm_vec >>= 11;
-
- return cpm_vec;
-}
-
-/* CPM interrupt controller cascade interrupt.
-*/
-static irqreturn_t
-cpm_interrupt(int irq, void * dev)
-{
- /* This interrupt handler never actually gets called. It is
- * installed only to unmask the CPM cascade interrupt in the SIU
- * and to make the CPM cascade interrupt visible in /proc/interrupts.
- */
- return IRQ_HANDLED;
-}
-
-/* The CPM can generate the error interrupt when there is a race condition
- * between generating and masking interrupts. All we have to do is ACK it
- * and return. This is a no-op function so we don't need any special
- * tests in the interrupt handler.
- */
-static irqreturn_t
-cpm_error_interrupt(int irq, void *dev)
-{
- return IRQ_HANDLED;
-}
-
-/* A helper function to translate the handler prototype required by
- * request_irq() to the handler prototype required by cpm_install_handler().
- */
-static irqreturn_t
-cpm_handler_helper(int irq, void *dev_id)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- (*cpm_vecs[cpm_vec].handler)(dev_id);
-
- return IRQ_HANDLED;
-}
-
-/* Install a CPM interrupt handler.
- * This routine accepts a CPM interrupt vector in the range 0 to 31.
- * This routine is retained for backward compatibility. Rather than using
- * this routine to install a CPM interrupt handler, you can now use
- * request_irq() with an IRQ in the range CPM_IRQ_OFFSET to
- * CPM_IRQ_OFFSET + NR_CPM_INTS - 1 (16 to 47).
- *
- * Notice that the prototype of the interrupt handler function must be
- * different depending on whether you install the handler with
- * request_irq() or cpm_install_handler().
- */
-void
-cpm_install_handler(int cpm_vec, void (*handler)(void *), void *dev_id)
-{
- int err;
-
- /* If null handler, assume we are trying to free the IRQ.
- */
- if (!handler) {
- free_irq(CPM_IRQ_OFFSET + cpm_vec, dev_id);
- return;
- }
-
- if (cpm_vecs[cpm_vec].handler != 0)
- printk(KERN_INFO "CPM interrupt %x replacing %x\n",
- (uint)handler, (uint)cpm_vecs[cpm_vec].handler);
- cpm_vecs[cpm_vec].handler = handler;
- cpm_vecs[cpm_vec].dev_id = dev_id;
-
- if ((err = request_irq(CPM_IRQ_OFFSET + cpm_vec, cpm_handler_helper,
- 0, cpm_int_name[cpm_vec], dev_id)))
- printk(KERN_ERR "request_irq() returned %d for CPM vector %d\n",
- err, cpm_vec);
-}
-
-/* Free a CPM interrupt handler.
- * This routine accepts a CPM interrupt vector in the range 0 to 31.
- * This routine is retained for backward compatibility.
- */
-void
-cpm_free_handler(int cpm_vec)
-{
- request_irq(CPM_IRQ_OFFSET + cpm_vec, NULL, 0, 0,
- cpm_vecs[cpm_vec].dev_id);
-
- cpm_vecs[cpm_vec].handler = NULL;
- cpm_vecs[cpm_vec].dev_id = NULL;
-}
-
-/* Set a baud rate generator. This needs lots of work. There are
- * four BRGs, any of which can be wired to any channel.
- * The internal baud rate clock is the system clock divided by 16.
- * This assumes the baudrate is 16x oversampled by the uart.
- */
-#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq)
-#define BRG_UART_CLK (BRG_INT_CLK/16)
-#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16)
-
-void
-cpm_setbrg(uint brg, uint rate)
-{
- volatile uint *bp;
-
- /* This is good enough to get SMCs running.....
- */
- bp = (uint *)&cpmp->cp_brgc1;
- bp += brg;
- /* The BRG has a 12-bit counter. For really slow baud rates (or
- * really fast processors), we may have to further divide by 16.
- */
- if (((BRG_UART_CLK / rate) - 1) < 4096)
- *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
- else
- *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
- CPM_BRG_EN | CPM_BRG_DIV16;
-}
-
-/*
- * dpalloc / dpfree bits.
- */
-static spinlock_t cpm_dpmem_lock;
-/*
- * 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up...
- */
-static rh_block_t cpm_boot_dpmem_rh_block[16];
-static rh_info_t cpm_dpmem_info;
-
-#define CPM_DPMEM_ALIGNMENT 8
-static u8* dpram_vbase;
-static uint dpram_pbase;
-
-void m8xx_cpm_dpinit(void)
-{
- spin_lock_init(&cpm_dpmem_lock);
-
- dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
- dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem;
-
- /* Initialize the info header */
- rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
- sizeof(cpm_boot_dpmem_rh_block) /
- sizeof(cpm_boot_dpmem_rh_block[0]),
- cpm_boot_dpmem_rh_block);
-
- /*
- * Attach the usable dpmem area.
- * XXX: This is actually crap. CPM_DATAONLY_BASE and
- * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
- * with the processor and the microcode patches applied / activated.
- * But the following should be at least safe.
- */
- rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
-}
-
-/*
- * Allocate the requested size worth of DP memory.
- * This function returns an offset into the DPRAM area.
- * Use cpm_dpram_addr() to get the virtual address of the area.
- */
-unsigned long cpm_dpalloc(uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc(&cpm_dpmem_info, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc);
-
-int cpm_dpfree(unsigned long offset)
-{
- int ret;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- ret = rh_free(&cpm_dpmem_info, offset);
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(cpm_dpfree);
-
-unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc_fixed);
-
-void cpm_dpdump(void)
-{
- rh_dump(&cpm_dpmem_info);
-}
-EXPORT_SYMBOL(cpm_dpdump);
-
-void *cpm_dpram_addr(unsigned long offset)
-{
- return (void *)(dpram_vbase + offset);
-}
-EXPORT_SYMBOL(cpm_dpram_addr);
-
-uint cpm_dpram_phys(u8* addr)
-{
- return (dpram_pbase + (uint)(addr - dpram_vbase));
-}
-EXPORT_SYMBOL(cpm_dpram_phys);
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
deleted file mode 100644
index 5899aea1644b..000000000000
--- a/arch/ppc/8xx_io/enet.c
+++ /dev/null
@@ -1,982 +0,0 @@
-/*
- * Ethernet driver for Motorola MPC8xx.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * I copied the basic skeleton from the lance driver, because I did not
- * know how to write the Linux driver, but I did know how the LANCE worked.
- *
- * This version of the driver is somewhat selectable for the different
- * processor/board combinations. It works for the boards I know about
- * now, and should be easily modified to include others. Some of the
- * configuration information is contained in <asm/cpm1.h> and the
- * remainder is here.
- *
- * Buffer descriptors are kept in the CPM dual port RAM, and the frame
- * buffers are in the host memory.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
-#include <linux/bitops.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-#include <asm/cacheflush.h>
-
-/*
- * Theory of Operation
- *
- * The MPC8xx CPM performs the Ethernet processing on SCC1. It can use
- * an aribtrary number of buffers on byte boundaries, but must have at
- * least two receive buffers to prevent constant overrun conditions.
- *
- * The buffer descriptors are allocated from the CPM dual port memory
- * with the data buffers allocated from host memory, just like all other
- * serial communication protocols. The host memory buffers are allocated
- * from the free page pool, and then divided into smaller receive and
- * transmit buffers. The size of the buffers should be a power of two,
- * since that nicely divides the page. This creates a ring buffer
- * structure similar to the LANCE and other controllers.
- *
- * Like the LANCE driver:
- * The driver runs as two independent, single-threaded flows of control. One
- * is the send-packet routine, which enforces single-threaded use by the
- * cep->tx_busy flag. The other thread is the interrupt handler, which is
- * single threaded by the hardware and other software.
- *
- * The send packet thread has partial control over the Tx ring and the
- * 'cep->tx_busy' flag. It sets the tx_busy flag whenever it's queuing a Tx
- * packet. If the next queue slot is empty, it clears the tx_busy flag when
- * finished otherwise it sets the 'lp->tx_full' flag.
- *
- * The MBX has a control register external to the MPC8xx that has some
- * control of the Ethernet interface. Information is in the manual for
- * your board.
- *
- * The RPX boards have an external control/status register. Consult the
- * programming documents for details unique to your board.
- *
- * For the TQM8xx(L) modules, there is no control register interface.
- * All functions are directly controlled using I/O pins. See <asm/cpm1.h>.
- */
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#ifdef CONFIG_ENET_BIG_BUFFERS
-#define CPM_ENET_RX_PAGES 32
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 64 /* Must be power of two */
-#define TX_RING_MOD_MASK 63 /* for this to work */
-#else
-#define CPM_ENET_RX_PAGES 4
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-#endif
-
-/* The CPM stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct scc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- scc_t *sccp;
-
- /* Virtual addresses for the receive buffers because we can't
- * do a __va() on them anymore.
- */
- unsigned char *rx_vaddr[RX_RING_SIZE];
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-};
-
-static int scc_enet_open(struct net_device *dev);
-static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int scc_enet_rx(struct net_device *dev);
-static void scc_enet_interrupt(void *dev_id);
-static int scc_enet_close(struct net_device *dev);
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-
-/* Get this from various configuration locations (depends on board).
-*/
-/*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/
-
-/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards
- * use SCC2. Some even may use SCC3.
- * This is easily extended if necessary.
- */
-#if defined(CONFIG_SCC3_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC3
-#define PROFF_ENET PROFF_SCC3
-#define SCC_ENET 2 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC3
-#elif defined(CONFIG_SCC2_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC2
-#define PROFF_ENET PROFF_SCC2
-#define SCC_ENET 1 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC2
-#elif defined(CONFIG_SCC1_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC1
-#define PROFF_ENET PROFF_SCC1
-#define SCC_ENET 0 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC1
-#else
-#error CONFIG_SCCx_ENET not defined
-#endif
-
-static int
-scc_enet_open(struct net_device *dev)
-{
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
-
- netif_start_queue(dev);
- return 0; /* Always succeed */
-}
-
-static int
-scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since cep->tx_busy should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it.
- */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- /* Save skb pointer.
- */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Push the data cache so the CPM does not get stale memory
- * data.
- */
- flush_dcache_range((unsigned long)(skb->data),
- (unsigned long)(skb->data + skb->len));
-
- spin_lock_irq(&cep->lock);
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- cep->tx_full = 1;
- }
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-static void
-scc_enet_timeout(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
- cep->cur_tx, cep->tx_full ? " (full)" : "",
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (!cep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the CPM handler, not the MPC core interrupt.
- */
-static void
-scc_enet_interrupt(void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->sccp->scc_scce;
- cep->sccp->scc_scce = int_events;
- must_restart = 0;
-
- /* Handle receive event in its own function.
- */
- if (int_events & SCCE_ENET_RXF)
- scc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (cep->tx_full) {
- cep->tx_full = 0;
- if (netif_queue_stopped(dev))
- netif_wake_queue(dev);
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm8xx_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either.
- */
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them. This "can't happen" because the receive interrupt
- * is tossing previous frames.
- */
- if (int_events & SCCE_ENET_BSY) {
- cep->stats.rx_dropped++;
- printk("CPM ENET: BSY can't happen.\n");
- }
-
- return;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-scc_enet_rx(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = (struct scc_enet_private *)dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short.
- */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- cep->stats.rx_frame_errors++;
- }
- else {
-
- /* Process the incoming frame.
- */
- cep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb,
- cep->rx_vaddr[bdp - cep->rx_bd_base],
- pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-scc_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
-
- return 0;
-}
-
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile scc_enet_t *ep;
- int i, j;
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->sccp->scc_psmr |= SCC_PSMR_PRO;
- } else {
-
- cep->sccp->scc_psmr &= ~SCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->sen_gaddr1 = 0xffff;
- ep->sen_gaddr2 = 0xffff;
- ep->sen_gaddr3 = 0xffff;
- ep->sen_gaddr4 = 0xffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-
-/* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed
- * some other network I/O, a whole bunch of this has already been set up.
- * It is no big deal if we do it again, we just have to disable the
- * transmit and receive to make sure we don't catch the CPM with some
- * inconsistent control information.
- */
-static int __init scc_enet_init(void)
-{
- struct net_device *dev;
- struct scc_enet_private *cep;
- int i, j, k, err;
- uint dp_offset;
- unsigned char *eap, *ba;
- dma_addr_t mem_addr;
- bd_t *bd;
- volatile cbd_t *bdp;
- volatile cpm8xx_t *cp;
- volatile scc_t *sccp;
- volatile scc_enet_t *ep;
- volatile immap_t *immap;
-
- cp = cpmp; /* Get pointer to Communication Processor */
-
- immap = (immap_t *)(mfspr(SPRN_IMMR) & 0xFFFF0000); /* and to internal registers */
-
- bd = (bd_t *)__res;
-
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
-
- /* And another to the SCC register area.
- */
- sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
- cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
-
- /* Disable receive and transmit in case EPPC-Bug started it.
- */
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Cookbook style from the MPC860 manual.....
- * Not all of this is necessary if EPPC-Bug has initialized
- * the network.
- * So far we are lucky, all board configurations use the same
- * pins, or at least the same I/O Port for these functions.....
- * It can't last though......
- */
-
-#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
- /* Configure port A pins for Txd and Rxd.
- */
- immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
- immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
- immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
-#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
- /* Configure port B pins for Txd and Rxd.
- */
- immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
- immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
- immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
-#else
-#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
-#endif
-
-#if defined(PC_ENET_LBK)
- /* Configure port C pins to disable External Loopback
- */
- immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
- immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
- immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
- immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
-#endif /* PC_ENET_LBK */
-
-#ifdef PE_ENET_TCLK
- /* Configure port E for TCLK and RCLK.
- */
- cp->cp_pepar |= (PE_ENET_TCLK | PE_ENET_RCLK);
- cp->cp_pedir &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
- cp->cp_peso &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
-#else
- /* Configure port A for TCLK and RCLK.
- */
- immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
- immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
-#endif
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- cp->cp_sicr &= ~SICR_ENET_MASK;
- cp->cp_sicr |= SICR_ENET_CLKRT;
-
- /* Manual says set SDDR, but I can't find anything with that
- * name. I think it is a misprint, and should be SDCR. This
- * has already been set by the communication processor initialization.
- */
-
- /* Allocate space for the buffer descriptors in the DP ram.
- * These are relative offsets in the DP ram address space.
- * Initialize base addresses for the buffer descriptors.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
- ep->sen_genscc.scc_rbase = dp_offset;
- cep->rx_bd_base = cpm_dpram_addr(dp_offset);
-
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
- ep->sen_genscc.scc_tbase = dp_offset;
- cep->tx_bd_base = cpm_dpram_addr(dp_offset);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- /* Issue init Rx BD command for SCC.
- * Manual says to perform an Init Rx parameters here. We have
- * to perform both Rx and Tx because the SCC may have been
- * already running.
- * In addition, we have to do it later because we don't yet have
- * all of the BD control/status set properly.
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- */
-
- /* Initialize function code registers for big-endian.
- */
- ep->sen_genscc.scc_rfcr = SCC_EB;
- ep->sen_genscc.scc_tfcr = SCC_EB;
-
- /* Set maximum bytes per receive buffer.
- * This appears to be an Ethernet frame size, not the buffer
- * fragment size. It must be a multiple of four.
- */
- ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Set CRC preset and mask.
- */
- ep->sen_cpres = 0xffffffff;
- ep->sen_cmask = 0xdebb20e3;
-
- ep->sen_crcec = 0; /* CRC Error counter */
- ep->sen_alec = 0; /* alignment error counter */
- ep->sen_disfc = 0; /* discard frame counter */
-
- ep->sen_pads = 0x8888; /* Tx short frame pad character */
- ep->sen_retlim = 15; /* Retry limit threshold */
-
- ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
- ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
-
- /* Clear hash tables.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
- ep->sen_iaddr1 = 0;
- ep->sen_iaddr2 = 0;
- ep->sen_iaddr3 = 0;
- ep->sen_iaddr4 = 0;
-
- /* Set Ethernet station address.
- */
- eap = (unsigned char *)&(ep->sen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
-
- ep->sen_pper = 0; /* 'cause the book says so */
- ep->sen_taddrl = 0; /* temp address (LSB) */
- ep->sen_taddrm = 0;
- ep->sen_taddrh = 0; /* temp address (MSB) */
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- k = 0;
- for (i=0; i<CPM_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- ba = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE,
- &mem_addr, GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_bufaddr = mem_addr;
- cep->rx_vaddr[k++] = ba;
- mem_addr += CPM_ENET_RX_FRSIZE;
- ba += CPM_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-
- sccp->scc_scce = 0xffff; /* Clear any pending events */
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
-
- /* Install our interrupt handler.
- */
- cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev);
-
- /* Set GSMR_H to enable all normal operating modes.
- * Set GSMR_L to enable Ethernet to MC68160.
- */
- sccp->scc_gsmrh = 0;
- sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- sccp->scc_dsr = 0xd555;
-
- /* Set processing mode. Use Ethernet CRC, catch broadcast, and
- * start frame search 22 bit times after RENA.
- */
- sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
-
- /* It is now OK to enable the Ethernet transmitter.
- * Unfortunately, there are board implementation differences here.
- */
-#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
- immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
- immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
-#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-#elif ( !defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && defined (PE_ENET_TENA))
- cp->cp_pepar |= PE_ENET_TENA;
- cp->cp_pedir &= ~PE_ENET_TENA;
- cp->cp_peso |= PE_ENET_TENA;
-#else
-#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA, PE_ENET_TENA
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
- /* And while we are here, set the configuration to enable ethernet.
- */
- *((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
- *((volatile uint *)RPX_CSR_ADDR) |=
- (BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
-#endif
-
-#ifdef CONFIG_BSEIP
- /* BSE uses port B and C for PHY control.
- */
- cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
- cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
- cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
-
- immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
-#endif
-
-#ifdef CONFIG_FADS
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-
- /* Enable the EEST PHY.
- */
- *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
-#endif
-
- dev->base_addr = (unsigned long)ep;
-#if 0
- dev->name = "CPM_ENET";
-#endif
-
- /* The CPM Ethernet specific entries in the device structure. */
- dev->open = scc_enet_open;
- dev->hard_start_xmit = scc_enet_start_xmit;
- dev->tx_timeout = scc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = scc_enet_close;
- dev->get_stats = scc_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- /* And last, enable the transmit and receive processing.
- */
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
- return 0;
-}
-
-module_init(scc_enet_init);
-
diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c
deleted file mode 100644
index 2c604d4f6e8b..000000000000
--- a/arch/ppc/8xx_io/fec.c
+++ /dev/null
@@ -1,1983 +0,0 @@
-/*
- * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * This version of the driver is specific to the FADS implementation,
- * since the board contains control registers external to the processor
- * for the control of the LevelOne LXT970 transceiver. The MPC860T manual
- * describes connections using the internal parallel port I/O, which
- * is basically all of Port D.
- *
- * Includes support for the following PHYs: QS6612, LXT970, LXT971/2.
- *
- * Right now, I am very wasteful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- * Much better multiple PHY support by Magnus Damm.
- * Copyright (c) 2000 Ericsson Radio Systems AB.
- *
- * Make use of MII for PHY control configurable.
- * Some fixes.
- * Copyright (c) 2000-2002 Wolfgang Denk, DENX Software Engineering.
- *
- * Support for AMD AM79C874 added.
- * Thomas Lange, thomas@corelatus.com
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-#ifdef CONFIG_FEC_PACKETHOOK
-#include <linux/pkthook.h>
-#endif
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-
-#ifdef CONFIG_USE_MDIO
-/* Forward declarations of some structures to support different PHYs
-*/
-
-typedef struct {
- uint mii_data;
- void (*funct)(uint mii_reg, struct net_device *dev);
-} phy_cmd_t;
-
-typedef struct {
- uint id;
- char *name;
-
- const phy_cmd_t *config;
- const phy_cmd_t *startup;
- const phy_cmd_t *ack_int;
- const phy_cmd_t *shutdown;
-} phy_info_t;
-#endif /* CONFIG_USE_MDIO */
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#ifdef CONFIG_ENET_BIG_BUFFERS
-#define FEC_ENET_RX_PAGES 16
-#define FEC_ENET_RX_FRSIZE 2048
-#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
-#define TX_RING_SIZE 16 /* Must be power of two */
-#define TX_RING_MOD_MASK 15 /* for this to work */
-#else
-#define FEC_ENET_RX_PAGES 4
-#define FEC_ENET_RX_FRSIZE 2048
-#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-#endif
-
-/* Interrupt events/masks.
-*/
-#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
-#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
-#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
-#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
-#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
-#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
-#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
-#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
-#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
-#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
-
-/*
-*/
-#define FEC_ECNTRL_PINMUX 0x00000004
-#define FEC_ECNTRL_ETHER_EN 0x00000002
-#define FEC_ECNTRL_RESET 0x00000001
-
-#define FEC_RCNTRL_BC_REJ 0x00000010
-#define FEC_RCNTRL_PROM 0x00000008
-#define FEC_RCNTRL_MII_MODE 0x00000004
-#define FEC_RCNTRL_DRT 0x00000002
-#define FEC_RCNTRL_LOOP 0x00000001
-
-#define FEC_TCNTRL_FDEN 0x00000004
-#define FEC_TCNTRL_HBC 0x00000002
-#define FEC_TCNTRL_GTS 0x00000001
-
-/* Delay to wait for FEC reset command to complete (in us)
-*/
-#define FEC_RESET_DELAY 50
-
-/* The FEC stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct fec_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
-
- /* Virtual addresses for the receive buffers because we can't
- * do a __va() on them anymore.
- */
- unsigned char *rx_vaddr[RX_RING_SIZE];
-
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-
-#ifdef CONFIG_USE_MDIO
- uint phy_id;
- uint phy_id_done;
- uint phy_status;
- uint phy_speed;
- phy_info_t *phy;
- struct work_struct phy_task;
- struct net_device *dev;
-
- uint sequence_done;
-
- uint phy_addr;
-#endif /* CONFIG_USE_MDIO */
-
- int link;
- int old_link;
- int full_duplex;
-
-#ifdef CONFIG_FEC_PACKETHOOK
- unsigned long ph_lock;
- fec_ph_func *ph_rxhandler;
- fec_ph_func *ph_txhandler;
- __u16 ph_proto;
- volatile __u32 *ph_regaddr;
- void *ph_priv;
-#endif
-};
-
-static int fec_enet_open(struct net_device *dev);
-static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-#ifdef CONFIG_USE_MDIO
-static void fec_enet_mii(struct net_device *dev);
-#endif /* CONFIG_USE_MDIO */
-#ifdef CONFIG_FEC_PACKETHOOK
-static void fec_enet_tx(struct net_device *dev, __u32 regval);
-static void fec_enet_rx(struct net_device *dev, __u32 regval);
-#else
-static void fec_enet_tx(struct net_device *dev);
-static void fec_enet_rx(struct net_device *dev);
-#endif
-static int fec_enet_close(struct net_device *dev);
-static struct net_device_stats *fec_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-static void fec_restart(struct net_device *dev, int duplex);
-static void fec_stop(struct net_device *dev);
-static ushort my_enet_addr[3];
-
-#ifdef CONFIG_USE_MDIO
-/* MII processing. We keep this as simple as possible. Requests are
- * placed on the list (if there is room). When the request is finished
- * by the MII, an optional function may be called.
- */
-typedef struct mii_list {
- uint mii_regval;
- void (*mii_func)(uint val, struct net_device *dev);
- struct mii_list *mii_next;
-} mii_list_t;
-
-#define NMII 20
-mii_list_t mii_cmds[NMII];
-mii_list_t *mii_free;
-mii_list_t *mii_head;
-mii_list_t *mii_tail;
-
-static int mii_queue(struct net_device *dev, int request,
- void (*func)(uint, struct net_device *));
-
-/* Make MII read/write commands for the FEC.
-*/
-#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
- (VAL & 0xffff))
-#define mk_mii_end 0
-#endif /* CONFIG_USE_MDIO */
-
-/* Transmitter timeout.
-*/
-#define TX_TIMEOUT (2*HZ)
-
-#ifdef CONFIG_USE_MDIO
-/* Register definitions for the PHY.
-*/
-
-#define MII_REG_CR 0 /* Control Register */
-#define MII_REG_SR 1 /* Status Register */
-#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
-#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
-#define MII_REG_ANAR 4 /* A-N Advertisement Register */
-#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
-#define MII_REG_ANER 6 /* A-N Expansion Register */
-#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
-#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
-
-/* values for phy_status */
-
-#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
-#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
-#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
-#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
-#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
-#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
-#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
-
-#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
-#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
-#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
-#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
-#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
-#endif /* CONFIG_USE_MDIO */
-
-#ifdef CONFIG_FEC_PACKETHOOK
-int
-fec_register_ph(struct net_device *dev, fec_ph_func *rxfun, fec_ph_func *txfun,
- __u16 proto, volatile __u32 *regaddr, void *priv)
-{
- struct fec_enet_private *fep;
- int retval = 0;
-
- fep = dev->priv;
-
- if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
- /* Someone is messing with the packet hook */
- return -EAGAIN;
- }
- if (fep->ph_rxhandler != NULL || fep->ph_txhandler != NULL) {
- retval = -EBUSY;
- goto out;
- }
- fep->ph_rxhandler = rxfun;
- fep->ph_txhandler = txfun;
- fep->ph_proto = proto;
- fep->ph_regaddr = regaddr;
- fep->ph_priv = priv;
-
- out:
- fep->ph_lock = 0;
-
- return retval;
-}
-
-
-int
-fec_unregister_ph(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- int retval = 0;
-
- fep = dev->priv;
-
- if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
- /* Someone is messing with the packet hook */
- return -EAGAIN;
- }
-
- fep->ph_rxhandler = fep->ph_txhandler = NULL;
- fep->ph_proto = 0;
- fep->ph_regaddr = NULL;
- fep->ph_priv = NULL;
-
- fep->ph_lock = 0;
-
- return retval;
-}
-
-EXPORT_SYMBOL(fec_register_ph);
-EXPORT_SYMBOL(fec_unregister_ph);
-
-#endif /* CONFIG_FEC_PACKETHOOK */
-
-static int
-fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *fecp;
- volatile cbd_t *bdp;
-
- fep = dev->priv;
- fecp = (volatile fec_t*)dev->base_addr;
-
- if (!fep->link) {
- /* Link is down or autonegotiation is in progress. */
- return 1;
- }
-
- /* Fill in a Tx ring entry */
- bdp = fep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since dev->tbusy should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_bufaddr = __pa(skb->data);
- bdp->cbd_datlen = skb->len;
-
- /* Save skb pointer.
- */
- fep->tx_skbuff[fep->skb_cur] = skb;
-
- fep->stats.tx_bytes += skb->len;
- fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Push the data cache so the CPM does not get stale memory
- * data.
- */
- flush_dcache_range((unsigned long)skb->data,
- (unsigned long)skb->data + skb->len);
-
- /* disable interrupts while triggering transmit */
- spin_lock_irq(&fep->lock);
-
- /* Send it on its way. Tell FEC its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
-
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
- | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* Trigger transmission start */
- fecp->fec_x_des_active = 0x01000000;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP) {
- bdp = fep->tx_bd_base;
- } else {
- bdp++;
- }
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- fep->tx_full = 1;
- }
-
- fep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&fep->lock);
-
- return 0;
-}
-
-static void
-fec_timeout(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- fep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
-
- printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n",
- (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "",
- (unsigned long)fep->dirty_tx,
- (unsigned long)fep->cur_rx);
-
- bdp = fep->tx_bd_base;
- printk(" tx: %u buffers\n", TX_RING_SIZE);
- for (i = 0 ; i < TX_RING_SIZE; i++) {
- printk(" %08x: %04x %04x %08x\n",
- (uint) bdp,
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp++;
- }
-
- bdp = fep->rx_bd_base;
- printk(" rx: %lu buffers\n", RX_RING_SIZE);
- for (i = 0 ; i < RX_RING_SIZE; i++) {
- printk(" %08x: %04x %04x %08x\n",
- (uint) bdp,
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp++;
- }
- }
-#endif
- if (!fep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the MPC core interrupt.
- */
-static irqreturn_t
-fec_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile fec_t *fecp;
- uint int_events;
-#ifdef CONFIG_FEC_PACKETHOOK
- struct fec_enet_private *fep = dev->priv;
- __u32 regval;
-
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- fecp = (volatile fec_t*)dev->base_addr;
-
- /* Get the interrupt events that caused us to be here.
- */
- while ((int_events = fecp->fec_ievent) != 0) {
- fecp->fec_ievent = int_events;
- if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
- FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) {
- printk("FEC ERROR %x\n", int_events);
- }
-
- /* Handle receive event in its own function.
- */
- if (int_events & FEC_ENET_RXF) {
-#ifdef CONFIG_FEC_PACKETHOOK
- fec_enet_rx(dev, regval);
-#else
- fec_enet_rx(dev);
-#endif
- }
-
- /* Transmit OK, or non-fatal error. Update the buffer
- descriptors. FEC handles all errors, we just discover
- them as part of the transmit process.
- */
- if (int_events & FEC_ENET_TXF) {
-#ifdef CONFIG_FEC_PACKETHOOK
- fec_enet_tx(dev, regval);
-#else
- fec_enet_tx(dev);
-#endif
- }
-
- if (int_events & FEC_ENET_MII) {
-#ifdef CONFIG_USE_MDIO
- fec_enet_mii(dev);
-#else
-printk("%s[%d] %s: unexpected FEC_ENET_MII event\n", __FILE__, __LINE__, __func__);
-#endif /* CONFIG_USE_MDIO */
- }
-
- }
- return IRQ_RETVAL(IRQ_HANDLED);
-}
-
-
-static void
-#ifdef CONFIG_FEC_PACKETHOOK
-fec_enet_tx(struct net_device *dev, __u32 regval)
-#else
-fec_enet_tx(struct net_device *dev)
-#endif
-{
- struct fec_enet_private *fep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
-
- fep = dev->priv;
- /* lock while transmitting */
- spin_lock(&fep->lock);
- bdp = fep->dirty_tx;
-
- while ((bdp->cbd_sc&BD_ENET_TX_READY) == 0) {
- if (bdp == fep->cur_tx && fep->tx_full == 0) break;
-
- skb = fep->tx_skbuff[fep->skb_dirty];
- /* Check for errors. */
- if (bdp->cbd_sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
- BD_ENET_TX_RL | BD_ENET_TX_UN |
- BD_ENET_TX_CSL)) {
- fep->stats.tx_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- fep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- fep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- fep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- fep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- fep->stats.tx_carrier_errors++;
- } else {
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Packet hook ... */
- if (fep->ph_txhandler &&
- ((struct ethhdr *)skb->data)->h_proto
- == fep->ph_proto) {
- fep->ph_txhandler((__u8*)skb->data, skb->len,
- regval, fep->ph_priv);
- }
-#endif
- fep->stats.tx_packets++;
- }
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY)
- printk("HEY! Enet xmit interrupt and TX_READY.\n");
-#endif
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- fep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
-#if 0
-printk("TXI: %x %x %x\n", bdp, skb, fep->skb_dirty);
-#endif
- dev_kfree_skb_irq (skb/*, FREE_WRITE*/);
- fep->tx_skbuff[fep->skb_dirty] = NULL;
- fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = fep->tx_bd_base;
- else
- bdp++;
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (fep->tx_full) {
- fep->tx_full = 0;
- if (netif_queue_stopped(dev))
- netif_wake_queue(dev);
- }
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Re-read register. Not exactly guaranteed to be correct,
- but... */
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- }
- fep->dirty_tx = (cbd_t *)bdp;
- spin_unlock(&fep->lock);
-}
-
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static void
-#ifdef CONFIG_FEC_PACKETHOOK
-fec_enet_rx(struct net_device *dev, __u32 regval)
-#else
-fec_enet_rx(struct net_device *dev)
-#endif
-{
- struct fec_enet_private *fep;
- volatile fec_t *fecp;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
- __u8 *data;
-
- fep = dev->priv;
- fecp = (volatile fec_t*)dev->base_addr;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = fep->cur_rx;
-
-while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) {
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame,
- * the last indicator should be set.
- */
- if ((bdp->cbd_sc & BD_ENET_RX_LAST) == 0)
- printk("FEC ENET: rcv is not +last\n");
-#endif
-
- /* Check for errors. */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
- BD_ENET_RX_CR | BD_ENET_RX_OV)) {
- fep->stats.rx_errors++;
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
- /* Frame too long or too short. */
- fep->stats.rx_length_errors++;
- }
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- fep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- fep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- fep->stats.rx_crc_errors++;
- }
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- fep->stats.rx_errors++;
- fep->stats.rx_frame_errors++;
- goto rx_processing_done;
- }
-
- /* Process the incoming frame.
- */
- fep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- fep->stats.rx_bytes += pkt_len;
- data = fep->rx_vaddr[bdp - fep->rx_bd_base];
-
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Packet hook ... */
- if (fep->ph_rxhandler) {
- if (((struct ethhdr *)data)->h_proto == fep->ph_proto) {
- switch (fep->ph_rxhandler(data, pkt_len, regval,
- fep->ph_priv)) {
- case 1:
- goto rx_processing_done;
- break;
- case 0:
- break;
- default:
- fep->stats.rx_errors++;
- goto rx_processing_done;
- }
- }
- }
-
- /* If it wasn't filtered - copy it to an sk buffer. */
-#endif
-
- /* This does 16 byte alignment, exactly what we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- fep->stats.rx_dropped++;
- } else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb, data, pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- rx_processing_done:
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = fep->rx_bd_base;
- else
- bdp++;
-
-#if 1
- /* Doing this here will keep the FEC running while we process
- * incoming frames. On a heavily loaded network, we should be
- * able to keep up at the expense of system resources.
- */
- fecp->fec_r_des_active = 0x01000000;
-#endif
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Re-read register. Not exactly guaranteed to be correct,
- but... */
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- } /* while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) */
- fep->cur_rx = (cbd_t *)bdp;
-
-#if 0
- /* Doing this here will allow us to process all frames in the
- * ring before the FEC is allowed to put more there. On a heavily
- * loaded network, some frames may be lost. Unfortunately, this
- * increases the interrupt overhead since we can potentially work
- * our way back to the interrupt return only to come right back
- * here.
- */
- fecp->fec_r_des_active = 0x01000000;
-#endif
-}
-
-
-#ifdef CONFIG_USE_MDIO
-static void
-fec_enet_mii(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *ep;
- mii_list_t *mip;
- uint mii_reg;
-
- fep = (struct fec_enet_private *)dev->priv;
- ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
- mii_reg = ep->fec_mii_data;
-
- if ((mip = mii_head) == NULL) {
- printk("MII and no head!\n");
- return;
- }
-
- if (mip->mii_func != NULL)
- (*(mip->mii_func))(mii_reg, dev);
-
- mii_head = mip->mii_next;
- mip->mii_next = mii_free;
- mii_free = mip;
-
- if ((mip = mii_head) != NULL) {
- ep->fec_mii_data = mip->mii_regval;
-
- }
-}
-
-static int
-mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
-{
- struct fec_enet_private *fep;
- unsigned long flags;
- mii_list_t *mip;
- int retval;
-
- /* Add PHY address to register command.
- */
- fep = dev->priv;
- regval |= fep->phy_addr << 23;
-
- retval = 0;
-
- /* lock while modifying mii_list */
- spin_lock_irqsave(&fep->lock, flags);
-
- if ((mip = mii_free) != NULL) {
- mii_free = mip->mii_next;
- mip->mii_regval = regval;
- mip->mii_func = func;
- mip->mii_next = NULL;
- if (mii_head) {
- mii_tail->mii_next = mip;
- mii_tail = mip;
- } else {
- mii_head = mii_tail = mip;
- (&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec))->fec_mii_data = regval;
- }
- } else {
- retval = 1;
- }
-
- spin_unlock_irqrestore(&fep->lock, flags);
-
- return(retval);
-}
-
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
-{
- int k;
-
- if(!c)
- return;
-
- for(k = 0; (c+k)->mii_data != mk_mii_end; k++)
- mii_queue(dev, (c+k)->mii_data, (c+k)->funct);
-}
-
-static void mii_parse_sr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
-
- if (mii_reg & 0x0004)
- *s |= PHY_STAT_LINK;
- if (mii_reg & 0x0010)
- *s |= PHY_STAT_FAULT;
- if (mii_reg & 0x0020)
- *s |= PHY_STAT_ANC;
-
- fep->link = (*s & PHY_STAT_LINK) ? 1 : 0;
-}
-
-static void mii_parse_cr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);
-
- if (mii_reg & 0x1000)
- *s |= PHY_CONF_ANE;
- if (mii_reg & 0x4000)
- *s |= PHY_CONF_LOOP;
-}
-
-static void mii_parse_anar(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_CONF_SPMASK);
-
- if (mii_reg & 0x0020)
- *s |= PHY_CONF_10HDX;
- if (mii_reg & 0x0040)
- *s |= PHY_CONF_10FDX;
- if (mii_reg & 0x0080)
- *s |= PHY_CONF_100HDX;
- if (mii_reg & 0x00100)
- *s |= PHY_CONF_100FDX;
-}
-#if 0
-static void mii_disp_reg(uint mii_reg, struct net_device *dev)
-{
- printk("reg %u = 0x%04x\n", (mii_reg >> 18) & 0x1f, mii_reg & 0xffff);
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT970 is used by many boards */
-
-#ifdef CONFIG_FEC_LXT970
-
-#define MII_LXT970_MIRROR 16 /* Mirror register */
-#define MII_LXT970_IER 17 /* Interrupt Enable Register */
-#define MII_LXT970_ISR 18 /* Interrupt Status Register */
-#define MII_LXT970_CONFIG 19 /* Configuration Register */
-#define MII_LXT970_CSR 20 /* Chip Status Register */
-
-static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x0800) {
- if (mii_reg & 0x1000)
- *s |= PHY_STAT_100FDX;
- else
- *s |= PHY_STAT_100HDX;
- }
- else {
- if (mii_reg & 0x1000)
- *s |= PHY_STAT_10FDX;
- else
- *s |= PHY_STAT_10HDX;
- }
-}
-
-static phy_info_t phy_info_lxt970 = {
- 0x07810000,
- "LXT970",
-
- (const phy_cmd_t []) { /* config */
-#if 0
-// { mk_mii_write(MII_REG_ANAR, 0x0021), NULL },
-
- /* Set default operation of 100-TX....for some reason
- * some of these bits are set on power up, which is wrong.
- */
- { mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
-#endif
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* read SR and ISR to acknowledge */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_LXT970_ISR), NULL },
-
- /* find out the current status */
-
- { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT971 is used on some of my custom boards */
-
-#ifdef CONFIG_FEC_LXT971
-
-/* register definitions for the 971 */
-
-#define MII_LXT971_PCR 16 /* Port Control Register */
-#define MII_LXT971_SR2 17 /* Status Register 2 */
-#define MII_LXT971_IER 18 /* Interrupt Enable Register */
-#define MII_LXT971_ISR 19 /* Interrupt Status Register */
-#define MII_LXT971_LCR 20 /* LED Control Register */
-#define MII_LXT971_TCR 30 /* Transmit Control Register */
-
-/*
- * I had some nice ideas of running the MDIO faster...
- * The 971 should support 8MHz and I tried it, but things acted really
- * weird, so 2.5 MHz ought to be enough for anyone...
- */
-
-static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x4000) {
- if (mii_reg & 0x0200)
- *s |= PHY_STAT_100FDX;
- else
- *s |= PHY_STAT_100HDX;
- }
- else {
- if (mii_reg & 0x0200)
- *s |= PHY_STAT_10FDX;
- else
- *s |= PHY_STAT_10HDX;
- }
- if (mii_reg & 0x0008)
- *s |= PHY_STAT_FAULT;
-}
-
-static phy_info_t phy_info_lxt971 = {
- 0x0001378e,
- "LXT971",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
-
- /* Somehow does the 971 tell me that the link is down
- * the first read after power-up.
- * read here to get a valid value in ack_int */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
-
- /* we only need to read ISR to acknowledge */
-
- { mk_mii_read(MII_LXT971_ISR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-
-/* ------------------------------------------------------------------------- */
-/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
-
-#ifdef CONFIG_FEC_QS6612
-
-/* register definitions */
-
-#define MII_QS6612_MCR 17 /* Mode Control Register */
-#define MII_QS6612_FTR 27 /* Factory Test Register */
-#define MII_QS6612_MCO 28 /* Misc. Control Register */
-#define MII_QS6612_ISR 29 /* Interrupt Source Register */
-#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
-#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
-
-static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- switch((mii_reg >> 2) & 7) {
- case 1: *s |= PHY_STAT_10HDX; break;
- case 2: *s |= PHY_STAT_100HDX; break;
- case 5: *s |= PHY_STAT_10FDX; break;
- case 6: *s |= PHY_STAT_100FDX; break;
- }
-}
-
-static phy_info_t phy_info_qs6612 = {
- 0x00181440,
- "QS6612",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x061), NULL }, /* 10 Mbps */
-
- /* The PHY powers up isolated on the RPX,
- * so send a command to allow operation.
- */
-
- { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
-
- /* parse cr and anar to get some info */
-
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read ISR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_QS6612_ISR), NULL },
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_REG_ANER), NULL },
-
- /* read pcr to get info */
-
- { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_QS6612 */
-
-/* ------------------------------------------------------------------------- */
-/* The Advanced Micro Devices AM79C874 is used on the ICU862 */
-
-#ifdef CONFIG_FEC_AM79C874
-
-/* register definitions for the 79C874 */
-
-#define MII_AM79C874_MFR 16 /* Miscellaneous Features Register */
-#define MII_AM79C874_ICSR 17 /* Interrupt Control/Status Register */
-#define MII_AM79C874_DR 18 /* Diagnostic Register */
-#define MII_AM79C874_PMLR 19 /* Power Management & Loopback Register */
-#define MII_AM79C874_MCR 21 /* Mode Control Register */
-#define MII_AM79C874_DC 23 /* Disconnect Counter */
-#define MII_AM79C874_REC 24 /* Receiver Error Counter */
-
-static void mii_parse_amd79c874_dr(uint mii_reg, struct net_device *dev, uint data)
-{
- volatile struct fec_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- /* Register 18: Bit 10 is data rate, 11 is Duplex */
- switch ((mii_reg >> 10) & 3) {
- case 0: s |= PHY_STAT_10HDX; break;
- case 1: s |= PHY_STAT_100HDX; break;
- case 2: s |= PHY_STAT_10FDX; break;
- case 3: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_amd79c874 = {
- 0x00022561,
- "AM79C874",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_AM79C874_DR), mii_parse_amd79c874_dr },
-
- /* we only need to read ICSR to acknowledge */
-
- { mk_mii_read(MII_AM79C874_ICSR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_AM79C874 */
-
-static phy_info_t *phy_info[] = {
-
-#ifdef CONFIG_FEC_LXT970
- &phy_info_lxt970,
-#endif /* CONFIG_FEC_LXT970 */
-
-#ifdef CONFIG_FEC_LXT971
- &phy_info_lxt971,
-#endif /* CONFIG_FEC_LXT971 */
-
-#ifdef CONFIG_FEC_QS6612
- &phy_info_qs6612,
-#endif /* CONFIG_FEC_QS6612 */
-
-#ifdef CONFIG_FEC_AM79C874
- &phy_info_amd79c874,
-#endif /* CONFIG_FEC_AM79C874 */
-
- NULL
-};
-
-static void mii_display_status(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- if (!fep->link && !fep->old_link) {
- /* Link is still down - don't print anything */
- return;
- }
-
- printk("%s: status: ", dev->name);
-
- if (!fep->link) {
- printk("link down");
- } else {
- printk("link up");
-
- switch(*s & PHY_STAT_SPMASK) {
- case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break;
- case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break;
- case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break;
- case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break;
- default:
- printk(", Unknown speed/duplex");
- }
-
- if (*s & PHY_STAT_ANC)
- printk(", auto-negotiation complete");
- }
-
- if (*s & PHY_STAT_FAULT)
- printk(", remote fault");
-
- printk(".\n");
-}
-
-static void mii_display_config(struct work_struct *work)
-{
- struct fec_enet_private *fep =
- container_of(work, struct fec_enet_private, phy_task);
- struct net_device *dev = fep->dev;
- volatile uint *s = &(fep->phy_status);
-
- printk("%s: config: auto-negotiation ", dev->name);
-
- if (*s & PHY_CONF_ANE)
- printk("on");
- else
- printk("off");
-
- if (*s & PHY_CONF_100FDX)
- printk(", 100FDX");
- if (*s & PHY_CONF_100HDX)
- printk(", 100HDX");
- if (*s & PHY_CONF_10FDX)
- printk(", 10FDX");
- if (*s & PHY_CONF_10HDX)
- printk(", 10HDX");
- if (!(*s & PHY_CONF_SPMASK))
- printk(", No speed/duplex selected?");
-
- if (*s & PHY_CONF_LOOP)
- printk(", loopback enabled");
-
- printk(".\n");
-
- fep->sequence_done = 1;
-}
-
-static void mii_relink(struct work_struct *work)
-{
- struct fec_enet_private *fep =
- container_of(work, struct fec_enet_private, phy_task);
- struct net_device *dev = fep->dev;
- int duplex;
-
- fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
- mii_display_status(dev);
- fep->old_link = fep->link;
-
- if (fep->link) {
- duplex = 0;
- if (fep->phy_status
- & (PHY_STAT_100FDX | PHY_STAT_10FDX))
- duplex = 1;
- fec_restart(dev, duplex);
- }
- else
- fec_stop(dev);
-
-#if 0
- enable_irq(fep->mii_irq);
-#endif
-
-}
-
-static void mii_queue_relink(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- fep->dev = dev;
- INIT_WORK(&fep->phy_task, mii_relink);
- schedule_work(&fep->phy_task);
-}
-
-static void mii_queue_config(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- fep->dev = dev;
- INIT_WORK(&fep->phy_task, mii_display_config);
- schedule_work(&fep->phy_task);
-}
-
-
-
-phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink },
- { mk_mii_end, } };
-phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config },
- { mk_mii_end, } };
-
-
-
-/* Read remainder of PHY ID.
-*/
-static void
-mii_discover_phy3(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- int i;
-
- fep = dev->priv;
- fep->phy_id |= (mii_reg & 0xffff);
-
- for(i = 0; phy_info[i]; i++)
- if(phy_info[i]->id == (fep->phy_id >> 4))
- break;
-
- if(!phy_info[i])
- panic("%s: PHY id 0x%08x is not supported!\n",
- dev->name, fep->phy_id);
-
- fep->phy = phy_info[i];
- fep->phy_id_done = 1;
-
- printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
- dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
-}
-
-/* Scan all of the MII PHY addresses looking for someone to respond
- * with a valid ID. This usually happens quickly.
- */
-static void
-mii_discover_phy(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- uint phytype;
-
- fep = dev->priv;
-
- if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
-
- /* Got first part of ID, now get remainder.
- */
- fep->phy_id = phytype << 16;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3);
- } else {
- fep->phy_addr++;
- if (fep->phy_addr < 32) {
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
- mii_discover_phy);
- } else {
- printk("fec: No PHY device found.\n");
- }
- }
-}
-#endif /* CONFIG_USE_MDIO */
-
-/* This interrupt occurs when the PHY detects a link change.
-*/
-static
-#ifdef CONFIG_RPXCLASSIC
-void mii_link_interrupt(void *dev_id)
-#else
-irqreturn_t mii_link_interrupt(int irq, void * dev_id)
-#endif
-{
-#ifdef CONFIG_USE_MDIO
- struct net_device *dev = dev_id;
- struct fec_enet_private *fep = dev->priv;
- volatile immap_t *immap = (immap_t *)IMAP_ADDR;
- volatile fec_t *fecp = &(immap->im_cpm.cp_fec);
- unsigned int ecntrl = fecp->fec_ecntrl;
-
- /* We need the FEC enabled to access the MII
- */
- if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
- fecp->fec_ecntrl |= FEC_ECNTRL_ETHER_EN;
- }
-#endif /* CONFIG_USE_MDIO */
-
-#if 0
- disable_irq(fep->mii_irq); /* disable now, enable later */
-#endif
-
-
-#ifdef CONFIG_USE_MDIO
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
-
- if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
- fecp->fec_ecntrl = ecntrl; /* restore old settings */
- }
-#else
-printk("%s[%d] %s: unexpected Link interrupt\n", __FILE__, __LINE__, __func__);
-#endif /* CONFIG_USE_MDIO */
-
-#ifndef CONFIG_RPXCLASSIC
- return IRQ_RETVAL(IRQ_HANDLED);
-#endif /* CONFIG_RPXCLASSIC */
-}
-
-static int
-fec_enet_open(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
-
-#ifdef CONFIG_USE_MDIO
- fep->sequence_done = 0;
- fep->link = 0;
-
- if (fep->phy) {
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, fep->phy->config);
- mii_do_cmd(dev, phy_cmd_config); /* display configuration */
- while(!fep->sequence_done)
- schedule();
-
- mii_do_cmd(dev, fep->phy->startup);
- netif_start_queue(dev);
- return 0; /* Success */
- }
- return -ENODEV; /* No PHY we understand */
-#else
- fep->link = 1;
- netif_start_queue(dev);
- return 0; /* Success */
-#endif /* CONFIG_USE_MDIO */
-
-}
-
-static int
-fec_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
- fec_stop(dev);
-
- return 0;
-}
-
-static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
-{
- struct fec_enet_private *fep = (struct fec_enet_private *)dev->priv;
-
- return &fep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *ep;
-
- fep = (struct fec_enet_private *)dev->priv;
- ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- ep->fec_r_cntrl |= FEC_RCNTRL_PROM;
- } else {
-
- ep->fec_r_cntrl &= ~FEC_RCNTRL_PROM;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->fec_hash_table_high = 0xffffffff;
- ep->fec_hash_table_low = 0xffffffff;
- }
-#if 0
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC1, CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
-#endif
- }
-}
-
-/* Initialize the FEC Ethernet on 860T.
- */
-static int __init fec_enet_init(void)
-{
- struct net_device *dev;
- struct fec_enet_private *fep;
- int i, j, k, err;
- unsigned char *eap, *iap, *ba;
- dma_addr_t mem_addr;
- volatile cbd_t *bdp;
- cbd_t *cbd_base;
- volatile immap_t *immap;
- volatile fec_t *fecp;
- bd_t *bd;
-#ifdef CONFIG_SCC_ENET
- unsigned char tmpaddr[6];
-#endif
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- bd = (bd_t *)__res;
-
- dev = alloc_etherdev(sizeof(*fep));
- if (!dev)
- return -ENOMEM;
-
- fep = dev->priv;
-
- fecp = &(immap->im_cpm.cp_fec);
-
- /* Whack a reset. We should wait for this.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC Reset timeout!\n");
- }
-
- /* Set the Ethernet address. If using multiple Enets on the 8xx,
- * this needs some work to get unique addresses.
- */
- eap = (unsigned char *)my_enet_addr;
- iap = bd->bi_enetaddr;
-
-#ifdef CONFIG_SCC_ENET
- /*
- * If a board has Ethernet configured both on a SCC and the
- * FEC, it needs (at least) 2 MAC addresses (we know that Sun
- * disagrees, but anyway). For the FEC port, we create
- * another address by setting one of the address bits above
- * something that would have (up to now) been allocated.
- */
- for (i=0; i<6; i++)
- tmpaddr[i] = *iap++;
- tmpaddr[3] |= 0x80;
- iap = tmpaddr;
-#endif
-
- for (i=0; i<6; i++) {
- dev->dev_addr[i] = *eap++ = *iap++;
- }
-
- /* Allocate memory for buffer descriptors.
- */
- if (((RX_RING_SIZE + TX_RING_SIZE) * sizeof(cbd_t)) > PAGE_SIZE) {
- printk("FEC init error. Need more space.\n");
- printk("FEC initialization failed.\n");
- return 1;
- }
- cbd_base = (cbd_t *)dma_alloc_coherent(dev->class_dev.dev, PAGE_SIZE,
- &mem_addr, GFP_KERNEL);
-
- /* Set receive and transmit descriptor base.
- */
- fep->rx_bd_base = cbd_base;
- fep->tx_bd_base = cbd_base + RX_RING_SIZE;
-
- fep->skb_cur = fep->skb_dirty = 0;
-
- /* Initialize the receive buffer descriptors.
- */
- bdp = fep->rx_bd_base;
- k = 0;
- for (i=0; i<FEC_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- ba = (unsigned char *)dma_alloc_coherent(dev->class_dev.dev,
- PAGE_SIZE,
- &mem_addr,
- GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<FEC_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY;
- bdp->cbd_bufaddr = mem_addr;
- fep->rx_vaddr[k++] = ba;
- mem_addr += FEC_ENET_RX_FRSIZE;
- ba += FEC_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
-#ifdef CONFIG_FEC_PACKETHOOK
- fep->ph_lock = 0;
- fep->ph_rxhandler = fep->ph_txhandler = NULL;
- fep->ph_proto = 0;
- fep->ph_regaddr = NULL;
- fep->ph_priv = NULL;
-#endif
-
- /* Install our interrupt handler.
- */
- if (request_irq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0)
- panic("Could not allocate FEC IRQ!");
-
-#ifdef CONFIG_RPXCLASSIC
- /* Make Port C, bit 15 an input that causes interrupts.
- */
- immap->im_ioport.iop_pcpar &= ~0x0001;
- immap->im_ioport.iop_pcdir &= ~0x0001;
- immap->im_ioport.iop_pcso &= ~0x0001;
- immap->im_ioport.iop_pcint |= 0x0001;
- cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev);
-
- /* Make LEDS reflect Link status.
- */
- *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE;
-#endif
-
-#ifdef PHY_INTERRUPT
- ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel |=
- (0x80000000 >> PHY_INTERRUPT);
-
- if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0, "mii", dev) != 0)
- panic("Could not allocate MII IRQ!");
-#endif
-
- dev->base_addr = (unsigned long)fecp;
-
- /* The FEC Ethernet specific entries in the device structure. */
- dev->open = fec_enet_open;
- dev->hard_start_xmit = fec_enet_start_xmit;
- dev->tx_timeout = fec_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fec_enet_close;
- dev->get_stats = fec_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
-#ifdef CONFIG_USE_MDIO
- for (i=0; i<NMII-1; i++)
- mii_cmds[i].mii_next = &mii_cmds[i+1];
- mii_free = mii_cmds;
-#endif /* CONFIG_USE_MDIO */
-
- /* Configure all of port D for MII.
- */
- immap->im_ioport.iop_pdpar = 0x1fff;
-
- /* Bits moved from Rev. D onward.
- */
- if ((mfspr(SPRN_IMMR) & 0xffff) < 0x0501)
- immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
- else
- immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed to 2.5 MHz
- */
- fecp->fec_mii_speed = fep->phy_speed =
- (( (bd->bi_intfreq + 500000) / 2500000 / 2 ) & 0x3F ) << 1;
-#else
- fecp->fec_mii_speed = 0; /* turn off MDIO */
-#endif /* CONFIG_USE_MDIO */
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk ("%s: FEC ENET Version 0.2, FEC irq %d"
-#ifdef PHY_INTERRUPT
- ", MII irq %d"
-#endif
- ", addr ",
- dev->name, FEC_INTERRUPT
-#ifdef PHY_INTERRUPT
- , PHY_INTERRUPT
-#endif
- );
- for (i=0; i<6; i++)
- printk("%02x%c", dev->dev_addr[i], (i==5) ? '\n' : ':');
-
-#ifdef CONFIG_USE_MDIO /* start in full duplex mode, and negotiate speed */
- fec_restart (dev, 1);
-#else /* always use half duplex mode only */
- fec_restart (dev, 0);
-#endif
-
-#ifdef CONFIG_USE_MDIO
- /* Queue up command to detect the PHY and initialize the
- * remainder of the interface.
- */
- fep->phy_id_done = 0;
- fep->phy_addr = 0;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
-#endif /* CONFIG_USE_MDIO */
-
- return 0;
-}
-module_init(fec_enet_init);
-
-/* This function is called to start or restart the FEC during a link
- * change. This only happens when switching between half and full
- * duplex.
- */
-static void
-fec_restart(struct net_device *dev, int duplex)
-{
- struct fec_enet_private *fep;
- int i;
- volatile cbd_t *bdp;
- volatile immap_t *immap;
- volatile fec_t *fecp;
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- fecp = &(immap->im_cpm.cp_fec);
-
- fep = dev->priv;
-
- /* Whack a reset. We should wait for this.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC Reset timeout!\n");
- }
-
- /* Set station address.
- */
- fecp->fec_addr_low = (my_enet_addr[0] << 16) | my_enet_addr[1];
- fecp->fec_addr_high = my_enet_addr[2];
-
- /* Reset all multicast.
- */
- fecp->fec_hash_table_high = 0;
- fecp->fec_hash_table_low = 0;
-
- /* Set maximum receive buffer size.
- */
- fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
- fecp->fec_r_hash = PKT_MAXBUF_SIZE;
-
- /* Set receive and transmit descriptor base.
- */
- fecp->fec_r_des_start = iopa((uint)(fep->rx_bd_base));
- fecp->fec_x_des_start = iopa((uint)(fep->tx_bd_base));
-
- fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
- fep->cur_rx = fep->rx_bd_base;
-
- /* Reset SKB transmit buffers.
- */
- fep->skb_cur = fep->skb_dirty = 0;
- for (i=0; i<=TX_RING_MOD_MASK; i++) {
- if (fep->tx_skbuff[i] != NULL) {
- dev_kfree_skb(fep->tx_skbuff[i]);
- fep->tx_skbuff[i] = NULL;
- }
- }
-
- /* Initialize the receive buffer descriptors.
- */
- bdp = fep->rx_bd_base;
- for (i=0; i<RX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = BD_ENET_RX_EMPTY;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* ...and the same for transmit.
- */
- bdp = fep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Enable MII mode.
- */
- if (duplex) {
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; /* MII enable */
- fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; /* FD enable */
- }
- else {
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
- fecp->fec_x_cntrl = 0;
- }
- fep->full_duplex = duplex;
-
- /* Enable big endian and don't care about SDMA FC.
- */
- fecp->fec_fun_code = 0x78000000;
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed.
- */
- fecp->fec_mii_speed = fep->phy_speed;
-#endif /* CONFIG_USE_MDIO */
-
- /* Clear any outstanding interrupt.
- */
- fecp->fec_ievent = 0xffc0;
-
- fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
-
- /* Enable interrupts we wish to service.
- */
- fecp->fec_imask = ( FEC_ENET_TXF | FEC_ENET_TXB |
- FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII );
-
- /* And last, enable the transmit and receive processing.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN;
- fecp->fec_r_des_active = 0x01000000;
-}
-
-static void
-fec_stop(struct net_device *dev)
-{
- volatile immap_t *immap;
- volatile fec_t *fecp;
- struct fec_enet_private *fep;
- int i;
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- fecp = &(immap->im_cpm.cp_fec);
-
- if ((fecp->fec_ecntrl & FEC_ECNTRL_ETHER_EN) == 0)
- return; /* already down */
-
- fep = dev->priv;
-
-
- fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */
-
- for (i = 0;
- ((fecp->fec_ievent & 0x10000000) == 0) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC timeout on graceful transmit stop\n");
- }
-
- /* Clear outstanding MII command interrupts.
- */
- fecp->fec_ievent = FEC_ENET_MII;
-
- /* Enable MII command finished interrupt
- */
- fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
- fecp->fec_imask = FEC_ENET_MII;
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed.
- */
- fecp->fec_mii_speed = fep->phy_speed;
-#endif /* CONFIG_USE_MDIO */
-
- /* Disable FEC
- */
- fecp->fec_ecntrl &= ~(FEC_ECNTRL_ETHER_EN);
-}
diff --git a/arch/ppc/8xx_io/micropatch.c b/arch/ppc/8xx_io/micropatch.c
deleted file mode 100644
index 9a5d95da7c28..000000000000
--- a/arch/ppc/8xx_io/micropatch.c
+++ /dev/null
@@ -1,743 +0,0 @@
-
-/* Microcode patches for the CPM as supplied by Motorola.
- * This is the one for IIC/SPI. There is a newer one that
- * also relocates SMC2, but this would require additional changes
- * to uart.c, so I am holding off on that for a moment.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/mpc8xx.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-
-/*
- * I2C/SPI relocation patch arrays.
- */
-
-#ifdef CONFIG_I2C_SPI_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x7FFFEFD9,
- 0x3FFD0000,
- 0x7FFB49F7,
- 0x7FF90000,
- 0x5FEFADF7,
- 0x5F89ADF7,
- 0x5FEFAFF7,
- 0x5F89AFF7,
- 0x3A9CFBC8,
- 0xE7C0EDF0,
- 0x77C1E1BB,
- 0xF4DC7F1D,
- 0xABAD932F,
- 0x4E08FDCF,
- 0x6E0FAFF8,
- 0x7CCF76CF,
- 0xFD1FF9CF,
- 0xABF88DC6,
- 0xAB5679F7,
- 0xB0937383,
- 0xDFCE79F7,
- 0xB091E6BB,
- 0xE5BBE74F,
- 0xB3FA6F0F,
- 0x6FFB76CE,
- 0xEE0DF9CF,
- 0x2BFBEFEF,
- 0xCFEEF9CF,
- 0x76CEAD24,
- 0x90B2DF9A,
- 0x7FDDD0BF,
- 0x4BF847FD,
- 0x7CCF76CE,
- 0xCFEF7E1F,
- 0x7F1D7DFD,
- 0xF0B6EF71,
- 0x7FC177C1,
- 0xFBC86079,
- 0xE722FBC8,
- 0x5FFFDFFF,
- 0x5FB2FFFB,
- 0xFBC8F3C8,
- 0x94A67F01,
- 0x7F1D5F39,
- 0xAFE85F5E,
- 0xFFDFDF96,
- 0xCB9FAF7D,
- 0x5FC1AFED,
- 0x8C1C5FC1,
- 0xAFDD5FC3,
- 0xDF9A7EFD,
- 0xB0B25FB2,
- 0xFFFEABAD,
- 0x5FB2FFFE,
- 0x5FCE600B,
- 0xE6BB600B,
- 0x5FCEDFC6,
- 0x27FBEFDF,
- 0x5FC8CFDE,
- 0x3A9CE7C0,
- 0xEDF0F3C8,
- 0x7F0154CD,
- 0x7F1D2D3D,
- 0x363A7570,
- 0x7E0AF1CE,
- 0x37EF2E68,
- 0x7FEE10EC,
- 0xADF8EFDE,
- 0xCFEAE52F,
- 0x7D0FE12B,
- 0xF1CE5F65,
- 0x7E0A4DF8,
- 0xCFEA5F72,
- 0x7D0BEFEE,
- 0xCFEA5F74,
- 0xE522EFDE,
- 0x5F74CFDA,
- 0x0B627385,
- 0xDF627E0A,
- 0x30D8145B,
- 0xBFFFF3C8,
- 0x5FFFDFFF,
- 0xA7F85F5E,
- 0xBFFE7F7D,
- 0x10D31450,
- 0x5F36BFFF,
- 0xAF785F5E,
- 0xBFFDA7F8,
- 0x5F36BFFE,
- 0x77FD30C0,
- 0x4E08FDCF,
- 0xE5FF6E0F,
- 0xAFF87E1F,
- 0x7E0FFD1F,
- 0xF1CF5F1B,
- 0xABF80D5E,
- 0x5F5EFFEF,
- 0x79F730A2,
- 0xAFDD5F34,
- 0x47F85F34,
- 0xAFED7FDD,
- 0x50B24978,
- 0x47FD7F1D,
- 0x7DFD70AD,
- 0xEF717EC1,
- 0x6BA47F01,
- 0x2D267EFD,
- 0x30DE5F5E,
- 0xFFFD5F5E,
- 0xFFEF5F5E,
- 0xFFDF0CA0,
- 0xAFED0A9E,
- 0xAFDD0C3A,
- 0x5F3AAFBD,
- 0x7FBDB082,
- 0x5F8247F8
-};
-
-uint patch_2f00[] = {
- 0x3E303430,
- 0x34343737,
- 0xABF7BF9B,
- 0x994B4FBD,
- 0xBD599493,
- 0x349FFF37,
- 0xFB9B177D,
- 0xD9936956,
- 0xBBFDD697,
- 0xBDD2FD11,
- 0x31DB9BB3,
- 0x63139637,
- 0x93733693,
- 0x193137F7,
- 0x331737AF,
- 0x7BB9B999,
- 0xBB197957,
- 0x7FDFD3D5,
- 0x73B773F7,
- 0x37933B99,
- 0x1D115316,
- 0x99315315,
- 0x31694BF4,
- 0xFBDBD359,
- 0x31497353,
- 0x76956D69,
- 0x7B9D9693,
- 0x13131979,
- 0x79376935
-};
-#endif
-
-/*
- * I2C/SPI/SMC1 relocation patch arrays.
- */
-
-#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x3fff0000,
- 0x3ffd0000,
- 0x3ffb0000,
- 0x3ff90000,
- 0x5f13eff8,
- 0x5eb5eff8,
- 0x5f88adf7,
- 0x5fefadf7,
- 0x3a9cfbc8,
- 0x77cae1bb,
- 0xf4de7fad,
- 0xabae9330,
- 0x4e08fdcf,
- 0x6e0faff8,
- 0x7ccf76cf,
- 0xfdaff9cf,
- 0xabf88dc8,
- 0xab5879f7,
- 0xb0925d8d,
- 0xdfd079f7,
- 0xb090e6bb,
- 0xe5bbe74f,
- 0x9e046f0f,
- 0x6ffb76ce,
- 0xee0cf9cf,
- 0x2bfbefef,
- 0xcfeef9cf,
- 0x76cead23,
- 0x90b3df99,
- 0x7fddd0c1,
- 0x4bf847fd,
- 0x7ccf76ce,
- 0xcfef77ca,
- 0x7eaf7fad,
- 0x7dfdf0b7,
- 0xef7a7fca,
- 0x77cafbc8,
- 0x6079e722,
- 0xfbc85fff,
- 0xdfff5fb3,
- 0xfffbfbc8,
- 0xf3c894a5,
- 0xe7c9edf9,
- 0x7f9a7fad,
- 0x5f36afe8,
- 0x5f5bffdf,
- 0xdf95cb9e,
- 0xaf7d5fc3,
- 0xafed8c1b,
- 0x5fc3afdd,
- 0x5fc5df99,
- 0x7efdb0b3,
- 0x5fb3fffe,
- 0xabae5fb3,
- 0xfffe5fd0,
- 0x600be6bb,
- 0x600b5fd0,
- 0xdfc827fb,
- 0xefdf5fca,
- 0xcfde3a9c,
- 0xe7c9edf9,
- 0xf3c87f9e,
- 0x54ca7fed,
- 0x2d3a3637,
- 0x756f7e9a,
- 0xf1ce37ef,
- 0x2e677fee,
- 0x10ebadf8,
- 0xefdecfea,
- 0xe52f7d9f,
- 0xe12bf1ce,
- 0x5f647e9a,
- 0x4df8cfea,
- 0x5f717d9b,
- 0xefeecfea,
- 0x5f73e522,
- 0xefde5f73,
- 0xcfda0b61,
- 0x5d8fdf61,
- 0xe7c9edf9,
- 0x7e9a30d5,
- 0x1458bfff,
- 0xf3c85fff,
- 0xdfffa7f8,
- 0x5f5bbffe,
- 0x7f7d10d0,
- 0x144d5f33,
- 0xbfffaf78,
- 0x5f5bbffd,
- 0xa7f85f33,
- 0xbffe77fd,
- 0x30bd4e08,
- 0xfdcfe5ff,
- 0x6e0faff8,
- 0x7eef7e9f,
- 0xfdeff1cf,
- 0x5f17abf8,
- 0x0d5b5f5b,
- 0xffef79f7,
- 0x309eafdd,
- 0x5f3147f8,
- 0x5f31afed,
- 0x7fdd50af,
- 0x497847fd,
- 0x7f9e7fed,
- 0x7dfd70a9,
- 0xef7e7ece,
- 0x6ba07f9e,
- 0x2d227efd,
- 0x30db5f5b,
- 0xfffd5f5b,
- 0xffef5f5b,
- 0xffdf0c9c,
- 0xafed0a9a,
- 0xafdd0c37,
- 0x5f37afbd,
- 0x7fbdb081,
- 0x5f8147f8,
- 0x3a11e710,
- 0xedf0ccdd,
- 0xf3186d0a,
- 0x7f0e5f06,
- 0x7fedbb38,
- 0x3afe7468,
- 0x7fedf4fc,
- 0x8ffbb951,
- 0xb85f77fd,
- 0xb0df5ddd,
- 0xdefe7fed,
- 0x90e1e74d,
- 0x6f0dcbf7,
- 0xe7decfed,
- 0xcb74cfed,
- 0xcfeddf6d,
- 0x91714f74,
- 0x5dd2deef,
- 0x9e04e7df,
- 0xefbb6ffb,
- 0xe7ef7f0e,
- 0x9e097fed,
- 0xebdbeffa,
- 0xeb54affb,
- 0x7fea90d7,
- 0x7e0cf0c3,
- 0xbffff318,
- 0x5fffdfff,
- 0xac59efea,
- 0x7fce1ee5,
- 0xe2ff5ee1,
- 0xaffbe2ff,
- 0x5ee3affb,
- 0xf9cc7d0f,
- 0xaef8770f,
- 0x7d0fb0c6,
- 0xeffbbfff,
- 0xcfef5ede,
- 0x7d0fbfff,
- 0x5ede4cf8,
- 0x7fddd0bf,
- 0x49f847fd,
- 0x7efdf0bb,
- 0x7fedfffd,
- 0x7dfdf0b7,
- 0xef7e7e1e,
- 0x5ede7f0e,
- 0x3a11e710,
- 0xedf0ccab,
- 0xfb18ad2e,
- 0x1ea9bbb8,
- 0x74283b7e,
- 0x73c2e4bb,
- 0x2ada4fb8,
- 0xdc21e4bb,
- 0xb2a1ffbf,
- 0x5e2c43f8,
- 0xfc87e1bb,
- 0xe74ffd91,
- 0x6f0f4fe8,
- 0xc7ba32e2,
- 0xf396efeb,
- 0x600b4f78,
- 0xe5bb760b,
- 0x53acaef8,
- 0x4ef88b0e,
- 0xcfef9e09,
- 0xabf8751f,
- 0xefef5bac,
- 0x741f4fe8,
- 0x751e760d,
- 0x7fdbf081,
- 0x741cafce,
- 0xefcc7fce,
- 0x751e70ac,
- 0x741ce7bb,
- 0x3372cfed,
- 0xafdbefeb,
- 0xe5bb760b,
- 0x53f2aef8,
- 0xafe8e7eb,
- 0x4bf8771e,
- 0x7e247fed,
- 0x4fcbe2cc,
- 0x7fbc30a9,
- 0x7b0f7a0f,
- 0x34d577fd,
- 0x308b5db7,
- 0xde553e5f,
- 0xaf78741f,
- 0x741f30f0,
- 0xcfef5e2c,
- 0x741f3eac,
- 0xafb8771e,
- 0x5e677fed,
- 0x0bd3e2cc,
- 0x741ccfec,
- 0xe5ca53cd,
- 0x6fcb4f74,
- 0x5dadde4b,
- 0x2ab63d38,
- 0x4bb3de30,
- 0x751f741c,
- 0x6c42effa,
- 0xefea7fce,
- 0x6ffc30be,
- 0xefec3fca,
- 0x30b3de2e,
- 0xadf85d9e,
- 0xaf7daefd,
- 0x5d9ede2e,
- 0x5d9eafdd,
- 0x761f10ac,
- 0x1da07efd,
- 0x30adfffe,
- 0x4908fb18,
- 0x5fffdfff,
- 0xafbb709b,
- 0x4ef85e67,
- 0xadf814ad,
- 0x7a0f70ad,
- 0xcfef50ad,
- 0x7a0fde30,
- 0x5da0afed,
- 0x3c12780f,
- 0xefef780f,
- 0xefef790f,
- 0xa7f85e0f,
- 0xffef790f,
- 0xefef790f,
- 0x14adde2e,
- 0x5d9eadfd,
- 0x5e2dfffb,
- 0xe79addfd,
- 0xeff96079,
- 0x607ae79a,
- 0xddfceff9,
- 0x60795dff,
- 0x607acfef,
- 0xefefefdf,
- 0xefbfef7f,
- 0xeeffedff,
- 0xebffe7ff,
- 0xafefafdf,
- 0xafbfaf7f,
- 0xaeffadff,
- 0xabffa7ff,
- 0x6fef6fdf,
- 0x6fbf6f7f,
- 0x6eff6dff,
- 0x6bff67ff,
- 0x2fef2fdf,
- 0x2fbf2f7f,
- 0x2eff2dff,
- 0x2bff27ff,
- 0x4e08fd1f,
- 0xe5ff6e0f,
- 0xaff87eef,
- 0x7e0ffdef,
- 0xf11f6079,
- 0xabf8f542,
- 0x7e0af11c,
- 0x37cfae3a,
- 0x7fec90be,
- 0xadf8efdc,
- 0xcfeae52f,
- 0x7d0fe12b,
- 0xf11c6079,
- 0x7e0a4df8,
- 0xcfea5dc4,
- 0x7d0befec,
- 0xcfea5dc6,
- 0xe522efdc,
- 0x5dc6cfda,
- 0x4e08fd1f,
- 0x6e0faff8,
- 0x7c1f761f,
- 0xfdeff91f,
- 0x6079abf8,
- 0x761cee24,
- 0xf91f2bfb,
- 0xefefcfec,
- 0xf91f6079,
- 0x761c27fb,
- 0xefdf5da7,
- 0xcfdc7fdd,
- 0xd09c4bf8,
- 0x47fd7c1f,
- 0x761ccfcf,
- 0x7eef7fed,
- 0x7dfdf093,
- 0xef7e7f1e,
- 0x771efb18,
- 0x6079e722,
- 0xe6bbe5bb,
- 0xae0ae5bb,
- 0x600bae85,
- 0xe2bbe2bb,
- 0xe2bbe2bb,
- 0xaf02e2bb,
- 0xe2bb2ff9,
- 0x6079e2bb
-};
-
-uint patch_2f00[] = {
- 0x30303030,
- 0x3e3e3434,
- 0xabbf9b99,
- 0x4b4fbdbd,
- 0x59949334,
- 0x9fff37fb,
- 0x9b177dd9,
- 0x936956bb,
- 0xfbdd697b,
- 0xdd2fd113,
- 0x1db9f7bb,
- 0x36313963,
- 0x79373369,
- 0x3193137f,
- 0x7331737a,
- 0xf7bb9b99,
- 0x9bb19795,
- 0x77fdfd3d,
- 0x573b773f,
- 0x737933f7,
- 0xb991d115,
- 0x31699315,
- 0x31531694,
- 0xbf4fbdbd,
- 0x35931497,
- 0x35376956,
- 0xbd697b9d,
- 0x96931313,
- 0x19797937,
- 0x6935af78,
- 0xb9b3baa3,
- 0xb8788683,
- 0x368f78f7,
- 0x87778733,
- 0x3ffffb3b,
- 0x8e8f78b8,
- 0x1d118e13,
- 0xf3ff3f8b,
- 0x6bd8e173,
- 0xd1366856,
- 0x68d1687b,
- 0x3daf78b8,
- 0x3a3a3f87,
- 0x8f81378f,
- 0xf876f887,
- 0x77fd8778,
- 0x737de8d6,
- 0xbbf8bfff,
- 0xd8df87f7,
- 0xfd876f7b,
- 0x8bfff8bd,
- 0x8683387d,
- 0xb873d87b,
- 0x3b8fd7f8,
- 0xf7338883,
- 0xbb8ee1f8,
- 0xef837377,
- 0x3337b836,
- 0x817d11f8,
- 0x7378b878,
- 0xd3368b7d,
- 0xed731b7d,
- 0x833731f3,
- 0xf22f3f23
-};
-
-uint patch_2e00[] = {
- 0x27eeeeee,
- 0xeeeeeeee,
- 0xeeeeeeee,
- 0xeeeeeeee,
- 0xee4bf4fb,
- 0xdbd259bb,
- 0x1979577f,
- 0xdfd2d573,
- 0xb773f737,
- 0x4b4fbdbd,
- 0x25b9b177,
- 0xd2d17376,
- 0x956bbfdd,
- 0x697bdd2f,
- 0xff9f79ff,
- 0xff9ff22f
-};
-#endif
-
-/*
- * USB SOF patch arrays.
- */
-
-#ifdef CONFIG_USB_SOF_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x7fff0000,
- 0x7ffd0000,
- 0x7ffb0000,
- 0x49f7ba5b,
- 0xba383ffb,
- 0xf9b8b46d,
- 0xe5ab4e07,
- 0xaf77bffe,
- 0x3f7bbf79,
- 0xba5bba38,
- 0xe7676076,
- 0x60750000
-};
-
-uint patch_2f00[] = {
- 0x3030304c,
- 0xcab9e441,
- 0xa1aaf220
-};
-#endif
-
-void
-cpm_load_patch(volatile immap_t *immr)
-{
- volatile uint *dp; /* Dual-ported RAM. */
- volatile cpm8xx_t *commproc;
- volatile iic_t *iip;
- volatile spi_t *spp;
- volatile smc_uart_t *smp;
- int i;
-
- commproc = (cpm8xx_t *)&immr->im_cpm;
-
-#ifdef CONFIG_USB_SOF_UCODE_PATCH
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
-
- commproc->cp_rccr = 0x0009;
-
- printk("USB SOF microcode patch installed\n");
-#endif /* CONFIG_USB_SOF_UCODE_PATCH */
-
-#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
- defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
-
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
-
- iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
-# define RPBASE 0x0500
- iip->iic_rpbase = RPBASE;
-
- /* Put SPI above the IIC, also 32-byte aligned.
- */
- i = (RPBASE + sizeof(iic_t) + 31) & ~31;
- spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
- spp->spi_rpbase = i;
-
-# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
- commproc->cp_cpmcr1 = 0x802a;
- commproc->cp_cpmcr2 = 0x8028;
- commproc->cp_cpmcr3 = 0x802e;
- commproc->cp_cpmcr4 = 0x802c;
- commproc->cp_rccr = 1;
-
- printk("I2C/SPI microcode patch installed.\n");
-# endif /* CONFIG_I2C_SPI_UCODE_PATCH */
-
-# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
-
- dp = (uint *)&(commproc->cp_dpmem[0x0e00]);
- for (i=0; i<(sizeof(patch_2e00)/4); i++)
- *dp++ = patch_2e00[i];
-
- commproc->cp_cpmcr1 = 0x8080;
- commproc->cp_cpmcr2 = 0x808a;
- commproc->cp_cpmcr3 = 0x8028;
- commproc->cp_cpmcr4 = 0x802a;
- commproc->cp_rccr = 3;
-
- smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1];
- smp->smc_rpbase = 0x1FC0;
-
- printk("I2C/SPI/SMC1 microcode patch installed.\n");
-# endif /* CONFIG_I2C_SPI_SMC1_UCODE_PATCH) */
-
-#endif /* some variation of the I2C/SPI patch was selected */
-}
-
-/*
- * Take this entire routine out, since no one calls it and its
- * logic is suspect.
- */
-
-#if 0
-void
-verify_patch(volatile immap_t *immr)
-{
- volatile uint *dp;
- volatile cpm8xx_t *commproc;
- int i;
-
- commproc = (cpm8xx_t *)&immr->im_cpm;
-
- printk("cp_rccr %x\n", commproc->cp_rccr);
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- if (*dp++ != patch_2000[i]) {
- printk("patch_2000 bad at %d\n", i);
- dp--;
- printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]);
- break;
- }
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- if (*dp++ != patch_2f00[i]) {
- printk("patch_2f00 bad at %d\n", i);
- dp--;
- printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]);
- break;
- }
-
- commproc->cp_rccr = 0x0009;
-}
-#endif
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
deleted file mode 100644
index 0f1863ed9c1c..000000000000
--- a/arch/ppc/Kconfig
+++ /dev/null
@@ -1,1186 +0,0 @@
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-#
-
-mainmenu "Linux/PowerPC Kernel Configuration"
-
-config WORD_SIZE
- int
- default 32
-
-config MMU
- bool
- default y
-
-config GENERIC_HARDIRQS
- bool
- default y
-
-config RWSEM_GENERIC_SPINLOCK
- bool
-
-config RWSEM_XCHGADD_ALGORITHM
- bool
- default y
-
-config ARCH_HAS_ILOG2_U32
- bool
- default y
-
-config ARCH_HAS_ILOG2_U64
- bool
- default n
-
-config GENERIC_HWEIGHT
- bool
- default y
-
-config GENERIC_CALIBRATE_DELAY
- bool
- default y
-
-config PPC
- bool
- default y
- select HAVE_IDE
- select HAVE_OPROFILE
- select HAVE_KPROBES
-
-config PPC32
- bool
- default y
-
-# All PPCs use generic nvram driver through ppc_md
-config GENERIC_NVRAM
- bool
- default y
-
-config GENERIC_FIND_NEXT_BIT
- bool
- default y
-
-config SCHED_NO_NO_OMIT_FRAME_POINTER
- bool
- default y
-
-config ARCH_MAY_HAVE_PC_FDC
- bool
- default y
-
-config GENERIC_BUG
- bool
- default y
- depends on BUG
-
-source "init/Kconfig"
-
-menu "Processor"
-
-choice
- prompt "Processor Type"
- default 6xx
-
-config 6xx
- bool "6xx/7xx/74xx/52xx/82xx"
- select PPC_FPU
- help
- There are four types of PowerPC chips supported. The more common
- types (601, 603, 604, 740, 750, 7400), the older Freescale
- (formerly Motorola) embedded versions (821, 823, 850, 855, 860,
- 52xx, 82xx), the IBM embedded versions (403 and 405) and
- the Book E embedded processors from IBM (44x) and Freescale (85xx).
- For support for 64-bit processors, set ARCH=powerpc.
- Unless you are building a kernel for one of the embedded processor
- systems, choose 6xx.
- Also note that because the 52xx, 82xx family have a 603e
- core, specific support for that chipset is asked later on.
-
-config 40x
- bool "40x"
- select PPC_DCR_NATIVE
-
-config 44x
- bool "44x"
- select PPC_DCR_NATIVE
-
-config 8xx
- bool "8xx"
- select PPC_LIB_RHEAP
-
-endchoice
-
-config PPC_FPU
- bool
-
-config PPC_DCR_NATIVE
- bool
- default n
-
-config PPC_DCR
- bool
- depends on PPC_DCR_NATIVE
- default y
-
-config PTE_64BIT
- bool
- depends on 44x
- default y if 44x
-
-config PHYS_64BIT
- bool
- depends on 44x
- default y if 44x
- ---help---
- This option enables kernel support for larger than 32-bit physical
- addresses. This features is not be available on all e500 cores.
-
- If in doubt, say N here.
-
-config ALTIVEC
- bool "AltiVec Support"
- depends on 6xx
- depends on !8260
- ---help---
- This option enables kernel support for the Altivec extensions to the
- PowerPC processor. The kernel currently supports saving and restoring
- altivec registers, and turning on the 'altivec enable' bit so user
- processes can execute altivec instructions.
-
- This option is only usefully if you have a processor that supports
- altivec (G4, otherwise known as 74xx series), but does not have
- any affect on a non-altivec cpu (it does, however add code to the
- kernel).
-
- If in doubt, say Y here.
-
-config TAU
- bool "Thermal Management Support"
- depends on 6xx && !8260
- help
- G3 and G4 processors have an on-chip temperature sensor called the
- 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
- temperature within 2-4 degrees Celsius. This option shows the current
- on-die temperature in /proc/cpuinfo if the cpu supports it.
-
- Unfortunately, on some chip revisions, this sensor is very inaccurate
- and in some cases, does not work at all, so don't assume the cpu
- temp is actually what /proc/cpuinfo says it is.
-
-config TAU_INT
- bool "Interrupt driven TAU driver (DANGEROUS)"
- depends on TAU
- ---help---
- The TAU supports an interrupt driven mode which causes an interrupt
- whenever the temperature goes out of range. This is the fastest way
- to get notified the temp has exceeded a range. With this option off,
- a timer is used to re-check the temperature periodically.
-
- However, on some cpus it appears that the TAU interrupt hardware
- is buggy and can cause a situation which would lead unexplained hard
- lockups.
-
- Unless you are extending the TAU driver, or enjoy kernel/hardware
- debugging, leave this option off.
-
-config TAU_AVERAGE
- bool "Average high and low temp"
- depends on TAU
- ---help---
- The TAU hardware can compare the temperature to an upper and lower
- bound. The default behavior is to show both the upper and lower
- bound in /proc/cpuinfo. If the range is large, the temperature is
- either changing a lot, or the TAU hardware is broken (likely on some
- G4's). If the range is small (around 4 degrees), the temperature is
- relatively stable. If you say Y here, a single temperature value,
- halfway between the upper and lower bounds, will be reported in
- /proc/cpuinfo.
-
- If in doubt, say N here.
-
-config MATH_EMULATION
- bool "Math emulation"
- depends on 4xx || 8xx
- ---help---
- Some PowerPC chips designed for embedded applications do not have
- a floating-point unit and therefore do not implement the
- floating-point instructions in the PowerPC instruction set. If you
- say Y here, the kernel will include code to emulate a floating-point
- unit, which will allow programs that use floating-point
- instructions to run.
-
- If you have an Apple machine or an IBM RS/6000 or pSeries machine,
- or any machine with a 6xx, 7xx or 7xxx series processor, say N
- here. Saying Y here will not hurt performance (on any machine) but
- will increase the size of the kernel.
-
-config KEXEC
- bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- kexec is a system call that implements the ability to shutdown your
- current kernel, and to start another kernel. It is like a reboot
- but it is independent of the system firmware. And like a reboot
- you can start any kernel with it, not just Linux.
-
- The name comes from the similarity to the exec system call.
-
- It is an ongoing process to be certain the hardware in a machine
- is properly shutdown, so do not be surprised if this code does not
- initially work for you. It may help to enable device hotplugging
- support. As of this writing the exact hardware interface is
- strongly in flux, so no good recommendation can be made.
-
- In the GameCube implementation, kexec allows you to load and
- run DOL files, including kernel and homebrew DOLs.
-
-source "drivers/cpufreq/Kconfig"
-
-config PPC601_SYNC_FIX
- bool "Workarounds for PPC601 bugs"
- depends on 6xx && PPC_PREP
- help
- Some versions of the PPC601 (the first PowerPC chip) have bugs which
- mean that extra synchronization instructions are required near
- certain instructions, typically those that make major changes to the
- CPU state. These extra instructions reduce performance slightly.
- If you say N here, these extra instructions will not be included,
- resulting in a kernel which will run faster but may not run at all
- on some systems with the PPC601 chip.
-
- If in doubt, say Y here.
-
-source arch/ppc/platforms/4xx/Kconfig
-
-config PPC_STD_MMU
- bool
- depends on 6xx
- default y
-
-config NOT_COHERENT_CACHE
- bool
- depends on 4xx || 8xx
- default y
-
-endmenu
-
-menu "Platform options"
-
-config FADS
- bool
-
-choice
- prompt "8xx Machine Type"
- depends on 8xx
- default RPXLITE
-
-config RPXLITE
- bool "RPX-Lite"
- ---help---
- Single-board computers based around the PowerPC MPC8xx chips and
- intended for embedded applications. The following types are
- supported:
-
- RPX-Lite:
- Embedded Planet RPX Lite. PC104 form-factor SBC based on the MPC823.
-
- RPX-Classic:
- Embedded Planet RPX Classic Low-fat. Credit-card-size SBC based on
- the MPC 860
-
- BSE-IP:
- Bright Star Engineering ip-Engine.
-
- TQM823L:
- TQM850L:
- TQM855L:
- TQM860L:
- MPC8xx based family of mini modules, half credit card size,
- up to 64 MB of RAM, 8 MB Flash, (Fast) Ethernet, 2 x serial ports,
- 2 x CAN bus interface, ...
- Manufacturer: TQ Components, www.tq-group.de
- Date of Release: October (?) 1999
- End of Life: not yet :-)
- URL:
- - module: <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>
- - starter kit: <http://www.denx.de/PDF/STK8xxLHWM201.pdf>
- - images: <http://www.denx.de/embedded-ppc-en.html>
-
- FPS850L:
- FingerPrint Sensor System (based on TQM850L)
- Manufacturer: IKENDI AG, <http://www.ikendi.com/>
- Date of Release: November 1999
- End of life: end 2000 ?
- URL: see TQM850L
-
- IVMS8:
- MPC860 based board used in the "Integrated Voice Mail System",
- Small Version (8 voice channels)
- Manufacturer: Speech Design, <http://www.speech-design.de/>
- Date of Release: December 2000 (?)
- End of life: -
- URL: <http://www.speech-design.de/>
-
- IVML24:
- MPC860 based board used in the "Integrated Voice Mail System",
- Large Version (24 voice channels)
- Manufacturer: Speech Design, <http://www.speech-design.de/>
- Date of Release: March 2001 (?)
- End of life: -
- URL: <http://www.speech-design.de/>
-
- HERMES:
- Hermes-Pro ISDN/LAN router with integrated 8 x hub
- Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik
- <http://www.multidata.de/>
- Date of Release: 2000 (?)
- End of life: -
- URL: <http://www.multidata.de/english/products/hpro.htm>
-
- IP860:
- VMEBus IP (Industry Pack) carrier board with MPC860
- Manufacturer: MicroSys GmbH, <http://www.microsys.de/>
- Date of Release: ?
- End of life: -
- URL: <http://www.microsys.de/html/ip860.html>
-
- PCU_E:
- PCU = Peripheral Controller Unit, Extended
- Manufacturer: Siemens AG, ICN (Information and Communication Networks)
- <http://www.siemens.de/page/1,3771,224315-1-999_2_226207-0,00.html>
- Date of Release: April 2001
- End of life: August 2001
- URL: n. a.
-
-config RPXCLASSIC
- bool "RPX-Classic"
- help
- The RPX-Classic is a single-board computer based on the Motorola
- MPC860. It features 16MB of DRAM and a variable amount of flash,
- I2C EEPROM, thermal monitoring, a PCMCIA slot, a DIP switch and two
- LEDs. Variants with Ethernet ports exist. Say Y here to support it
- directly.
-
-config BSEIP
- bool "BSE-IP"
- help
- Say Y here to support the Bright Star Engineering ipEngine SBC.
- This is a credit-card-sized device featuring a MPC823 processor,
- 26MB DRAM, 4MB flash, Ethernet, a 16K-gate FPGA, USB, an LCD/video
- controller, and two RS232 ports.
-
-config MPC8XXFADS
- bool "FADS"
- select FADS
-
-config TQM823L
- bool "TQM823L"
- help
- Say Y here to support the TQM823L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM850L
- bool "TQM850L"
- help
- Say Y here to support the TQM850L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM855L
- bool "TQM855L"
- help
- Say Y here to support the TQM855L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM860L
- bool "TQM860L"
- help
- Say Y here to support the TQM860L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config FPS850L
- bool "FPS850L"
-
-config IVMS8
- bool "IVMS8"
- help
- Say Y here to support the Integrated Voice-Mail Small 8-channel SBC
- from Speech Design, released March 2001. The manufacturer's website
- is at <http://www.speech-design.de/>.
-
-config IVML24
- bool "IVML24"
- help
- Say Y here to support the Integrated Voice-Mail Large 24-channel SBC
- from Speech Design, released March 2001. The manufacturer's website
- is at <http://www.speech-design.de/>.
-
-config HERMES_PRO
- bool "HERMES"
-
-config IP860
- bool "IP860"
-
-config LWMON
- bool "LWMON"
-
-config PCU_E
- bool "PCU_E"
-
-config CCM
- bool "CCM"
-
-config LANTEC
- bool "LANTEC"
-
-config MBX
- bool "MBX"
- help
- MBX is a line of Motorola single-board computer based around the
- MPC821 and MPC860 processors, and intended for embedded-controller
- applications. Say Y here to support these boards directly.
-
-config WINCEPT
- bool "WinCept"
- help
- The Wincept 100/110 is a Motorola single-board computer based on the
- MPC821 PowerPC, introduced in 1998 and designed to be used in
- thin-client machines. Say Y to support it directly.
-
-endchoice
-
-choice
- prompt "Machine Type"
- depends on 6xx
- default PPC_PREP
- ---help---
- Linux currently supports several different kinds of PowerPC-based
- machines: Apple Power Macintoshes and clones (such as the Motorola
- Starmax series), PReP (PowerPC Reference Platform) machines (such
- as the Motorola PowerStacks, Motorola cPCI/VME embedded systems,
- and some IBM RS/6000 systems), CHRP (Common Hardware Reference
- Platform) machines (including all of the recent IBM RS/6000 and
- pSeries machines), and several embedded PowerPC systems containing
- 4xx, 6xx, 7xx, 8xx, 74xx, and 82xx processors. Currently, the
- default option is to build a kernel which works on PReP.
-
- Note that support for Apple and CHRP machines is now only available
- with ARCH=powerpc, and has been removed from this menu. If you
- wish to build a kernel for an Apple or CHRP machine, exit this
- configuration process and re-run it with ARCH=powerpc.
-
- Select PReP if configuring for a PReP machine.
-
-config PPC_PREP
- bool "PReP"
-
-config KATANA
- bool "Artesyn-Katana"
- help
- Select KATANA if configuring an Artesyn KATANA 750i or 3750
- cPCI board.
-
-config WILLOW
- bool "Cogent-Willow"
-
-config CPCI690
- bool "Force-CPCI690"
- help
- Select CPCI690 if configuring a Force CPCI690 cPCI board.
-
-config POWERPMC250
- bool "Force-PowerPMC250"
-
-config CHESTNUT
- bool "IBM 750FX Eval board or 750GX Eval board"
- help
- Select CHESTNUT if configuring an IBM 750FX Eval Board or a
- IBM 750GX Eval board.
-
-config SPRUCE
- bool "IBM-Spruce"
- select PPC_INDIRECT_PCI
-
-config HDPU
- bool "Sky-HDPU"
- help
- Select HDPU if configuring a Sky Computers Compute Blade.
-
-config HDPU_FEATURES
- depends on HDPU
- tristate "HDPU-Features"
- help
- Select to enable HDPU enhanced features.
-
-config EV64260
- bool "Marvell-EV64260BP"
- help
- Select EV64260 if configuring a Marvell (formerly Galileo)
- EV64260BP Evaluation platform.
-
-config LOPEC
- bool "Motorola-LoPEC"
- select PPC_I8259
-
-config MVME5100
- bool "Motorola-MVME5100"
- select PPC_INDIRECT_PCI
-
-config PPLUS
- bool "Motorola-PowerPlus"
- select PPC_I8259
- select PPC_INDIRECT_PCI
-
-config PRPMC750
- bool "Motorola-PrPMC750"
- select PPC_INDIRECT_PCI
-
-config PRPMC800
- bool "Motorola-PrPMC800"
- select PPC_INDIRECT_PCI
-
-config SANDPOINT
- bool "Motorola-Sandpoint"
- select PPC_I8259
- help
- Select SANDPOINT if configuring for a Motorola Sandpoint X3
- (any flavor).
-
-config RADSTONE_PPC7D
- bool "Radstone Technology PPC7D board"
- select PPC_I8259
-
-config PAL4
- bool "SBS-Palomar4"
-
-config EST8260
- bool "EST8260"
- ---help---
- The EST8260 is a single-board computer manufactured by Wind River
- Systems, Inc. (formerly Embedded Support Tools Corp.) and based on
- the MPC8260. Wind River Systems has a website at
- <http://www.windriver.com/>, but the EST8260 cannot be found on it
- and has probably been discontinued or rebadged.
-
-config SBC82xx
- bool "SBC82xx"
- ---help---
- SBC PowerQUICC II, single-board computer with MPC82xx CPU
- Manufacturer: Wind River Systems, Inc.
- Date of Release: May 2003
- End of Life: -
- URL: <http://www.windriver.com/>
-
-config SBS8260
- bool "SBS8260"
-
-config RPX8260
- bool "RPXSUPER"
-
-config TQM8260
- bool "TQM8260"
- ---help---
- MPC8260 based module, little larger than credit card,
- up to 128 MB global + 64 MB local RAM, 32 MB Flash,
- 32 kB EEPROM, 256 kB L@ Cache, 10baseT + 100baseT Ethernet,
- 2 x serial ports, ...
- Manufacturer: TQ Components, www.tq-group.de
- Date of Release: June 2001
- End of Life: not yet :-)
- URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
-
-config PQ2FADS
- bool "Freescale-PQ2FADS"
- help
- Select PQ2FADS if you wish to configure for a Freescale
- PQ2FADS board (-VR or -ZU).
-
-config LITE5200
- bool "Freescale LITE5200 / (IceCube)"
- select PPC_MPC52xx
- help
- Support for the LITE5200 dev board for the MPC5200 from Freescale.
- This is for the LITE5200 version 2.0 board. Don't know if it changes
- much but it's only been tested on this board version. I think this
- board is also known as IceCube.
-
-config LITE5200B
- bool "Freescale LITE5200B"
- depends on LITE5200
- help
- Support for the LITE5200B dev board for the MPC5200 from Freescale.
- This is the new board with 2 PCI slots.
-
-config EV64360
- bool "Marvell-EV64360BP"
- help
- Select EV64360 if configuring a Marvell EV64360BP Evaluation
- platform.
-endchoice
-
-config TQM8xxL
- bool
- depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
- default y
-
-config EMBEDDEDBOOT
- bool
- depends on 8xx || 8260
- default y
-
-config PPC_MPC52xx
- bool
-
-config 8260
- bool "CPM2 Support" if WILLOW
- depends on 6xx
- default y if TQM8260 || RPX8260 || EST8260 || SBS8260 || SBC82xx || PQ2FADS
- help
- The MPC8260 is a typical embedded CPU made by Motorola. Selecting
- this option means that you wish to build a kernel for a machine with
- an 8260 class CPU.
-
-config CPM1
- bool
- depends on 8xx
- default y
- help
- The CPM1 (Communications Processor Module) is a coprocessor on
- embedded CPUs made by Motorola. Selecting this option means that
- you wish to build a kernel for a machine with a CPM1 coprocessor
- on it (8xx, 827x, 8560).
-
-config CPM2
- bool
- depends on 8260 || MPC8560 || MPC8555
- select PPC_LIB_RHEAP
- default y
- help
- The CPM2 (Communications Processor Module) is a coprocessor on
- embedded CPUs made by Motorola. Selecting this option means that
- you wish to build a kernel for a machine with a CPM2 coprocessor
- on it (826x, 827x, 8560).
-
-config PPC_GEN550
- bool
- depends on SANDPOINT || SPRUCE || PPLUS || \
- PRPMC750 || PRPMC800 || LOPEC || \
- (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D
- default y
-
-config FORCE
- bool
- depends on 6xx && POWERPMC250
- default y
-
-config GT64260
- bool
- depends on EV64260 || CPCI690
- default y
-
-config MV64360 # Really MV64360 & MV64460
- bool
- depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU || EV64360
- default y
-
-config MV64X60
- bool
- depends on (GT64260 || MV64360)
- select PPC_INDIRECT_PCI
- default y
-
-config MV643XX_ETH_0
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360 || HDPU)
- default y
-
-config MV643XX_ETH_1
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360)
- default y
-
-config MV643XX_ETH_2
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360)
- default y
-
-menu "Set bridge options"
- depends on MV64X60
-
-config NOT_COHERENT_CACHE
- bool "Turn off Cache Coherency"
- default n
- help
- Some 64x60 bridges lock up when trying to enforce cache coherency.
- When this option is selected, cache coherency will be turned off.
- Note that this can cause other problems (e.g., stale data being
- speculatively loaded via a cached mapping). Use at your own risk.
-
-config MV64X60_BASE
- hex "Set bridge base used by firmware"
- default "0xf1000000"
- help
- A firmware can leave the base address of the bridge's registers at
- a non-standard location. If so, set this value to reflect the
- address of that non-standard location.
-
-config MV64X60_NEW_BASE
- hex "Set bridge base used by kernel"
- default "0xf1000000"
- help
- If the current base address of the bridge's registers is not where
- you want it, set this value to the address that you want it moved to.
-
-endmenu
-
-config NONMONARCH_SUPPORT
- bool "Enable Non-Monarch Support"
- depends on PRPMC800
-
-config HARRIER
- bool
- depends on PRPMC800
- default y
-
-config EPIC_SERIAL_MODE
- bool
- depends on 6xx && (LOPEC || SANDPOINT)
- default y
-
-config MPC10X_BRIDGE
- bool
- depends on POWERPMC250 || LOPEC || SANDPOINT
- select PPC_INDIRECT_PCI
- default y
-
-config MPC10X_OPENPIC
- bool
- depends on POWERPMC250 || LOPEC || SANDPOINT
- default y
-
-config MPC10X_STORE_GATHERING
- bool "Enable MPC10x store gathering"
- depends on MPC10X_BRIDGE
-
-config SANDPOINT_ENABLE_UART1
- bool "Enable DUART mode on Sandpoint"
- depends on SANDPOINT
- help
- If this option is enabled then the MPC824x processor will run
- in DUART mode instead of UART mode.
-
-config HARRIER_STORE_GATHERING
- bool "Enable Harrier store gathering"
- depends on HARRIER
-
-config MVME5100_IPMC761_PRESENT
- bool "MVME5100 configured with an IPMC761"
- depends on MVME5100
- select PPC_I8259
-
-config SPRUCE_BAUD_33M
- bool "Spruce baud clock support"
- depends on SPRUCE
-
-config PC_KEYBOARD
- bool "PC PS/2 style Keyboard"
- depends on 4xx || CPM2
-
-config PPCBUG_NVRAM
- bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC
- default y if PPC_PREP
-
-config SMP
- depends on PPC_STD_MMU
- bool "Symmetric multi-processing support"
- ---help---
- This enables support for systems with more than one CPU. If you have
- a system with only one CPU, say N. If you have a system with more
- than one CPU, say Y. Note that the kernel does not currently
- support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
- since they have inadequate hardware support for multiprocessor
- operation.
-
- If you say N here, the kernel will run on single and multiprocessor
- machines, but will use only one CPU of a multiprocessor machine. If
- you say Y here, the kernel will run on single-processor machines.
- On a single-processor machine, the kernel will run faster if you say
- N here.
-
- If you don't know what to do here, say N.
-
-config IRQ_ALL_CPUS
- bool "Distribute interrupts on all CPUs by default"
- depends on SMP && !MV64360
- help
- This option gives the kernel permission to distribute IRQs across
- multiple CPUs. Saying N here will route all IRQs to the first
- CPU. Generally saying Y is safe, although some problems have been
- reported with SMP Power Macintoshes with this option enabled.
-
-config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- range 2 32
- depends on SMP
- default "4"
-
-config HIGHMEM
- bool "High memory support"
-
-config ARCH_POPULATES_NODE_MAP
- def_bool y
-
-source kernel/Kconfig.hz
-source kernel/Kconfig.preempt
-source "mm/Kconfig"
-
-source "fs/Kconfig.binfmt"
-
-config PREP_RESIDUAL
- bool "Support for PReP Residual Data"
- depends on PPC_PREP
- help
- Some PReP systems have residual data passed to the kernel by the
- firmware. This allows detection of memory size, devices present and
- other useful pieces of information. Sometimes this information is
- not present or incorrect, in which case it could lead to the machine
- behaving incorrectly. If this happens, either disable PREP_RESIDUAL
- or pass the 'noresidual' option to the kernel.
-
- If you are running a PReP system, say Y here, otherwise say N.
-
-config PROC_PREPRESIDUAL
- bool "Support for reading of PReP Residual Data in /proc"
- depends on PREP_RESIDUAL && PROC_FS
- help
- Enabling this option will create a /proc/residual file which allows
- you to get at the residual data on PReP systems. You will need a tool
- (lsresidual) to parse it. If you aren't on a PReP system, you don't
- want this.
-
-config CMDLINE_BOOL
- bool "Default bootloader kernel arguments"
-
-config CMDLINE
- string "Initial kernel command string"
- depends on CMDLINE_BOOL
- default "console=ttyS0,9600 console=tty0 root=/dev/sda2"
- help
- On some platforms, there is currently no way for the boot loader to
- pass arguments to the kernel. For these platforms, you can supply
- some command-line options at build time by entering them here. In
- most cases you will need to specify the root device here.
-
-if BROKEN
-source kernel/power/Kconfig
-endif
-
-config SECCOMP
- bool "Enable seccomp to safely compute untrusted bytecode"
- depends on PROC_FS
- default y
- help
- This kernel feature is useful for number crunching applications
- that may need to compute untrusted bytecode during their
- execution. By using pipes or other transports made available to
- the process as file descriptors supporting the read/write
- syscalls, it's possible to isolate those applications in
- their own address space using seccomp. Once seccomp is
- enabled via /proc/<pid>/seccomp, it cannot be disabled
- and the task is only allowed to execute a few safe syscalls
- defined by each seccomp mode.
-
- If unsure, say Y. Only embedded should say N here.
-
-endmenu
-
-config ISA_DMA_API
- bool
- default y
-
-menu "Bus options"
-
-config ISA
- bool "Support for ISA-bus hardware"
- depends on PPC_PREP
- help
- Find out whether you have ISA slots on your motherboard. ISA is the
- name of a bus system, i.e. the way the CPU talks to the other stuff
- inside your box. If you have an Apple machine, say N here; if you
- have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If
- you have an embedded board, consult your board documentation.
-
-config ZONE_DMA
- bool
- default y
-
-config GENERIC_ISA_DMA
- bool
- depends on 6xx && !CPM2
- default y
-
-config PPC_I8259
- bool
- default y if PPC_PREP
- default n
-
-config PPC_INDIRECT_PCI
- bool
- depends on PCI
- default y if 40x || 44x || PPC_PREP
- default n
-
-config EISA
- bool
- help
- The Extended Industry Standard Architecture (EISA) bus is a bus
- architecture used on some older intel-based PCs.
-
-config SBUS
- bool
-
-# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
-config MCA
- bool
-
-config PCI
- bool "PCI support" if 40x || CPM2 || PPC_MPC52xx
- default y if !40x && !CPM2 && !8xx
- default PCI_QSPAN if !4xx && !CPM2 && 8xx
- help
- Find out whether your system includes a PCI bus. PCI is the name of
- a bus system, i.e. the way the CPU talks to the other stuff inside
- your box. If you say Y here, the kernel will include drivers and
- infrastructure code to support PCI bus devices.
-
-config PCI_DOMAINS
- def_bool PCI
-
-config PCI_SYSCALL
- def_bool PCI
-
-config PCI_QSPAN
- bool "QSpan PCI"
- depends on !4xx && !CPM2 && 8xx
- select PPC_I8259
- help
- Say Y here if you have a system based on a Motorola 8xx-series
- embedded processor with a QSPAN PCI interface, otherwise say N.
-
-config PCI_8260
- bool
- depends on PCI && 8260
- select PPC_INDIRECT_PCI
- default y
-
-config 8260_PCI9
- bool "Enable workaround for MPC826x erratum PCI 9"
- depends on PCI_8260
- default y
-
-choice
- prompt "IDMA channel for PCI 9 workaround"
- depends on 8260_PCI9
-
-config 8260_PCI9_IDMA1
- bool "IDMA1"
-
-config 8260_PCI9_IDMA2
- bool "IDMA2"
-
-config 8260_PCI9_IDMA3
- bool "IDMA3"
-
-config 8260_PCI9_IDMA4
- bool "IDMA4"
-
-endchoice
-
-source "drivers/pci/Kconfig"
-
-source "drivers/pcmcia/Kconfig"
-
-config RAPIDIO
- bool "RapidIO support" if MPC8540 || MPC8560
- help
- If you say Y here, the kernel will include drivers and
- infrastructure code to support RapidIO interconnect devices.
-
-source "drivers/rapidio/Kconfig"
-
-endmenu
-
-menu "Advanced setup"
-
-config ADVANCED_OPTIONS
- bool "Prompt for advanced kernel configuration options"
- help
- This option will enable prompting for a variety of advanced kernel
- configuration options. These options can cause the kernel to not
- work if they are set incorrectly, but can be used to optimize certain
- aspects of kernel memory management.
-
- Unless you know what you are doing, say N here.
-
-comment "Default settings for advanced configuration options are used"
- depends on !ADVANCED_OPTIONS
-
-config HIGHMEM_START_BOOL
- bool "Set high memory pool address"
- depends on ADVANCED_OPTIONS && HIGHMEM
- help
- This option allows you to set the base address of the kernel virtual
- area used to map high memory pages. This can be useful in
- optimizing the layout of kernel virtual memory.
-
- Say N here unless you know what you are doing.
-
-config HIGHMEM_START
- hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL
- default "0xfe000000"
-
-config LOWMEM_SIZE_BOOL
- bool "Set maximum low memory"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the maximum amount of memory which
- will be used as "low memory", that is, memory which the kernel can
- access directly, without having to set up a kernel virtual mapping.
- This can be useful in optimizing the layout of kernel virtual
- memory.
-
- Say N here unless you know what you are doing.
-
-config LOWMEM_SIZE
- hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
- default "0x30000000"
-
-config KERNEL_START_BOOL
- bool "Set custom kernel base address"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the kernel virtual address at which
- the kernel will map low memory (the kernel image will be linked at
- this address). This can be useful in optimizing the virtual memory
- layout of the system.
-
- Say N here unless you know what you are doing.
-
-config KERNEL_START
- hex "Virtual address of kernel base" if KERNEL_START_BOOL
- default "0xc0000000"
-
-config TASK_SIZE_BOOL
- bool "Set custom user task size"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the amount of virtual address space
- allocated to user tasks. This can be useful in optimizing the
- virtual memory layout of the system.
-
- Say N here unless you know what you are doing.
-
-config TASK_SIZE
- hex "Size of user task space" if TASK_SIZE_BOOL
- default "0x80000000"
-
-config CONSISTENT_START_BOOL
- bool "Set custom consistent memory pool address"
- depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
- help
- This option allows you to set the base virtual address
- of the consistent memory pool. This pool of virtual
- memory is used to make consistent memory allocations.
-
-config CONSISTENT_START
- hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
- default "0xff100000" if NOT_COHERENT_CACHE
-
-config CONSISTENT_SIZE_BOOL
- bool "Set custom consistent memory pool size"
- depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
- help
- This option allows you to set the size of the
- consistent memory pool. This pool of virtual memory
- is used to make consistent memory allocations.
-
-config CONSISTENT_SIZE
- hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
- default "0x00200000" if NOT_COHERENT_CACHE
-
-config BOOT_LOAD_BOOL
- bool "Set the boot link/load address"
- depends on ADVANCED_OPTIONS && !PPC_PREP
- help
- This option allows you to set the initial load address of the zImage
- or zImage.initrd file. This can be useful if you are on a board
- which has a small amount of memory.
-
- Say N here unless you know what you are doing.
-
-config BOOT_LOAD
- hex "Link/load address for booting" if BOOT_LOAD_BOOL
- default "0x00400000" if 40x || 8xx || 8260
- default "0x01000000" if 44x
- default "0x00800000"
-
-config PIN_TLB
- bool "Pinned Kernel TLBs (860 ONLY)"
- depends on ADVANCED_OPTIONS && 8xx
-
-config PPC_LIB_RHEAP
- bool
-
-endmenu
-
-source "net/Kconfig"
-
-source "drivers/Kconfig"
-
-source "fs/Kconfig"
-
-source "arch/ppc/8xx_io/Kconfig"
-
-source "arch/ppc/8260_io/Kconfig"
-
-
-menu "IBM 40x options"
- depends on 40x
-
-config SERIAL_SICC
- bool "SICC Serial port"
- depends on STB03xxx
-
-config UART1_DFLT_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-
-config SERIAL_SICC_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-
-endmenu
-
-source "lib/Kconfig"
-
-source "arch/ppc/Kconfig.debug"
-
-source "security/Kconfig"
-
-source "crypto/Kconfig"
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
deleted file mode 100644
index f94b87740973..000000000000
--- a/arch/ppc/Kconfig.debug
+++ /dev/null
@@ -1,66 +0,0 @@
-menu "Kernel hacking"
-
-source "lib/Kconfig.debug"
-
-config KGDB
- bool "Include kgdb kernel debugger"
- depends on DEBUG_KERNEL && (BROKEN || PPC_GEN550 || 4xx)
- select DEBUG_INFO
- help
- Include in-kernel hooks for kgdb, the Linux kernel source level
- debugger. See <http://kgdb.sourceforge.net/> for more information.
- Unless you are intending to debug the kernel, say N here.
-
-choice
- prompt "Serial Port"
- depends on KGDB
- default KGDB_TTYS1
-
-config KGDB_TTYS0
- bool "ttyS0"
-
-config KGDB_TTYS1
- bool "ttyS1"
-
-config KGDB_TTYS2
- bool "ttyS2"
-
-config KGDB_TTYS3
- bool "ttyS3"
-
-endchoice
-
-config KGDB_CONSOLE
- bool "Enable serial console thru kgdb port"
- depends on KGDB && 8xx || CPM2
- help
- If you enable this, all serial console messages will be sent
- over the gdb stub.
- If unsure, say N.
-
-config XMON
- bool "Include xmon kernel debugger"
- depends on DEBUG_KERNEL
- help
- Include in-kernel hooks for the xmon kernel monitor/debugger.
- Unless you are intending to debug the kernel, say N here.
-
-config BDI_SWITCH
- bool "Include BDI-2000 user context switcher"
- depends on DEBUG_KERNEL
- help
- Include in-kernel support for the Abatron BDI2000 debugger.
- Unless you are intending to debug the kernel with one of these
- machines, say N here.
-
-config SERIAL_TEXT_DEBUG
- bool "Support for early boot texts over serial port"
- depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \
- PPC_GEN550 || PPC_MPC52xx
-
-config PPC_OCP
- bool
- depends on IBM_OCP
- default y
-
-endmenu
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
deleted file mode 100644
index 2352d139b262..000000000000
--- a/arch/ppc/Makefile
+++ /dev/null
@@ -1,135 +0,0 @@
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Linus Torvalds
-# Changes for PPC by Gary Thomas
-# Rewritten by Cort Dougan and Paul Mackerras
-#
-
-# This must match PAGE_OFFSET in include/asm-ppc/page.h.
-KERNELLOAD := $(CONFIG_KERNEL_START)
-
-HAS_BIARCH := $(call cc-option-yn, -m32)
-ifeq ($(HAS_BIARCH),y)
-AS := $(AS) -a32
-LD := $(LD) -m elf32ppc
-CC := $(CC) -m32
-endif
-
-LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic
-# The -Iarch/$(ARCH)/include is temporary while we are merging
-KBUILD_CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include
-KBUILD_AFLAGS += -Iarch/$(ARCH)
-KBUILD_CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \
- -ffixed-r2 -mmultiple
-
-# No AltiVec instruction when building kernel
-KBUILD_CFLAGS += $(call cc-option, -mno-altivec)
-
-CPP = $(CC) -E $(KBUILD_CFLAGS)
-# Temporary hack until we have migrated to asm-powerpc
-LINUXINCLUDE += -Iarch/$(ARCH)/include
-
-CHECKFLAGS += -D__powerpc__
-
-cpu-as-$(CONFIG_4xx) += -Wa,-m405
-cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
-
-KBUILD_AFLAGS += $(cpu-as-y)
-KBUILD_CFLAGS += $(cpu-as-y)
-
-# Default to the common case.
-KBUILD_DEFCONFIG := ebony_defconfig
-
-head-y := arch/ppc/kernel/head.o
-head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
-head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
-head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
-
-head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
-
-core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
- arch/ppc/platforms/ \
- arch/ppc/mm/ arch/ppc/lib/ \
- arch/ppc/syslib/ arch/powerpc/sysdev/ \
- arch/powerpc/lib/
-core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
-core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/
-core-$(CONFIG_XMON) += arch/ppc/xmon/
-drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
-drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/
-drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
-
-drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
-
-BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
-
-PHONY += $(BOOT_TARGETS)
-
-all: uImage zImage
-
-CPPFLAGS_vmlinux.lds := -Upowerpc
-
-# All the instructions talk about "make bzImage".
-bzImage: zImage
-
-boot := arch/$(ARCH)/boot
-
-$(BOOT_TARGETS): vmlinux
- $(Q)$(MAKE) $(build)=$(boot) $@
-
-uImage: vmlinux
- $(Q)$(MAKE) $(build)=$(boot)/images $(boot)/images/$@
-
-define archhelp
- @echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)'
- @echo ' uImage - Create a bootable image for U-Boot / PPCBoot'
- @echo ' install - Install kernel using'
- @echo ' (your) ~/bin/installkernel or'
- @echo ' (distribution) /sbin/installkernel or'
- @echo ' install to $$(INSTALL_PATH) and run lilo'
- @echo ' *_defconfig - Select default config from arch/$(ARCH)/ppc/configs'
-endef
-
-archclean:
- $(Q)$(MAKE) $(clean)=arch/ppc/boot
- # Temporary hack until we have migrated to asm-powerpc
- $(Q)rm -rf arch/$(ARCH)/include
-
-archprepare: checkbin
-
-# Temporary hack until we have migrated to asm-powerpc
-include/asm: arch/$(ARCH)/include/asm
-arch/$(ARCH)/include/asm:
- $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi
- $(Q)ln -fsn $(srctree)/include/asm-powerpc arch/$(ARCH)/include/asm
-
-# Use the file '.tmp_gas_check' for binutils tests, as gas won't output
-# to stdout and these checks are run even on install targets.
-TOUT := .tmp_gas_check
-# Ensure this is binutils 2.12.1 (or 2.12.90.0.7) or later for altivec
-# instructions.
-# gcc-3.4 and binutils-2.14 are a fatal combination.
-
-checkbin:
- @if test "$(call cc-version)" = "0304" ; then \
- if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) >/dev/null 2>&1 ; then \
- echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build '; \
- echo 'correctly with gcc-3.4 and your version of binutils.'; \
- echo '*** Please upgrade your binutils or downgrade your gcc'; \
- false; \
- fi ; \
- fi
- @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \
- echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \
- echo 'correctly with old versions of binutils.' ; \
- echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
- false ; \
- fi
-
-CLEAN_FILES += $(TOUT)
-
diff --git a/arch/ppc/boot/Makefile b/arch/ppc/boot/Makefile
deleted file mode 100644
index 500497e3c72d..000000000000
--- a/arch/ppc/boot/Makefile
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# arch/ppc/boot/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Linus Torvalds
-# Adapted for PowerPC by Gary Thomas
-# modified by Cort (cort@cs.nmt.edu)
-#
-
-# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)
-KBUILD_CFLAGS += -fno-builtin -D__BOOTER__ -Iarch/$(ARCH)/boot/include
-HOSTCFLAGS += -Iarch/$(ARCH)/boot/include
-
-BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd
-
-bootdir-y := simple
-subdir-y := lib common images
-subdir-$(CONFIG_PPC_PREP) += of1275
-
-# for cleaning
-subdir- += simple
-
-hostprogs-y := $(addprefix utils/, mkprep mkbugboot mktree)
-
-PHONY += $(BOOT_TARGETS) $(bootdir-y)
-
-$(BOOT_TARGETS): $(bootdir-y)
-
-$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
- $(addprefix $(obj)/,$(hostprogs-y))
- $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
diff --git a/arch/ppc/boot/common/Makefile b/arch/ppc/boot/common/Makefile
deleted file mode 100644
index a2e85e3beb88..000000000000
--- a/arch/ppc/boot/common/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Tom Rini January 2001
-#
-
-lib-y := string.o util.o misc-common.o \
- serial_stub.o bootinfo.o
-lib-$(CONFIG_SERIAL_8250_CONSOLE) += ns16550.o
diff --git a/arch/ppc/boot/common/bootinfo.c b/arch/ppc/boot/common/bootinfo.c
deleted file mode 100644
index f4dc9b9fab9c..000000000000
--- a/arch/ppc/boot/common/bootinfo.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * General bootinfo record utilities
- * Author: Randy Vinson <rvinson@mvista.com>
- *
- * 2002 (c) MontaVista Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/bootinfo.h>
-
-#include "nonstdio.h"
-
-static struct bi_record * birec = NULL;
-
-static struct bi_record *
-__bootinfo_build(struct bi_record *rec, unsigned long tag, unsigned long size,
- void *data)
-{
- /* set the tag */
- rec->tag = tag;
-
- /* if the caller has any data, copy it */
- if (size)
- memcpy(rec->data, (char *)data, size);
-
- /* set the record size */
- rec->size = sizeof(struct bi_record) + size;
-
- /* advance to the next available space */
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
-
- return rec;
-}
-
-void
-bootinfo_init(struct bi_record *rec)
-{
-
- /* save start of birec area */
- birec = rec;
-
- /* create an empty list */
- rec = __bootinfo_build(rec, BI_FIRST, 0, NULL);
- (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
-
-}
-
-void
-bootinfo_append(unsigned long tag, unsigned long size, void * data)
-{
-
- struct bi_record *rec = birec;
-
- /* paranoia */
- if ((rec == NULL) || (rec->tag != BI_FIRST))
- return;
-
- /* find the last entry in the list */
- while (rec->tag != BI_LAST)
- rec = (struct bi_record *)((ulong)rec + rec->size);
-
- /* overlay BI_LAST record with new one and tag on a new BI_LAST */
- rec = __bootinfo_build(rec, tag, size, data);
- (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
-}
diff --git a/arch/ppc/boot/common/crt0.S b/arch/ppc/boot/common/crt0.S
deleted file mode 100644
index 8f0ef04b8de5..000000000000
--- a/arch/ppc/boot/common/crt0.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/* Copyright (c) 1997 Paul Mackerras <paulus@cs.anu.edu.au>
- * Initial Power Macintosh COFF version.
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * Modifications for IBM PowerPC 400-class processor evaluation
- * boards.
- *
- * Module name: crt0.S
- *
- * Description:
- * Boot loader execution entry point. Clears out .bss section as per
- * ANSI C requirements. Invalidates and flushes the caches over the
- * range covered by the boot loader's .text section. Sets up a stack
- * below the .text section entry point.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/ppc_asm.h>
-
- .text
-
- .globl _start
-_start:
-#ifdef XCOFF
- .long __start,0,0
-
- .globl __start
-__start:
-#endif
-
- ## Flush and invalidate the caches for the range in memory covering
- ## the .text section of the boot loader
-
- lis r9,_start@h # r9 = &_start
- lis r8,_etext@ha #
- addi r8,r8,_etext@l # r8 = &_etext
-3: dcbf r0,r9 # Flush the data cache
- icbi r0,r9 # Invalidate the instruction cache
- addi r9,r9,0x10 # Increment by one cache line
- cmplw cr0,r9,r8 # Are we at the end yet?
- blt 3b # No, keep flushing and invalidating
- sync # sync ; isync after flushing the icache
- isync
-
- ## Clear out the BSS as per ANSI C requirements
-
- lis r7,_end@ha
- addi r7,r7,_end@l # r7 = &_end
- lis r8,__bss_start@ha #
- addi r8,r8,__bss_start@l # r8 = &_bss_start
-
- ## Determine how large an area, in number of words, to clear
-
- subf r7,r8,r7 # r7 = &_end - &_bss_start + 1
- addi r7,r7,3 # r7 += 3
- srwi. r7,r7,2 # r7 = size in words.
- beq 2f # If the size is zero, do not bother
- addi r8,r8,-4 # r8 -= 4
- mtctr r7 # SPRN_CTR = number of words to clear
- li r0,0 # r0 = 0
-1: stwu r0,4(r8) # Clear out a word
- bdnz 1b # If we are not done yet, keep clearing
-2:
-
-#ifdef CONFIG_40x
- ## Set up the stack
-
- lis r9,_start@h # r9 = &_start (text section entry)
- ori r9,r9,_start@l
- subi r1,r9,64 # Start the stack 64 bytes below _start
- clrrwi r1,r1,4 # Make sure it is aligned on 16 bytes.
- li r0,0
- stwu r0,-16(r1)
- mtlr r9
-#endif
-
- b start # All done, start the real work.
diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c
deleted file mode 100644
index 9589969cec72..000000000000
--- a/arch/ppc/boot/common/misc-common.c
+++ /dev/null
@@ -1,555 +0,0 @@
-/*
- * Misc. bootloader code (almost) all platforms can use
- *
- * Author: Johnnie Peters <jpeters@mvista.com>
- * Editor: Tom Rini <trini@mvista.com>
- *
- * Derived from arch/ppc/boot/prep/misc.c
- *
- * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <stdarg.h> /* for va_ bits */
-#include <linux/string.h>
-#include <linux/zlib.h>
-#include "nonstdio.h"
-
-/* If we're on a PReP, assume we have a keyboard controller
- * Also note, if we're not PReP, we assume you are a serial
- * console - Tom */
-#if defined(CONFIG_PPC_PREP) && defined(CONFIG_VGA_CONSOLE)
-extern void cursor(int x, int y);
-extern void scroll(void);
-extern char *vidmem;
-extern int lines, cols;
-extern int orig_x, orig_y;
-extern int keyb_present;
-extern int CRT_tstc(void);
-extern int CRT_getc(void);
-#else
-int cursor(int x, int y) {return 0;}
-void scroll(void) {}
-char vidmem[1];
-#define lines 0
-#define cols 0
-int orig_x = 0;
-int orig_y = 0;
-#define keyb_present 0
-int CRT_tstc(void) {return 0;}
-int CRT_getc(void) {return 0;}
-#endif
-
-extern char *avail_ram;
-extern char *end_avail;
-extern char _end[];
-
-void puts(const char *);
-void putc(const char c);
-void puthex(unsigned long val);
-void gunzip(void *, int, unsigned char *, int *);
-static int _cvt(unsigned long val, char *buf, long radix, char *digits);
-
-void _vprintk(void(*putc)(const char), const char *fmt0, va_list ap);
-unsigned char *ISA_io = NULL;
-
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
-extern unsigned long com_port;
-
-extern int serial_tstc(unsigned long com_port);
-extern unsigned char serial_getc(unsigned long com_port);
-extern void serial_putc(unsigned long com_port, unsigned char c);
-#endif
-
-void pause(void)
-{
- puts("pause\n");
-}
-
-void exit(void)
-{
- puts("exit\n");
- while(1);
-}
-
-int tstc(void)
-{
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- if(keyb_present)
- return (CRT_tstc() || serial_tstc(com_port));
- else
- return (serial_tstc(com_port));
-#else
- return CRT_tstc();
-#endif
-}
-
-int getc(void)
-{
- while (1) {
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- if (serial_tstc(com_port))
- return (serial_getc(com_port));
-#endif /* serial console */
- if (keyb_present)
- if(CRT_tstc())
- return (CRT_getc());
- }
-}
-
-void
-putc(const char c)
-{
- int x,y;
-
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- serial_putc(com_port, c);
- if ( c == '\n' )
- serial_putc(com_port, '\r');
-#endif /* serial console */
-
- x = orig_x;
- y = orig_y;
-
- if ( c == '\n' ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- } else if (c == '\r') {
- x = 0;
- } else if (c == '\b') {
- if (x > 0) {
- x--;
- }
- } else {
- vidmem [ ( x + cols * y ) * 2 ] = c;
- if ( ++x >= cols ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- }
- }
-
- cursor(x, y);
-
- orig_x = x;
- orig_y = y;
-}
-
-void puts(const char *s)
-{
- int x,y;
- char c;
-
- x = orig_x;
- y = orig_y;
-
- while ( ( c = *s++ ) != '\0' ) {
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- serial_putc(com_port, c);
- if ( c == '\n' ) serial_putc(com_port, '\r');
-#endif /* serial console */
-
- if ( c == '\n' ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- } else if (c == '\b') {
- if (x > 0) {
- x--;
- }
- } else {
- vidmem [ ( x + cols * y ) * 2 ] = c;
- if ( ++x >= cols ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- }
- }
- }
-
- cursor(x, y);
-
- orig_x = x;
- orig_y = y;
-}
-
-void error(char *x)
-{
- puts("\n\n");
- puts(x);
- puts("\n\n -- System halted");
-
- while(1); /* Halt */
-}
-
-static void *zalloc(unsigned size)
-{
- void *p = avail_ram;
-
- size = (size + 7) & -8;
- avail_ram += size;
- if (avail_ram > end_avail) {
- puts("oops... out of memory\n");
- pause();
- }
- return p;
-}
-
-#define HEAD_CRC 2
-#define EXTRA_FIELD 4
-#define ORIG_NAME 8
-#define COMMENT 0x10
-#define RESERVED 0xe0
-
-void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
-{
- z_stream s;
- int r, i, flags;
-
- /* skip header */
- i = 10;
- flags = src[3];
- if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
- puts("bad gzipped data\n");
- exit();
- }
- if ((flags & EXTRA_FIELD) != 0)
- i = 12 + src[10] + (src[11] << 8);
- if ((flags & ORIG_NAME) != 0)
- while (src[i++] != 0)
- ;
- if ((flags & COMMENT) != 0)
- while (src[i++] != 0)
- ;
- if ((flags & HEAD_CRC) != 0)
- i += 2;
- if (i >= *lenp) {
- puts("gunzip: ran out of data in header\n");
- exit();
- }
-
- /* Initialize ourself. */
- s.workspace = zalloc(zlib_inflate_workspacesize());
- r = zlib_inflateInit2(&s, -MAX_WBITS);
- if (r != Z_OK) {
- puts("zlib_inflateInit2 returned "); puthex(r); puts("\n");
- exit();
- }
- s.next_in = src + i;
- s.avail_in = *lenp - i;
- s.next_out = dst;
- s.avail_out = dstlen;
- r = zlib_inflate(&s, Z_FINISH);
- if (r != Z_OK && r != Z_STREAM_END) {
- puts("inflate returned "); puthex(r); puts("\n");
- exit();
- }
- *lenp = s.next_out - (unsigned char *) dst;
- zlib_inflateEnd(&s);
-}
-
-void
-puthex(unsigned long val)
-{
-
- unsigned char buf[10];
- int i;
- for (i = 7; i >= 0; i--)
- {
- buf[i] = "0123456789ABCDEF"[val & 0x0F];
- val >>= 4;
- }
- buf[8] = '\0';
- puts(buf);
-}
-
-#define FALSE 0
-#define TRUE 1
-
-void
-_printk(char const *fmt, ...)
-{
- va_list ap;
-
- va_start(ap, fmt);
- _vprintk(putc, fmt, ap);
- va_end(ap);
- return;
-}
-
-#define is_digit(c) ((c >= '0') && (c <= '9'))
-
-void
-_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
-{
- char c, sign, *cp = 0;
- int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
- char buf[32];
- long val;
- while ((c = *fmt0++))
- {
- if (c == '%')
- {
- c = *fmt0++;
- left_prec = right_prec = pad_on_right = 0;
- if (c == '-')
- {
- c = *fmt0++;
- pad_on_right++;
- }
- if (c == '0')
- {
- zero_fill = TRUE;
- c = *fmt0++;
- } else
- {
- zero_fill = FALSE;
- }
- while (is_digit(c))
- {
- left_prec = (left_prec * 10) + (c - '0');
- c = *fmt0++;
- }
- if (c == '.')
- {
- c = *fmt0++;
- zero_fill++;
- while (is_digit(c))
- {
- right_prec = (right_prec * 10) + (c - '0');
- c = *fmt0++;
- }
- } else
- {
- right_prec = left_prec;
- }
- sign = '\0';
- switch (c)
- {
- case 'd':
- case 'x':
- case 'X':
- val = va_arg(ap, long);
- switch (c)
- {
- case 'd':
- if (val < 0)
- {
- sign = '-';
- val = -val;
- }
- length = _cvt(val, buf, 10, "0123456789");
- break;
- case 'x':
- length = _cvt(val, buf, 16, "0123456789abcdef");
- break;
- case 'X':
- length = _cvt(val, buf, 16, "0123456789ABCDEF");
- break;
- }
- cp = buf;
- break;
- case 's':
- cp = va_arg(ap, char *);
- length = strlen(cp);
- break;
- case 'c':
- c = va_arg(ap, long /*char*/);
- (*putc)(c);
- continue;
- default:
- (*putc)('?');
- }
- pad = left_prec - length;
- if (sign != '\0')
- {
- pad--;
- }
- if (zero_fill)
- {
- c = '0';
- if (sign != '\0')
- {
- (*putc)(sign);
- sign = '\0';
- }
- } else
- {
- c = ' ';
- }
- if (!pad_on_right)
- {
- while (pad-- > 0)
- {
- (*putc)(c);
- }
- }
- if (sign != '\0')
- {
- (*putc)(sign);
- }
- while (length-- > 0)
- {
- (*putc)(c = *cp++);
- if (c == '\n')
- {
- (*putc)('\r');
- }
- }
- if (pad_on_right)
- {
- while (pad-- > 0)
- {
- (*putc)(c);
- }
- }
- } else
- {
- (*putc)(c);
- if (c == '\n')
- {
- (*putc)('\r');
- }
- }
- }
-}
-
-int
-_cvt(unsigned long val, char *buf, long radix, char *digits)
-{
- char temp[80];
- char *cp = temp;
- int length = 0;
- if (val == 0)
- { /* Special case */
- *cp++ = '0';
- } else
- while (val)
- {
- *cp++ = digits[val % radix];
- val /= radix;
- }
- while (cp != temp)
- {
- *buf++ = *--cp;
- length++;
- }
- *buf = '\0';
- return (length);
-}
-
-void
-_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
-{
- int i, c;
- if ((unsigned int)s > (unsigned int)p)
- {
- s = (unsigned int)s - (unsigned int)p;
- }
- while (s > 0)
- {
- if (base)
- {
- _printk("%06X: ", (int)p - (int)base);
- } else
- {
- _printk("%06X: ", p);
- }
- for (i = 0; i < 16; i++)
- {
- if (i < s)
- {
- _printk("%02X", p[i] & 0xFF);
- } else
- {
- _printk(" ");
- }
- if ((i % 2) == 1) _printk(" ");
- if ((i % 8) == 7) _printk(" ");
- }
- _printk(" |");
- for (i = 0; i < 16; i++)
- {
- if (i < s)
- {
- c = p[i] & 0xFF;
- if ((c < 0x20) || (c >= 0x7F)) c = '.';
- } else
- {
- c = ' ';
- }
- _printk("%c", c);
- }
- _printk("|\n");
- s -= 16;
- p += 16;
- }
-}
-
-void
-_dump_buf(unsigned char *p, int s)
-{
- _printk("\n");
- _dump_buf_with_offset(p, s, 0);
-}
-
-/* Very simple inb/outb routines. We declare ISA_io to be 0 above, and
- * then modify it on platforms which need to. We do it like this
- * because on some platforms we give inb/outb an exact location, and
- * on others it's an offset from a given location. -- Tom
- */
-
-void ISA_init(unsigned long base)
-{
- ISA_io = (unsigned char *)base;
-}
-
-void
-outb(int port, unsigned char val)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- ISA_io[port] = val;
-}
-
-unsigned char
-inb(int port)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- return (ISA_io[port]);
-}
-
-/*
- * Local variables:
- * c-indent-level: 8
- * c-basic-offset: 8
- * tab-width: 8
- * End:
- */
diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c
deleted file mode 100644
index fc5b72041948..000000000000
--- a/arch/ppc/boot/common/ns16550.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * COM1 NS16550 support
- */
-
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-
-#if defined(CONFIG_XILINX_VIRTEX)
-#include <platforms/4xx/xparameters/xparameters.h>
-#endif
-#include "nonstdio.h"
-#include "serial.h"
-
-#define SERIAL_BAUD 9600
-
-extern unsigned long ISA_io;
-
-static struct serial_state rs_table[RS_TABLE_SIZE] = {
- SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
-};
-
-static int shift;
-
-unsigned long serial_init(int chan, void *ignored)
-{
- unsigned long com_port, base_baud;
- unsigned char lcr, dlm;
-
- /* We need to find out which type io we're expecting. If it's
- * 'SERIAL_IO_PORT', we get an offset from the isa_io_base.
- * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */
- switch (rs_table[chan].io_type) {
- case SERIAL_IO_PORT:
- com_port = rs_table[chan].port;
- break;
- case SERIAL_IO_MEM:
- com_port = (unsigned long)rs_table[chan].iomem_base;
- break;
- default:
- /* We can't deal with it. */
- return -1;
- }
-
- /* How far apart the registers are. */
- shift = rs_table[chan].iomem_reg_shift;
- /* Base baud.. */
- base_baud = rs_table[chan].baud_base;
-
- /* save the LCR */
- lcr = inb(com_port + (UART_LCR << shift));
- /* Access baud rate */
- outb(com_port + (UART_LCR << shift), 0x80);
- dlm = inb(com_port + (UART_DLM << shift));
- /*
- * Test if serial port is unconfigured.
- * We assume that no-one uses less than 110 baud or
- * less than 7 bits per character these days.
- * -- paulus.
- */
-
- if ((dlm <= 4) && (lcr & 2))
- /* port is configured, put the old LCR back */
- outb(com_port + (UART_LCR << shift), lcr);
- else {
- /* Input clock. */
- outb(com_port + (UART_DLL << shift),
- (base_baud / SERIAL_BAUD) & 0xFF);
- outb(com_port + (UART_DLM << shift),
- (base_baud / SERIAL_BAUD) >> 8);
- /* 8 data, 1 stop, no parity */
- outb(com_port + (UART_LCR << shift), 0x03);
- /* RTS/DTR */
- outb(com_port + (UART_MCR << shift), 0x03);
- }
- /* Clear & enable FIFOs */
- outb(com_port + (UART_FCR << shift), 0x07);
-
- return (com_port);
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- outb(com_port, c);
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0)
- ;
- return inb(com_port);
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- return ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0);
-}
diff --git a/arch/ppc/boot/common/serial_stub.c b/arch/ppc/boot/common/serial_stub.c
deleted file mode 100644
index 5cc9ae66a8ba..000000000000
--- a/arch/ppc/boot/common/serial_stub.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This is a few stub routines to make the boot code cleaner looking when
- * there is no serial port support doesn't need to be closed, for example.
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * 2003 (c) MontaVista, Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed "as
- * is" without any warranty of any kind, whether express or implied.
- */
-
-unsigned long __attribute__ ((weak))
-serial_init(int chan, void *ignored)
-{
- return 0;
-}
-
-void __attribute__ ((weak))
-serial_close(unsigned long com_port)
-{
-}
diff --git a/arch/ppc/boot/common/string.S b/arch/ppc/boot/common/string.S
deleted file mode 100644
index 8016e43c4771..000000000000
--- a/arch/ppc/boot/common/string.S
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * String handling functions for PowerPC.
- *
- * Copyright (C) 1996 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#define r0 0
-#define r3 3
-#define r4 4
-#define r5 5
-#define r6 6
-#define r7 7
-#define r8 8
-
- .globl strlen
-strlen:
- addi r4,r3,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- bne 1b
- subf r3,r3,r4
- blr
-
- .globl memset
-memset:
- rlwimi r4,r4,8,16,23
- rlwimi r4,r4,16,0,15
- addi r6,r3,-4
- cmplwi 0,r5,4
- blt 7f
- stwu r4,4(r6)
- beqlr
- andi. r0,r6,3
- add r5,r0,r5
- subf r6,r0,r6
- rlwinm r0,r5,32-2,2,31
- mtctr r0
- bdz 6f
-1: stwu r4,4(r6)
- bdnz 1b
-6: andi. r5,r5,3
-7: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r6,r6,3
-8: stbu r4,1(r6)
- bdnz 8b
- blr
-
- .globl memmove
-memmove:
- cmplw 0,r3,r4
- bgt backwards_memcpy
- /* fall through */
-
- .globl memcpy
-memcpy:
- rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
- addi r6,r3,-4
- addi r4,r4,-4
- beq 2f /* if less than 8 bytes to do */
- andi. r0,r6,3 /* get dest word aligned */
- mtctr r7
- bne 5f
-1: lwz r7,4(r4)
- lwzu r8,8(r4)
- stw r7,4(r6)
- stwu r8,8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,4(r4)
- addi r5,r5,-4
- stwu r0,4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r4,r4,3
- addi r6,r6,3
-4: lbzu r0,1(r4)
- stbu r0,1(r6)
- bdnz 4b
- blr
-5: subfic r0,r0,4
- mtctr r0
-6: lbz r7,4(r4)
- addi r4,r4,1
- stb r7,4(r6)
- addi r6,r6,1
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
- .globl backwards_memcpy
-backwards_memcpy:
- rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
- add r6,r3,r5
- add r4,r4,r5
- beq 2f
- andi. r0,r6,3
- mtctr r7
- bne 5f
-1: lwz r7,-4(r4)
- lwzu r8,-8(r4)
- stw r7,-4(r6)
- stwu r8,-8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,-4(r4)
- subi r5,r5,4
- stwu r0,-4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
-4: lbzu r0,-1(r4)
- stbu r0,-1(r6)
- bdnz 4b
- blr
-5: mtctr r0
-6: lbzu r7,-1(r4)
- stbu r7,-1(r6)
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
- .globl memcmp
-memcmp:
- cmpwi 0,r5,0
- blelr
- mtctr r5
- addi r6,r3,-1
- addi r4,r4,-1
-1: lbzu r3,1(r6)
- lbzu r0,1(r4)
- subf. r3,r0,r3
- bdnzt 2,1b
- blr
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
deleted file mode 100644
index 0c5e43c4ae06..000000000000
--- a/arch/ppc/boot/common/util.S
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * Useful bootup functions, which are more easily done in asm than C.
- *
- * NOTE: Be very very careful about the registers you use here.
- * We don't follow any ABI calling convention among the
- * assembler functions that call each other, especially early
- * in the initialization. Please preserve at least r3 and r4
- * for these early functions, as they often contain information
- * passed from boot roms into the C decompress function.
- *
- * Author: Tom Rini
- * trini@mvista.com
- * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/ppc_asm.h>
-
-
- .text
-
-#ifdef CONFIG_6xx
- .globl disable_6xx_mmu
-disable_6xx_mmu:
- /* Establish default MSR value, exception prefix 0xFFF.
- * If necessary, this function must fix up the LR if we
- * return to a different address space once the MMU is
- * disabled.
- */
- li r8,MSR_IP|MSR_FP
- mtmsr r8
- isync
-
- /* Test for a 601 */
- mfpvr r10
- srwi r10,r10,16
- cmpwi 0,r10,1 /* 601 ? */
- beq .clearbats_601
-
- /* Clear BATs */
- li r8,0
- mtspr SPRN_DBAT0U,r8
- mtspr SPRN_DBAT0L,r8
- mtspr SPRN_DBAT1U,r8
- mtspr SPRN_DBAT1L,r8
- mtspr SPRN_DBAT2U,r8
- mtspr SPRN_DBAT2L,r8
- mtspr SPRN_DBAT3U,r8
- mtspr SPRN_DBAT3L,r8
-.clearbats_601:
- mtspr SPRN_IBAT0U,r8
- mtspr SPRN_IBAT0L,r8
- mtspr SPRN_IBAT1U,r8
- mtspr SPRN_IBAT1L,r8
- mtspr SPRN_IBAT2U,r8
- mtspr SPRN_IBAT2L,r8
- mtspr SPRN_IBAT3U,r8
- mtspr SPRN_IBAT3L,r8
- isync
- sync
- sync
-
- /* Set segment registers */
- li r8,16 /* load up segment register values */
- mtctr r8 /* for context 0 */
- lis r8,0x2000 /* Ku = 1, VSID = 0 */
- li r10,0
-3: mtsrin r8,r10
- addi r8,r8,0x111 /* increment VSID */
- addis r10,r10,0x1000 /* address of next segment */
- bdnz 3b
- blr
-
- .globl disable_6xx_l1cache
-disable_6xx_l1cache:
- /* Enable, invalidate and then disable the L1 icache/dcache. */
- li r8,0
- ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
- mfspr r11,SPRN_HID0
- or r11,r11,r8
- andc r10,r11,r8
- isync
- mtspr SPRN_HID0,r8
- sync
- isync
- mtspr SPRN_HID0,r10
- sync
- isync
- blr
-#endif
-
- .globl _setup_L2CR
-_setup_L2CR:
-/*
- * We should be skipping this section on CPUs where this results in an
- * illegal instruction. If not, please send trini@kernel.crashing.org
- * the PVR of your CPU.
- */
- /* Invalidate/disable L2 cache */
- sync
- isync
- mfspr r8,SPRN_L2CR
- rlwinm r8,r8,0,1,31
- oris r8,r8,L2CR_L2I@h
- sync
- isync
- mtspr SPRN_L2CR,r8
- sync
- isync
-
- /* Wait for the invalidation to complete */
- mfspr r8,SPRN_PVR
- srwi r8,r8,16
- cmplwi cr0,r8,0x8000 /* 7450 */
- cmplwi cr1,r8,0x8001 /* 7455 */
- cmplwi cr2,r8,0x8002 /* 7457 */
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq /* Now test if any are true. */
- cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
- bne 2f
-
-1: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */
- rlwinm. r9,r8,0,10,10
- bne 1b
- b 3f
-
-2: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */
- rlwinm. r9,r8,0,31,31
- bne 2b
-
-3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */
- sync
- isync
- mtspr SPRN_L2CR,r8
- sync
- isync
- blr
-
- .globl _setup_L3CR
-_setup_L3CR:
- /* Invalidate/disable L3 cache */
- sync
- isync
- mfspr r8,SPRN_L3CR
- rlwinm r8,r8,0,1,31
- ori r8,r8,L3CR_L3I@l
- sync
- isync
- mtspr SPRN_L3CR,r8
- sync
- isync
-
- /* Wait for the invalidation to complete */
-1: mfspr r8,SPRN_L3CR
- rlwinm. r9,r8,0,21,21
- bne 1b
-
- rlwinm r8,r8,0,22,20 /* Turn off L3I bit */
- sync
- isync
- mtspr SPRN_L3CR,r8
- sync
- isync
- blr
-
-
-/* udelay (on non-601 processors) needs to know the period of the
- * timebase in nanoseconds. This used to be hardcoded to be 60ns
- * (period of 66MHz/4). Now a variable is used that is initialized to
- * 60 for backward compatibility, but it can be overridden as necessary
- * with code something like this:
- * extern unsigned long timebase_period_ns;
- * timebase_period_ns = 1000000000 / bd->bi_tbfreq;
- */
- .data
- .globl timebase_period_ns
-timebase_period_ns:
- .long 60
-
- .text
-/*
- * Delay for a number of microseconds
- */
- .globl udelay
-udelay:
- mfspr r4,SPRN_PVR
- srwi r4,r4,16
- cmpwi 0,r4,1 /* 601 ? */
- bne .udelay_not_601
-00: li r0,86 /* Instructions / microsecond? */
- mtctr r0
-10: addi r0,r0,0 /* NOP */
- bdnz 10b
- subic. r3,r3,1
- bne 00b
- blr
-
-.udelay_not_601:
- mulli r4,r3,1000 /* nanoseconds */
- /* Change r4 to be the number of ticks using:
- * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
- * timebase_period_ns defaults to 60 (16.6MHz) */
- lis r5,timebase_period_ns@ha
- lwz r5,timebase_period_ns@l(r5)
- add r4,r4,r5
- addi r4,r4,-1
- divw r4,r4,r5 /* BUS ticks */
-1: mftbu r5
- mftb r6
- mftbu r7
- cmpw 0,r5,r7
- bne 1b /* Get [synced] base time */
- addc r9,r6,r4 /* Compute end time */
- addze r8,r5
-2: mftbu r5
- cmpw 0,r5,r8
- blt 2b
- bgt 3f
- mftb r6
- cmpw 0,r6,r9
- blt 2b
-3: blr
-
- .section ".relocate_code","xa"
-/*
- * Flush and enable instruction cache
- * First, flush the data cache in case it was enabled and may be
- * holding instructions for copy back.
- */
- .globl flush_instruction_cache
-flush_instruction_cache:
- mflr r6
- bl flush_data_cache
-
-#ifdef CONFIG_8xx
- lis r3, IDC_INVALL@h
- mtspr SPRN_IC_CST, r3
- lis r3, IDC_ENABLE@h
- mtspr SPRN_IC_CST, r3
- lis r3, IDC_DISABLE@h
- mtspr SPRN_DC_CST, r3
-#elif CONFIG_4xx
- lis r3,start@h # r9 = &_start
- lis r4,_etext@ha
- addi r4,r4,_etext@l # r8 = &_etext
-1: dcbf r0,r3 # Flush the data cache
- icbi r0,r3 # Invalidate the instruction cache
- addi r3,r3,0x10 # Increment by one cache line
- cmplw cr0,r3,r4 # Are we at the end yet?
- blt 1b # No, keep flushing and invalidating
-#else
- /* Enable, invalidate and then disable the L1 icache/dcache. */
- li r3,0
- ori r3,r3,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
- mfspr r4,SPRN_HID0
- or r5,r4,r3
- isync
- mtspr SPRN_HID0,r5
- sync
- isync
- ori r5,r4,HID0_ICE /* Enable cache */
- mtspr SPRN_HID0,r5
- sync
- isync
-#endif
- mtlr r6
- blr
-
-#define NUM_CACHE_LINES 128*8
-#define cache_flush_buffer 0x1000
-
-/*
- * Flush data cache
- * Do this by just reading lots of stuff into the cache.
- */
- .globl flush_data_cache
-flush_data_cache:
- lis r3,cache_flush_buffer@h
- ori r3,r3,cache_flush_buffer@l
- li r4,NUM_CACHE_LINES
- mtctr r4
-00: lwz r4,0(r3)
- addi r3,r3,L1_CACHE_BYTES /* Next line, please */
- bdnz 00b
-10: blr
-
- .previous
-
diff --git a/arch/ppc/boot/images/.gitignore b/arch/ppc/boot/images/.gitignore
deleted file mode 100644
index 21c2dc5b6b78..000000000000
--- a/arch/ppc/boot/images/.gitignore
+++ /dev/null
@@ -1,6 +0,0 @@
-sImage
-vmapus
-vmlinux*
-miboot*
-zImage*
-uImage
diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile
deleted file mode 100644
index 58415d5718e3..000000000000
--- a/arch/ppc/boot/images/Makefile
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# This dir holds all of the images for PPC machines.
-# Tom Rini January 2001
-
-MKIMAGE := $(srctree)/scripts/mkuboot.sh
-
-extra-y := vmlinux.bin vmlinux.gz
-
-# two make processes may write to vmlinux.gz at the same time with make -j
-quiet_cmd_mygzip = GZIP $@
-cmd_mygzip = gzip -f -9 < $< > $@.$$$$ && mv $@.$$$$ $@
-
-
-OBJCOPYFLAGS_vmlinux.bin := -O binary
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
- $(call if_changed,mygzip)
-
-quiet_cmd_uimage = UIMAGE $@
- cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \
- -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
- -d $< $@
-
-targets += uImage
-$(obj)/uImage: $(obj)/vmlinux.gz
- $(Q)rm -f $@
- $(call cmd,uimage)
- @echo -n ' Image: $@ '
- @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
-
-# Files generated that shall be removed upon make clean
-clean-files := sImage vmapus vmlinux* miboot* zImage* uImage
diff --git a/arch/ppc/boot/include/cpc700.h b/arch/ppc/boot/include/cpc700.h
deleted file mode 100644
index 28cfcde44909..000000000000
--- a/arch/ppc/boot/include/cpc700.h
+++ /dev/null
@@ -1,26 +0,0 @@
-
-#ifndef __PPC_BOOT_CPC700_H
-#define __PPC_BOOT_CPC700_H
-
-#define CPC700_MEM_CFGADDR 0xff500008
-#define CPC700_MEM_CFGDATA 0xff50000c
-
-#define CPC700_MB0SA 0x38
-#define CPC700_MB0EA 0x58
-#define CPC700_MB1SA 0x3c
-#define CPC700_MB1EA 0x5c
-#define CPC700_MB2SA 0x40
-#define CPC700_MB2EA 0x60
-#define CPC700_MB3SA 0x44
-#define CPC700_MB3EA 0x64
-#define CPC700_MB4SA 0x48
-#define CPC700_MB4EA 0x68
-
-static inline long
-cpc700_read_memreg(int reg)
-{
- out_be32((volatile unsigned int *) CPC700_MEM_CFGADDR, reg);
- return in_be32((volatile unsigned int *) CPC700_MEM_CFGDATA);
-}
-
-#endif
diff --git a/arch/ppc/boot/include/iso_font.h b/arch/ppc/boot/include/iso_font.h
deleted file mode 100644
index bff050e002b7..000000000000
--- a/arch/ppc/boot/include/iso_font.h
+++ /dev/null
@@ -1,257 +0,0 @@
-static const unsigned char font[] = {
-/* 0x00 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x01 */ 0x00,0x00,0x7E,0x81,0xA5,0x81,0x81,0xBD,0x99,0x81,0x81,0x7E,0x00,0x00,0x00,0x00,
-/* 0x02 */ 0x00,0x00,0x7E,0xFF,0xDB,0xFF,0xFF,0xC3,0xC3,0xE7,0xFF,0x7E,0x00,0x00,0x00,0x00,
-/* 0x03 */ 0x00,0x00,0x00,0x00,0x6C,0xFE,0xFE,0xFE,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,
-/* 0x04 */ 0x00,0x00,0x00,0x00,0x10,0x38,0x7C,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
-/* 0x05 */ 0x00,0x00,0x00,0x18,0x3C,0x3C,0xE7,0xE7,0xE7,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x06 */ 0x00,0x00,0x00,0x18,0x3C,0x7E,0xFF,0xFF,0x7E,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x07 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x08 */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xC3,0xC3,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0x09 */ 0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,0x00,0x00,
-/* 0x0A */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0x99,0xBD,0xBD,0x99,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0x0B */ 0x00,0x00,0x3E,0x0E,0x1A,0x32,0x78,0xCC,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
-/* 0x0C */ 0x00,0x00,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x0D */ 0x00,0x00,0x30,0x38,0x3C,0x36,0x33,0x30,0x30,0x70,0xF0,0xE0,0x00,0x00,0x00,0x00,
-/* 0x0E */ 0x00,0x00,0x7F,0x63,0x7F,0x63,0x63,0x63,0x63,0x67,0xE7,0xE6,0xC0,0x00,0x00,0x00,
-/* 0x0F */ 0x00,0x00,0x00,0x18,0x18,0xDB,0x3C,0xE7,0x3C,0xDB,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x10 */ 0x00,0x80,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00,
-/* 0x11 */ 0x00,0x02,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
-/* 0x12 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0x13 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0x14 */ 0x00,0x00,0x7F,0xDB,0xDB,0xDB,0x7B,0x1B,0x1B,0x1B,0x1B,0x1B,0x00,0x00,0x00,0x00,
-/* 0x15 */ 0x00,0x7C,0xC6,0x60,0x38,0x6C,0xC6,0xC6,0x6C,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,
-/* 0x16 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0xFE,0xFE,0x00,0x00,0x00,0x00,
-/* 0x17 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0x18 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x19 */ 0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0x1A */ 0x00,0x00,0x00,0x00,0x00,0x18,0x0C,0xFE,0x0C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1B */ 0x00,0x00,0x00,0x00,0x00,0x30,0x60,0xFE,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1C */ 0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0xC0,0xC0,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1D */ 0x00,0x00,0x00,0x00,0x00,0x28,0x6C,0xFE,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1E */ 0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0x1F */ 0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
-/* 0x20 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x21 */ 0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x22 */ 0x00,0x66,0x66,0x66,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x23 */ 0x00,0x00,0x00,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x00,0x00,0x00,0x00,
-/* 0x24 */ 0x18,0x18,0x7C,0xC6,0xC2,0xC0,0x7C,0x06,0x06,0x86,0xC6,0x7C,0x18,0x18,0x00,0x00,
-/* 0x25 */ 0x00,0x00,0x00,0x00,0xC2,0xC6,0x0C,0x18,0x30,0x60,0xC6,0x86,0x00,0x00,0x00,0x00,
-/* 0x26 */ 0x00,0x00,0x38,0x6C,0x6C,0x38,0x76,0xDC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x27 */ 0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x28 */ 0x00,0x00,0x0C,0x18,0x30,0x30,0x30,0x30,0x30,0x30,0x18,0x0C,0x00,0x00,0x00,0x00,
-/* 0x29 */ 0x00,0x00,0x30,0x18,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x18,0x30,0x00,0x00,0x00,0x00,
-/* 0x2A */ 0x00,0x00,0x00,0x00,0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2B */ 0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2C */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,
-/* 0x2D */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2E */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x2F */ 0x00,0x00,0x00,0x00,0x02,0x06,0x0C,0x18,0x30,0x60,0xC0,0x80,0x00,0x00,0x00,0x00,
-/* 0x30 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
-/* 0x31 */ 0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0x32 */ 0x00,0x00,0x7C,0xC6,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x33 */ 0x00,0x00,0x7C,0xC6,0x06,0x06,0x3C,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x34 */ 0x00,0x00,0x0C,0x1C,0x3C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00,
-/* 0x35 */ 0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x36 */ 0x00,0x00,0x38,0x60,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x37 */ 0x00,0x00,0xFE,0xC6,0x06,0x06,0x0C,0x18,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00,
-/* 0x38 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x39 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00,
-/* 0x3A */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0x3B */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00,
-/* 0x3C */ 0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00,
-/* 0x3D */ 0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x3E */ 0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00,
-/* 0x3F */ 0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x40 */ 0x00,0x00,0x00,0x7C,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0x7C,0x00,0x00,0x00,0x00,
-/* 0x41 */ 0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x42 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00,
-/* 0x43 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00,
-/* 0x44 */ 0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00,
-/* 0x45 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x46 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x47 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xDE,0xC6,0xC6,0x66,0x3A,0x00,0x00,0x00,0x00,
-/* 0x48 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x49 */ 0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x4A */ 0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
-/* 0x4B */ 0x00,0x00,0xE6,0x66,0x66,0x6C,0x78,0x78,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x4C */ 0x00,0x00,0xF0,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x4D */ 0x00,0x00,0xC6,0xEE,0xFE,0xFE,0xD6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x4E */ 0x00,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x4F */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x50 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x51 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xDE,0x7C,0x0C,0x0E,0x00,0x00,
-/* 0x52 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x6C,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x53 */ 0x00,0x00,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x54 */ 0x00,0x00,0x7E,0x7E,0x5A,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x55 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x56 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x6C,0x38,0x10,0x00,0x00,0x00,0x00,
-/* 0x57 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0xEE,0x6C,0x00,0x00,0x00,0x00,
-/* 0x58 */ 0x00,0x00,0xC6,0xC6,0x6C,0x7C,0x38,0x38,0x7C,0x6C,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x59 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5A */ 0x00,0x00,0xFE,0xC6,0x86,0x0C,0x18,0x30,0x60,0xC2,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x5B */ 0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5C */ 0x00,0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
-/* 0x5D */ 0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5E */ 0x10,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x5F */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,
-/* 0x60 */ 0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x61 */ 0x00,0x00,0x00,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x62 */ 0x00,0x00,0xE0,0x60,0x60,0x78,0x6C,0x66,0x66,0x66,0x66,0x7C,0x00,0x00,0x00,0x00,
-/* 0x63 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC0,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x64 */ 0x00,0x00,0x1C,0x0C,0x0C,0x3C,0x6C,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x65 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xFE,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x66 */ 0x00,0x00,0x38,0x6C,0x64,0x60,0xF0,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x67 */ 0x00,0x00,0x00,0x00,0x00,0x3E,0x66,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00,
-/* 0x68 */ 0x00,0x00,0xE0,0x60,0x60,0x6C,0x76,0x66,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x69 */ 0x00,0x00,0x18,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x6A */ 0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,
-/* 0x6B */ 0x00,0x00,0xE0,0x60,0x60,0x66,0x6C,0x78,0x78,0x6C,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x6C */ 0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x6D */ 0x00,0x00,0x00,0x00,0x00,0x6C,0xFE,0xD6,0xD6,0xD6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x6E */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0x6F */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x70 */ 0x00,0x00,0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0xF0,0x00,
-/* 0x71 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xCC,0xCC,0xCC,0xCC,0xCC,0x7C,0x0C,0x0C,0x1E,0x00,
-/* 0x72 */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x76,0x66,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x73 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0x60,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x74 */ 0x00,0x00,0x10,0x30,0x30,0xFC,0x30,0x30,0x30,0x30,0x36,0x1C,0x00,0x00,0x00,0x00,
-/* 0x75 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x76 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0x77 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0x6C,0x00,0x00,0x00,0x00,
-/* 0x78 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0x6C,0x38,0x38,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,
-/* 0x79 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0xF8,0x00,
-/* 0x7A */ 0x00,0x00,0x00,0x00,0x00,0xFE,0xCC,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x7B */ 0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00,
-/* 0x7C */ 0x00,0x00,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x7D */ 0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00,
-/* 0x7E */ 0x00,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x7F */ 0x00,0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0x80 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x0C,0x06,0x7C,0x00,0x00,
-/* 0x81 */ 0x00,0x00,0xCC,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x82 */ 0x00,0x0C,0x18,0x30,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x83 */ 0x00,0x10,0x38,0x6C,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x84 */ 0x00,0x00,0xCC,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x85 */ 0x00,0x60,0x30,0x18,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x86 */ 0x00,0x38,0x6C,0x38,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x87 */ 0x00,0x00,0x00,0x00,0x3C,0x66,0x60,0x60,0x66,0x3C,0x0C,0x06,0x3C,0x00,0x00,0x00,
-/* 0x88 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x89 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x8A */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x8B */ 0x00,0x00,0x66,0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8C */ 0x00,0x18,0x3C,0x66,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8D */ 0x00,0x60,0x30,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8E */ 0x00,0xC6,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x8F */ 0x38,0x6C,0x38,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x90 */ 0x18,0x30,0x60,0x00,0xFE,0x66,0x60,0x7C,0x60,0x60,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x91 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0x76,0x36,0x7E,0xD8,0xD8,0x6E,0x00,0x00,0x00,0x00,
-/* 0x92 */ 0x00,0x00,0x3E,0x6C,0xCC,0xCC,0xFE,0xCC,0xCC,0xCC,0xCC,0xCE,0x00,0x00,0x00,0x00,
-/* 0x93 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x94 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x95 */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x96 */ 0x00,0x30,0x78,0xCC,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x97 */ 0x00,0x60,0x30,0x18,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x98 */ 0x00,0x00,0xC6,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0x78,0x00,
-/* 0x99 */ 0x00,0xC6,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x9A */ 0x00,0xC6,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x9B */ 0x00,0x18,0x18,0x3C,0x66,0x60,0x60,0x60,0x66,0x3C,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x9C */ 0x00,0x38,0x6C,0x64,0x60,0xF8,0x60,0x60,0x60,0x60,0xE6,0xFC,0x00,0x00,0x00,0x00,
-/* 0x9D */ 0x00,0x00,0x66,0x66,0x3C,0x18,0x7E,0x18,0x7E,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x9E */ 0x00,0xF8,0xCC,0xCC,0xF8,0xC4,0xCC,0xDE,0xCC,0xCC,0xCC,0xC6,0x00,0x00,0x00,0x00,
-/* 0x9F */ 0x00,0x0E,0x1B,0x18,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x18,0xD8,0x70,0x00,0x00,
-/* 0xA0 */ 0x00,0x18,0x30,0x60,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0xA1 */ 0x00,0x0C,0x18,0x30,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0xA2 */ 0x00,0x18,0x30,0x60,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0xA3 */ 0x00,0x18,0x30,0x60,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0xA4 */ 0x00,0x00,0x76,0xDC,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0xA5 */ 0x76,0xDC,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0xA6 */ 0x00,0x3C,0x6C,0x6C,0x3E,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xA7 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xA8 */ 0x00,0x00,0x30,0x30,0x00,0x30,0x30,0x60,0xC0,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0xA9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,
-/* 0xAA */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0x06,0x06,0x06,0x00,0x00,0x00,0x00,0x00,
-/* 0xAB */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x60,0xDC,0x86,0x0C,0x18,0x3E,0x00,0x00,
-/* 0xAC */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x66,0xCE,0x9E,0x3E,0x06,0x06,0x00,0x00,
-/* 0xAD */ 0x00,0x00,0x18,0x18,0x00,0x18,0x18,0x18,0x3C,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0xAE */ 0x00,0x00,0x00,0x00,0x00,0x36,0x6C,0xD8,0x6C,0x36,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xAF */ 0x00,0x00,0x00,0x00,0x00,0xD8,0x6C,0x36,0x6C,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xB0 */ 0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,
-/* 0xB1 */ 0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,
-/* 0xB2 */ 0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,
-/* 0xB3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB4 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB5 */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB6 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xB7 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xB8 */ 0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB9 */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBA */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBB */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBC */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBD */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBE */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBF */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC0 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC1 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC4 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC6 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xC8 */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC9 */ 0x00,0x00,0x00,0x00,0x00,0x3F,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCA */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xCB */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCC */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCD */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xCE */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCF */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD0 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD1 */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD3 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD4 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD5 */ 0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD6 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD8 */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD9 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xDA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xDB */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0xDC */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0xDD */ 0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,
-/* 0xDE */ 0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,
-/* 0xDF */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xE0 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0xD8,0xD8,0xD8,0xDC,0x76,0x00,0x00,0x00,0x00,
-/* 0xE1 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xFC,0xC6,0xC6,0xC6,0xC6,0xDC,0xC0,0xC0,0x00,0x00,
-/* 0xE2 */ 0x00,0x00,0xFE,0xC6,0xC6,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,
-/* 0xE3 */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x6C,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,
-/* 0xE4 */ 0x00,0x00,0xFE,0xC6,0x60,0x30,0x18,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0xE5 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xD8,0xD8,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
-/* 0xE6 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0xC0,0x00,0x00,0x00,
-/* 0xE7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0xE8 */ 0x00,0x00,0x7E,0x18,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0xE9 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
-/* 0xEA */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0x6C,0x6C,0x6C,0x6C,0xEE,0x00,0x00,0x00,0x00,
-/* 0xEB */ 0x00,0x00,0x1E,0x30,0x18,0x0C,0x3E,0x66,0x66,0x66,0x66,0x3C,0x00,0x00,0x00,0x00,
-/* 0xEC */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xDB,0xDB,0xDB,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xED */ 0x00,0x00,0x00,0x03,0x06,0x7E,0xDB,0xDB,0xF3,0x7E,0x60,0xC0,0x00,0x00,0x00,0x00,
-/* 0xEE */ 0x00,0x00,0x1C,0x30,0x60,0x60,0x7C,0x60,0x60,0x60,0x30,0x1C,0x00,0x00,0x00,0x00,
-/* 0xEF */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0xF0 */ 0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0xF1 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,
-/* 0xF2 */ 0x00,0x00,0x00,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00,0x7E,0x00,0x00,0x00,0x00,
-/* 0xF3 */ 0x00,0x00,0x00,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00,0x7E,0x00,0x00,0x00,0x00,
-/* 0xF4 */ 0x00,0x0E,0x1B,0x1B,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xF5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
-/* 0xF6 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x7E,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0xF7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xF8 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xF9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFB */ 0x00,0x0F,0x0C,0x0C,0x0C,0x0C,0x0C,0xEC,0x6C,0x6C,0x3C,0x1C,0x00,0x00,0x00,0x00,
-/* 0xFC */ 0x00,0xD8,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFD */ 0x00,0x70,0xD8,0x30,0x60,0xC8,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFE */ 0x00,0x00,0x00,0x00,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x00,0x00,0x00,0x00,0x00,
-};
diff --git a/arch/ppc/boot/include/mpc10x.h b/arch/ppc/boot/include/mpc10x.h
deleted file mode 100644
index 6e5d540d8d3e..000000000000
--- a/arch/ppc/boot/include/mpc10x.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
- * ctrl/EPIC/etc.
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * This is a heavily stripped down version of:
- * include/asm-ppc/mpc10x.h
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __BOOT_MPC10X_H__
-#define __BOOT_MPC10X_H__
-
-/*
- * The values here don't completely map everything but should work in most
- * cases.
- *
- * MAP A (PReP Map)
- * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
- * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
- * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- *
- * MAP B (CHRP Map)
- * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
- * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
- * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- */
-
-/* Define the type of map to use */
-#define MPC10X_MEM_MAP_A 1
-#define MPC10X_MEM_MAP_B 2
-
-/* Map A (PReP Map) Defines */
-#define MPC10X_MAPA_CNFG_ADDR 0x80000cf8
-#define MPC10X_MAPA_CNFG_DATA 0x80000cfc
-
-/* Map B (CHRP Map) Defines */
-#define MPC10X_MAPB_CNFG_ADDR 0xfec00000
-#define MPC10X_MAPB_CNFG_DATA 0xfee00000
-
-/* Define offsets for the memory controller registers in the config space */
-#define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_BANK_ENABLES 0xa0
-
-#endif /* __BOOT_MPC10X_H__ */
diff --git a/arch/ppc/boot/include/mpsc_defs.h b/arch/ppc/boot/include/mpsc_defs.h
deleted file mode 100644
index 9f37e1355b17..000000000000
--- a/arch/ppc/boot/include/mpsc_defs.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * arch/ppc/boot/include/mpsc_defs.h
- *
- * Register definitions for the Marvell Multi-Protocol Serial Controller (MPSC),
- * Serial DMA Controller (SDMA), and Baud Rate Generator (BRG).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef _PPC_BOOT_MPSC_DEFS_H__
-#define _PPC_BOOT_MPSC_DEFS_H__
-
-#define MPSC_NUM_CTLRS 2
-
-/*
- *****************************************************************************
- *
- * Multi-Protocol Serial Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* Main Configuratino Register Offsets */
-#define MPSC_MMCRL 0x0000
-#define MPSC_MMCRH 0x0004
-#define MPSC_MPCR 0x0008
-#define MPSC_CHR_1 0x000c
-#define MPSC_CHR_2 0x0010
-#define MPSC_CHR_3 0x0014
-#define MPSC_CHR_4 0x0018
-#define MPSC_CHR_5 0x001c
-#define MPSC_CHR_6 0x0020
-#define MPSC_CHR_7 0x0024
-#define MPSC_CHR_8 0x0028
-#define MPSC_CHR_9 0x002c
-#define MPSC_CHR_10 0x0030
-#define MPSC_CHR_11 0x0034
-
-#define MPSC_MPCR_CL_5 0
-#define MPSC_MPCR_CL_6 1
-#define MPSC_MPCR_CL_7 2
-#define MPSC_MPCR_CL_8 3
-#define MPSC_MPCR_SBL_1 0
-#define MPSC_MPCR_SBL_2 3
-
-#define MPSC_CHR_2_TEV (1<<1)
-#define MPSC_CHR_2_TA (1<<7)
-#define MPSC_CHR_2_TTCS (1<<9)
-#define MPSC_CHR_2_REV (1<<17)
-#define MPSC_CHR_2_RA (1<<23)
-#define MPSC_CHR_2_CRD (1<<25)
-#define MPSC_CHR_2_EH (1<<31)
-#define MPSC_CHR_2_PAR_ODD 0
-#define MPSC_CHR_2_PAR_SPACE 1
-#define MPSC_CHR_2_PAR_EVEN 2
-#define MPSC_CHR_2_PAR_MARK 3
-
-/* MPSC Signal Routing */
-#define MPSC_MRR 0x0000
-#define MPSC_RCRR 0x0004
-#define MPSC_TCRR 0x0008
-
-/*
- *****************************************************************************
- *
- * Serial DMA Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define SDMA_SDC 0x0000
-#define SDMA_SDCM 0x0008
-#define SDMA_RX_DESC 0x0800
-#define SDMA_RX_BUF_PTR 0x0808
-#define SDMA_SCRDP 0x0810
-#define SDMA_TX_DESC 0x0c00
-#define SDMA_SCTDP 0x0c10
-#define SDMA_SFTDP 0x0c14
-
-#define SDMA_DESC_CMDSTAT_PE (1<<0)
-#define SDMA_DESC_CMDSTAT_CDL (1<<1)
-#define SDMA_DESC_CMDSTAT_FR (1<<3)
-#define SDMA_DESC_CMDSTAT_OR (1<<6)
-#define SDMA_DESC_CMDSTAT_BR (1<<9)
-#define SDMA_DESC_CMDSTAT_MI (1<<10)
-#define SDMA_DESC_CMDSTAT_A (1<<11)
-#define SDMA_DESC_CMDSTAT_AM (1<<12)
-#define SDMA_DESC_CMDSTAT_CT (1<<13)
-#define SDMA_DESC_CMDSTAT_C (1<<14)
-#define SDMA_DESC_CMDSTAT_ES (1<<15)
-#define SDMA_DESC_CMDSTAT_L (1<<16)
-#define SDMA_DESC_CMDSTAT_F (1<<17)
-#define SDMA_DESC_CMDSTAT_P (1<<18)
-#define SDMA_DESC_CMDSTAT_EI (1<<23)
-#define SDMA_DESC_CMDSTAT_O (1<<31)
-
-#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O | \
- SDMA_DESC_CMDSTAT_EI)
-
-#define SDMA_SDC_RFT (1<<0)
-#define SDMA_SDC_SFM (1<<1)
-#define SDMA_SDC_BLMR (1<<6)
-#define SDMA_SDC_BLMT (1<<7)
-#define SDMA_SDC_POVR (1<<8)
-#define SDMA_SDC_RIFB (1<<9)
-
-#define SDMA_SDCM_ERD (1<<7)
-#define SDMA_SDCM_AR (1<<15)
-#define SDMA_SDCM_STD (1<<16)
-#define SDMA_SDCM_TXD (1<<23)
-#define SDMA_SDCM_AT (1<<31)
-
-#define SDMA_0_CAUSE_RXBUF (1<<0)
-#define SDMA_0_CAUSE_RXERR (1<<1)
-#define SDMA_0_CAUSE_TXBUF (1<<2)
-#define SDMA_0_CAUSE_TXEND (1<<3)
-#define SDMA_1_CAUSE_RXBUF (1<<8)
-#define SDMA_1_CAUSE_RXERR (1<<9)
-#define SDMA_1_CAUSE_TXBUF (1<<10)
-#define SDMA_1_CAUSE_TXEND (1<<11)
-
-#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR | \
- SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR)
-#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND | \
- SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND)
-
-/* SDMA Interrupt registers */
-#define SDMA_INTR_CAUSE 0x0000
-#define SDMA_INTR_MASK 0x0080
-
-/*
- *****************************************************************************
- *
- * Baud Rate Generator Interface Registers
- *
- *****************************************************************************
- */
-
-#define BRG_BCR 0x0000
-#define BRG_BTR 0x0004
-
-#endif /*_PPC_BOOT_MPSC_DEFS_H__ */
diff --git a/arch/ppc/boot/include/nonstdio.h b/arch/ppc/boot/include/nonstdio.h
deleted file mode 100644
index f2b5526faef3..000000000000
--- a/arch/ppc/boot/include/nonstdio.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * This is sort of a catchall for I/O related functions. Stuff that
- * wouldn't be in 'stdio.h' normally is here, and it's 'nonstdio.h'
- * for a reason. -- Tom
- */
-typedef int FILE;
-extern FILE *stdin, *stdout;
-#define NULL ((void *)0)
-#define EOF (-1)
-#define fopen(n, m) NULL
-#define fflush(f) 0
-#define fclose(f) 0
-#define perror(s) printf("%s: no files!\n", (s))
-
-extern int getc(void);
-extern int printf(const char *format, ...);
-extern int sprintf(char *str, const char *format, ...);
-extern int tstc(void);
-extern void exit(void);
-extern void outb(int port, unsigned char val);
-extern void putc(const char c);
-extern void puthex(unsigned long val);
-extern void puts(const char *);
-extern void udelay(long delay);
-extern unsigned char inb(int port);
-extern void board_isa_init(void);
-extern void ISA_init(unsigned long base);
diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h
deleted file mode 100644
index 4ed88acfa73a..000000000000
--- a/arch/ppc/boot/include/of1275.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-typedef void *prom_handle;
-typedef void *ihandle;
-typedef void *phandle;
-typedef int (*prom_entry)(void *);
-
-#define OF_INVALID_HANDLE ((prom_handle)-1UL)
-
-extern prom_entry of_prom_entry;
-
-/* function declarations */
-
-int call_prom(const char *service, int nargs, int nret, ...);
-int call_prom_ret(const char *service, int nargs, int nret,
- unsigned int *rets, ...);
-void * claim(unsigned int virt, unsigned int size, unsigned int align);
-int map(unsigned int phys, unsigned int virt, unsigned int size);
-void enter(void);
-void exit(void);
-phandle finddevice(const char *name);
-int getprop(phandle node, const char *name, void *buf, int buflen);
-void ofinit(prom_entry entry);
-int ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr);
-int read(ihandle instance, void *buf, int buflen);
-void release(void *virt, unsigned int size);
-int write(ihandle instance, void *buf, int buflen);
-
-/* inlines */
-
-extern inline void pause(void)
-{
- enter();
-}
diff --git a/arch/ppc/boot/include/rs6000.h b/arch/ppc/boot/include/rs6000.h
deleted file mode 100644
index 433f45084e41..000000000000
--- a/arch/ppc/boot/include/rs6000.h
+++ /dev/null
@@ -1,243 +0,0 @@
-/* IBM RS/6000 "XCOFF" file definitions for BFD.
- Copyright (C) 1990, 1991 Free Software Foundation, Inc.
- FIXME: Can someone provide a transliteration of this name into ASCII?
- Using the following chars caused a compiler warning on HIUX (so I replaced
- them with octal escapes), and isn't useful without an understanding of what
- character set it is.
- Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM
- and John Gilmore of Cygnus Support. */
-
-/********************** FILE HEADER **********************/
-
-struct external_filehdr {
- char f_magic[2]; /* magic number */
- char f_nscns[2]; /* number of sections */
- char f_timdat[4]; /* time & date stamp */
- char f_symptr[4]; /* file pointer to symtab */
- char f_nsyms[4]; /* number of symtab entries */
- char f_opthdr[2]; /* sizeof(optional hdr) */
- char f_flags[2]; /* flags */
-};
-
- /* IBM RS/6000 */
-#define U802WRMAGIC 0730 /* writeable text segments **chh** */
-#define U802ROMAGIC 0735 /* readonly sharable text segments */
-#define U802TOCMAGIC 0737 /* readonly text segments and TOC */
-
-#define BADMAG(x) \
- ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \
- (x).f_magic != U802TOCMAGIC)
-
-#define FILHDR struct external_filehdr
-#define FILHSZ 20
-
-
-/********************** AOUT "OPTIONAL HEADER" **********************/
-
-
-typedef struct
-{
- unsigned char magic[2]; /* type of file */
- unsigned char vstamp[2]; /* version stamp */
- unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */
- unsigned char dsize[4]; /* initialized data " " */
- unsigned char bsize[4]; /* uninitialized data " " */
- unsigned char entry[4]; /* entry pt. */
- unsigned char text_start[4]; /* base of text used for this file */
- unsigned char data_start[4]; /* base of data used for this file */
- unsigned char o_toc[4]; /* address of TOC */
- unsigned char o_snentry[2]; /* section number of entry point */
- unsigned char o_sntext[2]; /* section number of .text section */
- unsigned char o_sndata[2]; /* section number of .data section */
- unsigned char o_sntoc[2]; /* section number of TOC */
- unsigned char o_snloader[2]; /* section number of .loader section */
- unsigned char o_snbss[2]; /* section number of .bss section */
- unsigned char o_algntext[2]; /* .text alignment */
- unsigned char o_algndata[2]; /* .data alignment */
- unsigned char o_modtype[2]; /* module type (??) */
- unsigned char o_cputype[2]; /* cpu type */
- unsigned char o_maxstack[4]; /* max stack size (??) */
- unsigned char o_maxdata[4]; /* max data size (??) */
- unsigned char o_resv2[12]; /* reserved */
-}
-AOUTHDR;
-
-#define AOUTSZ 72
-#define SMALL_AOUTSZ (28)
-#define AOUTHDRSZ 72
-
-#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */
-#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */
-#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */
-
-
-/********************** SECTION HEADER **********************/
-
-
-struct external_scnhdr {
- char s_name[8]; /* section name */
- char s_paddr[4]; /* physical address, aliased s_nlib */
- char s_vaddr[4]; /* virtual address */
- char s_size[4]; /* section size */
- char s_scnptr[4]; /* file ptr to raw data for section */
- char s_relptr[4]; /* file ptr to relocation */
- char s_lnnoptr[4]; /* file ptr to line numbers */
- char s_nreloc[2]; /* number of relocation entries */
- char s_nlnno[2]; /* number of line number entries*/
- char s_flags[4]; /* flags */
-};
-
-/*
- * names of "special" sections
- */
-#define _TEXT ".text"
-#define _DATA ".data"
-#define _BSS ".bss"
-#define _PAD ".pad"
-#define _LOADER ".loader"
-
-#define SCNHDR struct external_scnhdr
-#define SCNHSZ 40
-
-/* XCOFF uses a special .loader section with type STYP_LOADER. */
-#define STYP_LOADER 0x1000
-
-/* XCOFF uses a special .debug section with type STYP_DEBUG. */
-#define STYP_DEBUG 0x2000
-
-/* XCOFF handles line number or relocation overflow by creating
- another section header with STYP_OVRFLO set. */
-#define STYP_OVRFLO 0x8000
-
-/********************** LINE NUMBERS **********************/
-
-/* 1 line number entry for every "breakpointable" source line in a section.
- * Line numbers are grouped on a per function basis; first entry in a function
- * grouping will have l_lnno = 0 and in place of physical address will be the
- * symbol table index of the function name.
- */
-struct external_lineno {
- union {
- char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
- char l_paddr[4]; /* (physical) address of line number */
- } l_addr;
- char l_lnno[2]; /* line number */
-};
-
-
-#define LINENO struct external_lineno
-#define LINESZ 6
-
-
-/********************** SYMBOLS **********************/
-
-#define E_SYMNMLEN 8 /* # characters in a symbol name */
-#define E_FILNMLEN 14 /* # characters in a file name */
-#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
-
-struct external_syment
-{
- union {
- char e_name[E_SYMNMLEN];
- struct {
- char e_zeroes[4];
- char e_offset[4];
- } e;
- } e;
- char e_value[4];
- char e_scnum[2];
- char e_type[2];
- char e_sclass[1];
- char e_numaux[1];
-};
-
-
-
-#define N_BTMASK (017)
-#define N_TMASK (060)
-#define N_BTSHFT (4)
-#define N_TSHIFT (2)
-
-
-union external_auxent {
- struct {
- char x_tagndx[4]; /* str, un, or enum tag indx */
- union {
- struct {
- char x_lnno[2]; /* declaration line number */
- char x_size[2]; /* str/union/array size */
- } x_lnsz;
- char x_fsize[4]; /* size of function */
- } x_misc;
- union {
- struct { /* if ISFCN, tag, or .bb */
- char x_lnnoptr[4]; /* ptr to fcn line # */
- char x_endndx[4]; /* entry ndx past block end */
- } x_fcn;
- struct { /* if ISARY, up to 4 dimen. */
- char x_dimen[E_DIMNUM][2];
- } x_ary;
- } x_fcnary;
- char x_tvndx[2]; /* tv index */
- } x_sym;
-
- union {
- char x_fname[E_FILNMLEN];
- struct {
- char x_zeroes[4];
- char x_offset[4];
- } x_n;
- } x_file;
-
- struct {
- char x_scnlen[4]; /* section length */
- char x_nreloc[2]; /* # relocation entries */
- char x_nlinno[2]; /* # line numbers */
- } x_scn;
-
- struct {
- char x_tvfill[4]; /* tv fill value */
- char x_tvlen[2]; /* length of .tv */
- char x_tvran[2][2]; /* tv range */
- } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
-
- struct {
- unsigned char x_scnlen[4];
- unsigned char x_parmhash[4];
- unsigned char x_snhash[2];
- unsigned char x_smtyp[1];
- unsigned char x_smclas[1];
- unsigned char x_stab[4];
- unsigned char x_snstab[2];
- } x_csect;
-
-};
-
-#define SYMENT struct external_syment
-#define SYMESZ 18
-#define AUXENT union external_auxent
-#define AUXESZ 18
-#define DBXMASK 0x80 /* for dbx storage mask */
-#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK)
-
-
-
-/********************** RELOCATION DIRECTIVES **********************/
-
-
-struct external_reloc {
- char r_vaddr[4];
- char r_symndx[4];
- char r_size[1];
- char r_type[1];
-};
-
-
-#define RELOC struct external_reloc
-#define RELSZ 10
-
-#define DEFAULT_DATA_SECTION_ALIGNMENT 4
-#define DEFAULT_BSS_SECTION_ALIGNMENT 4
-#define DEFAULT_TEXT_SECTION_ALIGNMENT 4
-/* For new sections we havn't heard of before */
-#define DEFAULT_SECTION_ALIGNMENT 4
diff --git a/arch/ppc/boot/include/serial.h b/arch/ppc/boot/include/serial.h
deleted file mode 100644
index d710eabb4256..000000000000
--- a/arch/ppc/boot/include/serial.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * A really private header file for the (dumb) serial driver in arch/ppc/boot
- *
- * Shamelessly taken from include/linux/serialP.h:
- *
- * Copyright (C) 1997 by Theodore Ts'o.
- *
- * Redistribution of this file is permitted under the terms of the GNU
- * Public License (GPL)
- */
-
-#ifndef _PPC_BOOT_SERIALP_H
-#define _PPC_BOOT_SERIALP_H
-
-/*
- * This is our internal structure for each serial port's state.
- *
- * Many fields are paralleled by the structure used by the serial_struct
- * structure.
- *
- * Given that this is how SERIAL_PORT_DFNS are done, and that we need
- * to use a few of their fields, we need to have our own copy of it.
- */
-struct serial_state {
- int magic;
- int baud_base;
- unsigned long port;
- int irq;
- int flags;
- int hub6;
- int type;
- int line;
- int revision; /* Chip revision (950) */
- int xmit_fifo_size;
- int custom_divisor;
- int count;
- u8 *iomem_base;
- u16 iomem_reg_shift;
- unsigned short close_delay;
- unsigned short closing_wait; /* time to wait before closing */
- unsigned long icount;
- int io_type;
- void *info;
- void *dev;
-};
-#endif /* _PPC_BOOT_SERIAL_H */
diff --git a/arch/ppc/boot/ld.script b/arch/ppc/boot/ld.script
deleted file mode 100644
index d4dd8f15395e..000000000000
--- a/arch/ppc/boot/ld.script
+++ /dev/null
@@ -1,85 +0,0 @@
-OUTPUT_ARCH(powerpc:common)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .plt : { *(.plt) }
- .text :
- {
- *(.text)
- *(.fixup)
- __relocate_start = .;
- *(.relocate_code)
- __relocate_end = .;
- }
- _etext = .;
- PROVIDE (etext = .);
-
- /* Read-write section, merged into data segment: */
- . = ALIGN(4096);
- .data :
- {
- *(.data)
- *(.data1)
- *(.data.boot)
- *(.sdata)
- *(.sdata2)
- *(.got.plt) *(.got)
- *(.dynamic)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- *(.got1)
- __image_begin = .;
- *(.image)
- __image_end = .;
- . = ALIGN(4096);
- __ramdisk_begin = .;
- *(.ramdisk)
- __ramdisk_end = .;
- . = ALIGN(4096);
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = ALIGN(4096);
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-
- /DISCARD/ : {
- *(__ksymtab)
- *(__ksymtab_strings)
- *(__bug_table)
- *(__kcrctab)
- }
-
-}
diff --git a/arch/ppc/boot/lib/.gitignore b/arch/ppc/boot/lib/.gitignore
deleted file mode 100644
index 1629a6167755..000000000000
--- a/arch/ppc/boot/lib/.gitignore
+++ /dev/null
@@ -1,3 +0,0 @@
-inffast.c
-inflate.c
-inftrees.c
diff --git a/arch/ppc/boot/lib/Makefile b/arch/ppc/boot/lib/Makefile
deleted file mode 100644
index 2f995f712ec5..000000000000
--- a/arch/ppc/boot/lib/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Makefile for some libs needed by zImage.
-#
-
-CFLAGS_kbd.o := -Idrivers/char
-CFLAGS_vreset.o := -Iarch/ppc/boot/include
-
-zlib := inffast.c inflate.c inftrees.c
-
-lib-y += $(zlib:.c=.o) div64.o
-lib-$(CONFIG_VGA_CONSOLE) += vreset.o kbd.o
-
-
-# zlib files needs header from their original place
-EXTRA_CFLAGS += -Ilib/zlib_inflate
-
-quiet_cmd_copy_zlib = COPY $@
- cmd_copy_zlib = cat $< > $@
-
-$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/%
- $(call cmd,copy_zlib)
-
-clean-files := $(zlib)
diff --git a/arch/ppc/boot/lib/div64.S b/arch/ppc/boot/lib/div64.S
deleted file mode 100644
index 3527569e9926..000000000000
--- a/arch/ppc/boot/lib/div64.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Divide a 64-bit unsigned number by a 32-bit unsigned number.
- * This routine assumes that the top 32 bits of the dividend are
- * non-zero to start with.
- * On entry, r3 points to the dividend, which get overwritten with
- * the 64-bit quotient, and r4 contains the divisor.
- * On exit, r3 contains the remainder.
- *
- * Copyright (C) 2002 Paul Mackerras, IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-
-_GLOBAL(__div64_32)
- lwz r5,0(r3) # get the dividend into r5/r6
- lwz r6,4(r3)
- cmplw r5,r4
- li r7,0
- li r8,0
- blt 1f
- divwu r7,r5,r4 # if dividend.hi >= divisor,
- mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
- subf. r5,r0,r5 # dividend.hi %= divisor
- beq 3f
-1: mr r11,r5 # here dividend.hi != 0
- andis. r0,r5,0xc000
- bne 2f
- cntlzw r0,r5 # we are shifting the dividend right
- li r10,-1 # to make it < 2^32, and shifting
- srw r10,r10,r0 # the divisor right the same amount,
- add r9,r4,r10 # rounding up (so the estimate cannot
- andc r11,r6,r10 # ever be too large, only too small)
- andc r9,r9,r10
- or r11,r5,r11
- rotlw r9,r9,r0
- rotlw r11,r11,r0
- divwu r11,r11,r9 # then we divide the shifted quantities
-2: mullw r10,r11,r4 # to get an estimate of the quotient,
- mulhwu r9,r11,r4 # multiply the estimate by the divisor,
- subfc r6,r10,r6 # take the product from the divisor,
- add r8,r8,r11 # and add the estimate to the accumulated
- subfe. r5,r9,r5 # quotient
- bne 1b
-3: cmplw r6,r4
- blt 4f
- divwu r0,r6,r4 # perform the remaining 32-bit division
- mullw r10,r0,r4 # and get the remainder
- add r8,r8,r0
- subf r6,r10,r6
-4: stw r7,0(r3) # return the quotient in *r3
- stw r8,4(r3)
- mr r3,r6 # return the remainder in r3
- blr
diff --git a/arch/ppc/boot/lib/kbd.c b/arch/ppc/boot/lib/kbd.c
deleted file mode 100644
index 3931727434de..000000000000
--- a/arch/ppc/boot/lib/kbd.c
+++ /dev/null
@@ -1,248 +0,0 @@
-#include <linux/keyboard.h>
-
-#include "defkeymap.c" /* yeah I know it's bad -- Cort */
-
-
-unsigned char shfts, ctls, alts, caps;
-
-#define KBDATAP 0x60 /* kbd data port */
-#define KBSTATUSPORT 0x61 /* kbd status */
-#define KBSTATP 0x64 /* kbd status port */
-#define KBINRDY 0x01
-#define KBOUTRDY 0x02
-
-extern unsigned char inb(int port);
-extern void outb(int port, char val);
-extern void puts(const char *);
-extern void puthex(unsigned long val);
-extern void udelay(long x);
-
-static int kbd(int noblock)
-{
- unsigned char dt, brk, val;
- unsigned code;
-loop:
- if (noblock) {
- if ((inb(KBSTATP) & KBINRDY) == 0)
- return (-1);
- } else while((inb(KBSTATP) & KBINRDY) == 0) ;
-
- dt = inb(KBDATAP);
-
- brk = dt & 0x80; /* brk == 1 on key release */
- dt = dt & 0x7f; /* keycode */
-
- if (shfts)
- code = shift_map[dt];
- else if (ctls)
- code = ctrl_map[dt];
- else
- code = plain_map[dt];
-
- val = KVAL(code);
- switch (KTYP(code) & 0x0f) {
- case KT_LATIN:
- if (brk)
- break;
- if (alts)
- val |= 0x80;
- if (val == 0x7f) /* map delete to backspace */
- val = '\b';
- return val;
-
- case KT_LETTER:
- if (brk)
- break;
- if (caps)
- val -= 'a'-'A';
- return val;
-
- case KT_SPEC:
- if (brk)
- break;
- if (val == KVAL(K_CAPS))
- caps = !caps;
- else if (val == KVAL(K_ENTER)) {
-enter: /* Wait for key up */
- while (1) {
- while((inb(KBSTATP) & KBINRDY) == 0) ;
- dt = inb(KBDATAP);
- if (dt & 0x80) /* key up */ break;
- }
- return 10;
- }
- break;
-
- case KT_PAD:
- if (brk)
- break;
- if (val < 10)
- return val;
- if (val == KVAL(K_PENTER))
- goto enter;
- break;
-
- case KT_SHIFT:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- shfts = brk ? 0 : 1;
- break;
- case KG_ALT:
- case KG_ALTGR:
- alts = brk ? 0 : 1;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- ctls = brk ? 0 : 1;
- break;
- }
- break;
-
- case KT_LOCK:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- if (brk)
- shfts = !shfts;
- break;
- case KG_ALT:
- case KG_ALTGR:
- if (brk)
- alts = !alts;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- if (brk)
- ctls = !ctls;
- break;
- }
- break;
- }
- if (brk) return (-1); /* Ignore initial 'key up' codes */
- goto loop;
-}
-
-static int __kbdreset(void)
-{
- unsigned char c;
- int i, t;
-
- /* flush input queue */
- t = 2000;
- while ((inb(KBSTATP) & KBINRDY))
- {
- (void)inb(KBDATAP);
- if (--t == 0)
- return 1;
- }
- /* Send self-test */
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0)
- return 2;
- outb(KBSTATP,0xAA);
- t = 200000;
- while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
- if (--t == 0)
- return 3;
- if ((c = inb(KBDATAP)) != 0x55)
- {
- puts("Keyboard self test failed - result:");
- puthex(c);
- puts("\n");
- }
- /* Enable interrupts and keyboard controller */
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 4;
- outb(KBSTATP,0x60);
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 5;
- outb(KBDATAP,0x45);
- for (i = 0; i < 10000; i++) udelay(1);
-
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 6;
- outb(KBSTATP,0x20);
- t = 200000;
- while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
- if (--t == 0) return 7;
- if (! (inb(KBDATAP) & 0x40)) {
- /*
- * Quote from PS/2 System Reference Manual:
- *
- * "Address hex 0060 and address hex 0064 should be
- * written only when the input-buffer-full bit and
- * output-buffer-full bit in the Controller Status
- * register are set 0." (KBINRDY and KBOUTRDY)
- */
- t = 200000;
- while (inb(KBSTATP) & (KBINRDY | KBOUTRDY))
- if (--t == 0) return 8;
- outb(KBDATAP,0xF0);
- t = 200000;
- while (inb(KBSTATP) & (KBINRDY | KBOUTRDY))
- if (--t == 0) return 9;
- outb(KBDATAP,0x01);
- }
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 10;
- outb(KBSTATP,0xAE);
- return 0;
-}
-
-static void kbdreset(void)
-{
- int ret = __kbdreset();
-
- if (ret) {
- puts("__kbdreset failed: ");
- puthex(ret);
- puts("\n");
- }
-}
-
-/* We have to actually read the keyboard when CRT_tstc is called,
- * since the pending data might be a key release code, and therefore
- * not valid data. In this case, kbd() will return -1, even though there's
- * data to be read. Of course, we might actually read a valid key press,
- * in which case it gets queued into key_pending for use by CRT_getc.
- */
-
-static int kbd_reset = 0;
-
-static int key_pending = -1;
-
-int CRT_getc(void)
-{
- int c;
- if (!kbd_reset) {kbdreset(); kbd_reset++; }
-
- if (key_pending != -1) {
- c = key_pending;
- key_pending = -1;
- return c;
- } else {
- while ((c = kbd(0)) == 0) ;
- return c;
- }
-}
-
-int CRT_tstc(void)
-{
- if (!kbd_reset) {kbdreset(); kbd_reset++; }
-
- while (key_pending == -1 && ((inb(KBSTATP) & KBINRDY) != 0)) {
- key_pending = kbd(1);
- }
-
- return (key_pending != -1);
-}
diff --git a/arch/ppc/boot/lib/vreset.c b/arch/ppc/boot/lib/vreset.c
deleted file mode 100644
index 98539e9f7f96..000000000000
--- a/arch/ppc/boot/lib/vreset.c
+++ /dev/null
@@ -1,805 +0,0 @@
-/*
- * vreset.c
- *
- * Initialize the VGA control registers to 80x25 text mode.
- *
- * Adapted from a program by:
- * Steve Sellgren
- * San Francisco Indigo Company
- * sfindigo!sellgren@uunet.uu.net
- *
- * Original concept by:
- * Gary Thomas <gdt@linuxppc.org>
- * Adapted for Moto boxes by:
- * Pat Kane & Mark Scott, 1996
- * Adapted for IBM portables by:
- * Takeshi Ishimoto
- * Multi-console support:
- * Terje Malmedal <terje.malmedal@usit.uio.no>
- */
-
-#include "iso_font.h"
-#include "nonstdio.h"
-
-extern char *vidmem;
-extern int lines, cols;
-struct VaRegs;
-
-/*
- * VGA Register
- */
-struct VgaRegs
-{
- unsigned short io_port;
- unsigned char io_index;
- unsigned char io_value;
-};
-
-void unlockVideo(int slot);
-void setTextRegs(struct VgaRegs *svp);
-void setTextCLUT(int shift);
-void clearVideoMemory(void);
-void loadFont(unsigned char *ISA_mem);
-
-static void mdelay(int ms)
-{
- for (; ms > 0; --ms)
- udelay(1000);
-}
-
-/*
- * Default console text mode registers used to reset
- * graphics adapter.
- */
-#define NREGS 54
-#define ENDMK 0xFFFF /* End marker */
-
-#define S3Vendor 0x5333
-#define CirrusVendor 0x1013
-#define DiamondVendor 0x100E
-#define MatroxVendor 0x102B
-#define ParadiseVendor 0x101C
-
-struct VgaRegs GenVgaTextRegs[NREGS+1] = {
- /* port index value */
- /* SR Regs */
- { 0x3c4, 0x1, 0x0 },
- { 0x3c4, 0x2, 0x3 },
- { 0x3c4, 0x3, 0x0 },
- { 0x3c4, 0x4, 0x2 },
- /* CR Regs */
- { 0x3d4, 0x0, 0x5f },
- { 0x3d4, 0x1, 0x4f },
- { 0x3d4, 0x2, 0x50 },
- { 0x3d4, 0x3, 0x82 },
- { 0x3d4, 0x4, 0x55 },
- { 0x3d4, 0x5, 0x81 },
- { 0x3d4, 0x6, 0xbf },
- { 0x3d4, 0x7, 0x1f },
- { 0x3d4, 0x8, 0x00 },
- { 0x3d4, 0x9, 0x4f },
- { 0x3d4, 0xa, 0x0d },
- { 0x3d4, 0xb, 0x0e },
- { 0x3d4, 0xc, 0x00 },
- { 0x3d4, 0xd, 0x00 },
- { 0x3d4, 0xe, 0x00 },
- { 0x3d4, 0xf, 0x00 },
- { 0x3d4, 0x10, 0x9c },
- { 0x3d4, 0x11, 0x8e },
- { 0x3d4, 0x12, 0x8f },
- { 0x3d4, 0x13, 0x28 },
- { 0x3d4, 0x14, 0x1f },
- { 0x3d4, 0x15, 0x96 },
- { 0x3d4, 0x16, 0xb9 },
- { 0x3d4, 0x17, 0xa3 },
- /* GR Regs */
- { 0x3ce, 0x0, 0x0 },
- { 0x3ce, 0x1, 0x0 },
- { 0x3ce, 0x2, 0x0 },
- { 0x3ce, 0x3, 0x0 },
- { 0x3ce, 0x4, 0x0 },
- { 0x3ce, 0x5, 0x10 },
- { 0x3ce, 0x6, 0xe },
- { 0x3ce, 0x7, 0x0 },
- { 0x3ce, 0x8, 0xff },
- { ENDMK }
-};
-
-struct RGBColors
-{
- unsigned char r, g, b;
-};
-
-/*
- * Default console text mode color table.
- * These values were obtained by booting Linux with
- * text mode firmware & then dumping the registers.
- */
-struct RGBColors TextCLUT[256] =
-{
- /* red green blue */
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x2a },
- { 0x0, 0x2a, 0x0 },
- { 0x0, 0x2a, 0x2a },
- { 0x2a, 0x0, 0x0 },
- { 0x2a, 0x0, 0x2a },
- { 0x2a, 0x2a, 0x0 },
- { 0x2a, 0x2a, 0x2a },
- { 0x0, 0x0, 0x15 },
- { 0x0, 0x0, 0x3f },
- { 0x0, 0x2a, 0x15 },
- { 0x0, 0x2a, 0x3f },
- { 0x2a, 0x0, 0x15 },
- { 0x2a, 0x0, 0x3f },
- { 0x2a, 0x2a, 0x15 },
- { 0x2a, 0x2a, 0x3f },
- { 0x0, 0x15, 0x0 },
- { 0x0, 0x15, 0x2a },
- { 0x0, 0x3f, 0x0 },
- { 0x0, 0x3f, 0x2a },
- { 0x2a, 0x15, 0x0 },
- { 0x2a, 0x15, 0x2a },
- { 0x2a, 0x3f, 0x0 },
- { 0x2a, 0x3f, 0x2a },
- { 0x0, 0x15, 0x15 },
- { 0x0, 0x15, 0x3f },
- { 0x0, 0x3f, 0x15 },
- { 0x0, 0x3f, 0x3f },
- { 0x2a, 0x15, 0x15 },
- { 0x2a, 0x15, 0x3f },
- { 0x2a, 0x3f, 0x15 },
- { 0x2a, 0x3f, 0x3f },
- { 0x15, 0x0, 0x0 },
- { 0x15, 0x0, 0x2a },
- { 0x15, 0x2a, 0x0 },
- { 0x15, 0x2a, 0x2a },
- { 0x3f, 0x0, 0x0 },
- { 0x3f, 0x0, 0x2a },
- { 0x3f, 0x2a, 0x0 },
- { 0x3f, 0x2a, 0x2a },
- { 0x15, 0x0, 0x15 },
- { 0x15, 0x0, 0x3f },
- { 0x15, 0x2a, 0x15 },
- { 0x15, 0x2a, 0x3f },
- { 0x3f, 0x0, 0x15 },
- { 0x3f, 0x0, 0x3f },
- { 0x3f, 0x2a, 0x15 },
- { 0x3f, 0x2a, 0x3f },
- { 0x15, 0x15, 0x0 },
- { 0x15, 0x15, 0x2a },
- { 0x15, 0x3f, 0x0 },
- { 0x15, 0x3f, 0x2a },
- { 0x3f, 0x15, 0x0 },
- { 0x3f, 0x15, 0x2a },
- { 0x3f, 0x3f, 0x0 },
- { 0x3f, 0x3f, 0x2a },
- { 0x15, 0x15, 0x15 },
- { 0x15, 0x15, 0x3f },
- { 0x15, 0x3f, 0x15 },
- { 0x15, 0x3f, 0x3f },
- { 0x3f, 0x15, 0x15 },
- { 0x3f, 0x15, 0x3f },
- { 0x3f, 0x3f, 0x15 },
- { 0x3f, 0x3f, 0x3f },
- { 0x39, 0xc, 0x5 },
- { 0x15, 0x2c, 0xf },
- { 0x26, 0x10, 0x3d },
- { 0x29, 0x29, 0x38 },
- { 0x4, 0x1a, 0xe },
- { 0x2, 0x1e, 0x3a },
- { 0x3c, 0x25, 0x33 },
- { 0x3c, 0xc, 0x2c },
- { 0x3f, 0x3, 0x2b },
- { 0x1c, 0x9, 0x13 },
- { 0x25, 0x2a, 0x35 },
- { 0x1e, 0xa, 0x38 },
- { 0x24, 0x8, 0x3 },
- { 0x3, 0xe, 0x36 },
- { 0xc, 0x6, 0x2a },
- { 0x26, 0x3, 0x32 },
- { 0x5, 0x2f, 0x33 },
- { 0x3c, 0x35, 0x2f },
- { 0x2d, 0x26, 0x3e },
- { 0xd, 0xa, 0x10 },
- { 0x25, 0x3c, 0x11 },
- { 0xd, 0x4, 0x2e },
- { 0x5, 0x19, 0x3e },
- { 0xc, 0x13, 0x34 },
- { 0x2b, 0x6, 0x24 },
- { 0x4, 0x3, 0xd },
- { 0x2f, 0x3c, 0xc },
- { 0x2a, 0x37, 0x1f },
- { 0xf, 0x12, 0x38 },
- { 0x38, 0xe, 0x2a },
- { 0x12, 0x2f, 0x19 },
- { 0x29, 0x2e, 0x31 },
- { 0x25, 0x13, 0x3e },
- { 0x33, 0x3e, 0x33 },
- { 0x1d, 0x2c, 0x25 },
- { 0x15, 0x15, 0x5 },
- { 0x32, 0x25, 0x39 },
- { 0x1a, 0x7, 0x1f },
- { 0x13, 0xe, 0x1d },
- { 0x36, 0x17, 0x34 },
- { 0xf, 0x15, 0x23 },
- { 0x2, 0x35, 0xd },
- { 0x15, 0x3f, 0xc },
- { 0x14, 0x2f, 0xf },
- { 0x19, 0x21, 0x3e },
- { 0x27, 0x11, 0x2f },
- { 0x38, 0x3f, 0x3c },
- { 0x36, 0x2d, 0x15 },
- { 0x16, 0x17, 0x2 },
- { 0x1, 0xa, 0x3d },
- { 0x1b, 0x11, 0x3f },
- { 0x21, 0x3c, 0xd },
- { 0x1a, 0x39, 0x3d },
- { 0x8, 0xe, 0xe },
- { 0x22, 0x21, 0x23 },
- { 0x1e, 0x30, 0x5 },
- { 0x1f, 0x22, 0x3d },
- { 0x1e, 0x2f, 0xa },
- { 0x0, 0x1c, 0xe },
- { 0x0, 0x1c, 0x15 },
- { 0x0, 0x1c, 0x1c },
- { 0x0, 0x15, 0x1c },
- { 0x0, 0xe, 0x1c },
- { 0x0, 0x7, 0x1c },
- { 0xe, 0xe, 0x1c },
- { 0x11, 0xe, 0x1c },
- { 0x15, 0xe, 0x1c },
- { 0x18, 0xe, 0x1c },
- { 0x1c, 0xe, 0x1c },
- { 0x1c, 0xe, 0x18 },
- { 0x1c, 0xe, 0x15 },
- { 0x1c, 0xe, 0x11 },
- { 0x1c, 0xe, 0xe },
- { 0x1c, 0x11, 0xe },
- { 0x1c, 0x15, 0xe },
- { 0x1c, 0x18, 0xe },
- { 0x1c, 0x1c, 0xe },
- { 0x18, 0x1c, 0xe },
- { 0x15, 0x1c, 0xe },
- { 0x11, 0x1c, 0xe },
- { 0xe, 0x1c, 0xe },
- { 0xe, 0x1c, 0x11 },
- { 0xe, 0x1c, 0x15 },
- { 0xe, 0x1c, 0x18 },
- { 0xe, 0x1c, 0x1c },
- { 0xe, 0x18, 0x1c },
- { 0xe, 0x15, 0x1c },
- { 0xe, 0x11, 0x1c },
- { 0x14, 0x14, 0x1c },
- { 0x16, 0x14, 0x1c },
- { 0x18, 0x14, 0x1c },
- { 0x1a, 0x14, 0x1c },
- { 0x1c, 0x14, 0x1c },
- { 0x1c, 0x14, 0x1a },
- { 0x1c, 0x14, 0x18 },
- { 0x1c, 0x14, 0x16 },
- { 0x1c, 0x14, 0x14 },
- { 0x1c, 0x16, 0x14 },
- { 0x1c, 0x18, 0x14 },
- { 0x1c, 0x1a, 0x14 },
- { 0x1c, 0x1c, 0x14 },
- { 0x1a, 0x1c, 0x14 },
- { 0x18, 0x1c, 0x14 },
- { 0x16, 0x1c, 0x14 },
- { 0x14, 0x1c, 0x14 },
- { 0x14, 0x1c, 0x16 },
- { 0x14, 0x1c, 0x18 },
- { 0x14, 0x1c, 0x1a },
- { 0x14, 0x1c, 0x1c },
- { 0x14, 0x1a, 0x1c },
- { 0x14, 0x18, 0x1c },
- { 0x14, 0x16, 0x1c },
- { 0x0, 0x0, 0x10 },
- { 0x4, 0x0, 0x10 },
- { 0x8, 0x0, 0x10 },
- { 0xc, 0x0, 0x10 },
- { 0x10, 0x0, 0x10 },
- { 0x10, 0x0, 0xc },
- { 0x10, 0x0, 0x8 },
- { 0x10, 0x0, 0x4 },
- { 0x10, 0x0, 0x0 },
- { 0x10, 0x4, 0x0 },
- { 0x10, 0x8, 0x0 },
- { 0x10, 0xc, 0x0 },
- { 0x10, 0x10, 0x0 },
- { 0xc, 0x10, 0x0 },
- { 0x8, 0x10, 0x0 },
- { 0x4, 0x10, 0x0 },
- { 0x0, 0x10, 0x0 },
- { 0x0, 0x10, 0x4 },
- { 0x0, 0x10, 0x8 },
- { 0x0, 0x10, 0xc },
- { 0x0, 0x10, 0x10 },
- { 0x0, 0xc, 0x10 },
- { 0x0, 0x8, 0x10 },
- { 0x0, 0x4, 0x10 },
- { 0x8, 0x8, 0x10 },
- { 0xa, 0x8, 0x10 },
- { 0xc, 0x8, 0x10 },
- { 0xe, 0x8, 0x10 },
- { 0x10, 0x8, 0x10 },
- { 0x10, 0x8, 0xe },
- { 0x10, 0x8, 0xc },
- { 0x10, 0x8, 0xa },
- { 0x10, 0x8, 0x8 },
- { 0x10, 0xa, 0x8 },
- { 0x10, 0xc, 0x8 },
- { 0x10, 0xe, 0x8 },
- { 0x10, 0x10, 0x8 },
- { 0xe, 0x10, 0x8 },
- { 0xc, 0x10, 0x8 },
- { 0xa, 0x10, 0x8 },
- { 0x8, 0x10, 0x8 },
- { 0x8, 0x10, 0xa },
- { 0x8, 0x10, 0xc },
- { 0x8, 0x10, 0xe },
- { 0x8, 0x10, 0x10 },
- { 0x8, 0xe, 0x10 },
- { 0x8, 0xc, 0x10 },
- { 0x8, 0xa, 0x10 },
- { 0xb, 0xb, 0x10 },
- { 0xc, 0xb, 0x10 },
- { 0xd, 0xb, 0x10 },
- { 0xf, 0xb, 0x10 },
- { 0x10, 0xb, 0x10 },
- { 0x10, 0xb, 0xf },
- { 0x10, 0xb, 0xd },
- { 0x10, 0xb, 0xc },
- { 0x10, 0xb, 0xb },
- { 0x10, 0xc, 0xb },
- { 0x10, 0xd, 0xb },
- { 0x10, 0xf, 0xb },
- { 0x10, 0x10, 0xb },
- { 0xf, 0x10, 0xb },
- { 0xd, 0x10, 0xb },
- { 0xc, 0x10, 0xb },
- { 0xb, 0x10, 0xb },
- { 0xb, 0x10, 0xc },
- { 0xb, 0x10, 0xd },
- { 0xb, 0x10, 0xf },
- { 0xb, 0x10, 0x10 },
- { 0xb, 0xf, 0x10 },
- { 0xb, 0xd, 0x10 },
- { 0xb, 0xc, 0x10 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 }
-};
-
-unsigned char AC[21] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
- 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
- 0x0C, 0x00, 0x0F, 0x08, 0x00};
-
-static int scanPCI(int start_slt);
-static int PCIVendor(int);
-#ifdef DEBUG
-static void printslots(void);
-#endif
-extern void puthex(unsigned long);
-extern void puts(const char *);
-static void unlockS3(void);
-
-static inline void
-outw(int port, unsigned short val)
-{
- outb(port, val >> 8);
- outb(port+1, val);
-}
-
-int
-vga_init(unsigned char *ISA_mem)
-{
- int slot;
- struct VgaRegs *VgaTextRegs;
-
- /* See if VGA already in TEXT mode - exit if so! */
- outb(0x3CE, 0x06);
- if ((inb(0x3CF) & 0x01) == 0){
- puts("VGA already in text mode\n");
- return 0;
- }
-
- /* If no VGA responding in text mode, then we have some work to do...
- */
- slot = -1;
- while((slot = scanPCI(slot)) > -1) { /* find video card in use */
- unlockVideo(slot); /* enable I/O to card */
- VgaTextRegs = GenVgaTextRegs;
-
- switch (PCIVendor(slot)) {
- default:
- break;
- case(S3Vendor):
- unlockS3();
- break;
-
- case(CirrusVendor):
- outw(0x3C4, 0x0612); /* unlock ext regs */
- outw(0x3C4, 0x0700); /* reset ext sequence mode */
- break;
-
- case(ParadiseVendor): /* IBM Portable 850 */
- outw(0x3ce, 0x0f05); /* unlock pardise registers */
- outw(0x3c4, 0x0648);
- outw(0x3d4, 0x2985);
- outw(0x3d4, 0x34a6);
- outb(0x3ce, 0x0b); /* disable linear addressing */
- outb(0x3cf, inb(0x3cf) & ~0x30);
- outw(0x3c4, 0x1400);
- outb(0x3ce, 0x0e); /* disable 256 color mode */
- outb(0x3cf, inb(0x3cf) & ~0x01);
- outb(0xd00, 0xff); /* enable auto-centering */
- if (!(inb(0xd01) & 0x03)) {
- outb(0x3d4, 0x33);
- outb(0x3d5, inb(0x3d5) & ~0x90);
- outb(0x3d4, 0x32);
- outb(0x3d5, inb(0x3d5) | 0x04);
- outw(0x3d4, 0x0250);
- outw(0x3d4, 0x07ba);
- outw(0x3d4, 0x0900);
- outw(0x3d4, 0x15e7);
- outw(0x3d4, 0x2a95);
- }
- outw(0x3d4, 0x34a0);
- break;
-
- #if 0 /* Untested - probably doesn't work */
- case(MatroxVendor):
- case(DiamondVendor):
- puts("VGA Chip Vendor ID: ");
- puthex(PCIVendor(slot));
- puts("\n");
- mdelay(1000);
- #endif
- };
-
- outw(0x3C4, 0x0120); /* disable video */
- setTextRegs(VgaTextRegs); /* initial register setup */
- setTextCLUT(0); /* load color lookup table */
- loadFont(ISA_mem); /* load font */
- setTextRegs(VgaTextRegs); /* reload registers */
- outw(0x3C4, 0x0100); /* re-enable video */
- clearVideoMemory();
-
- if (PCIVendor(slot) == S3Vendor) {
- outb(0x3c2, 0x63); /* MISC */
- } /* endif */
-
- #ifdef DEBUG
- printslots();
- mdelay(5000);
- #endif
-
- mdelay(1000); /* give time for the video monitor to come up */
- }
- return (1); /* 'CRT' I/O supported */
-}
-
-/*
- * Write to VGA Attribute registers.
- */
-void
-writeAttr(unsigned char index, unsigned char data, unsigned char videoOn)
-{
- unsigned char v;
- v = inb(0x3da); /* reset attr. address toggle */
- if (videoOn)
- outb(0x3c0, (index & 0x1F) | 0x20);
- else
- outb(0x3c0, (index & 0x1F));
- outb(0x3c0, data);
-}
-
-void
-setTextRegs(struct VgaRegs *svp)
-{
- int i;
-
- /*
- * saved settings
- */
- while( svp->io_port != ENDMK ) {
- outb(svp->io_port, svp->io_index);
- outb(svp->io_port+1, svp->io_value);
- svp++;
- }
-
- outb(0x3c2, 0x67); /* MISC */
- outb(0x3c6, 0xff); /* MASK */
-
- for ( i = 0; i < 0x10; i++)
- writeAttr(i, AC[i], 0); /* palette */
- writeAttr(0x10, 0x0c, 0); /* text mode */
- writeAttr(0x11, 0x00, 0); /* overscan color (border) */
- writeAttr(0x12, 0x0f, 0); /* plane enable */
- writeAttr(0x13, 0x08, 0); /* pixel panning */
- writeAttr(0x14, 0x00, 1); /* color select; video on */
-}
-
-void
-setTextCLUT(int shift)
-{
- int i;
-
- outb(0x3C6, 0xFF);
- i = inb(0x3C7);
- outb(0x3C8, 0);
- i = inb(0x3C7);
-
- for ( i = 0; i < 256; i++) {
- outb(0x3C9, TextCLUT[i].r << shift);
- outb(0x3C9, TextCLUT[i].g << shift);
- outb(0x3C9, TextCLUT[i].b << shift);
- }
-}
-
-void
-loadFont(unsigned char *ISA_mem)
-{
- int i, j;
- unsigned char *font_page = (unsigned char *) &ISA_mem[0xA0000];
-
- outb(0x3C2, 0x67);
- /*
- * Load font
- */
- i = inb(0x3DA); /* Reset Attr toggle */
-
- outb(0x3C0,0x30);
- outb(0x3C0, 0x01); /* graphics mode */
-
- outw(0x3C4, 0x0001); /* reset sequencer */
- outw(0x3C4, 0x0204); /* write to plane 2 */
- outw(0x3C4, 0x0406); /* enable plane graphics */
- outw(0x3C4, 0x0003); /* reset sequencer */
- outw(0x3CE, 0x0402); /* read plane 2 */
- outw(0x3CE, 0x0500); /* write mode 0, read mode 0 */
- outw(0x3CE, 0x0605); /* set graphics mode */
-
- for (i = 0; i < sizeof(font); i += 16) {
- for (j = 0; j < 16; j++) {
- __asm__ volatile("eieio");
- font_page[(2*i)+j] = font[i+j];
- }
- }
-}
-
-static void
-unlockS3(void)
-{
- int s3_device_id;
- outw(0x3d4, 0x3848);
- outw(0x3d4, 0x39a5);
- outb(0x3d4, 0x2d);
- s3_device_id = inb(0x3d5) << 8;
- outb(0x3d4, 0x2e);
- s3_device_id |= inb(0x3d5);
-
- if (s3_device_id != 0x8812) {
- /* From the S3 manual */
- outb(0x46E8, 0x10); /* Put into setup mode */
- outb(0x3C3, 0x10);
- outb(0x102, 0x01); /* Enable registers */
- outb(0x46E8, 0x08); /* Enable video */
- outb(0x3C3, 0x08);
- outb(0x4AE8, 0x00);
-
-#if 0
- outb(0x42E8, 0x80); /* Reset graphics engine? */
-#endif
-
- outb(0x3D4, 0x38); /* Unlock all registers */
- outb(0x3D5, 0x48);
- outb(0x3D4, 0x39);
- outb(0x3D5, 0xA5);
- outb(0x3D4, 0x40);
- outb(0x3D5, inb(0x3D5)|0x01);
- outb(0x3D4, 0x33);
- outb(0x3D5, inb(0x3D5)&~0x52);
- outb(0x3D4, 0x35);
- outb(0x3D5, inb(0x3D5)&~0x30);
- outb(0x3D4, 0x3A);
- outb(0x3D5, 0x00);
- outb(0x3D4, 0x53);
- outb(0x3D5, 0x00);
- outb(0x3D4, 0x31);
- outb(0x3D5, inb(0x3D5)&~0x4B);
- outb(0x3D4, 0x58);
-
- outb(0x3D5, 0);
-
- outb(0x3D4, 0x54);
- outb(0x3D5, 0x38);
- outb(0x3D4, 0x60);
- outb(0x3D5, 0x07);
- outb(0x3D4, 0x61);
- outb(0x3D5, 0x80);
- outb(0x3D4, 0x62);
- outb(0x3D5, 0xA1);
- outb(0x3D4, 0x69); /* High order bits for cursor address */
- outb(0x3D5, 0);
-
- outb(0x3D4, 0x32);
- outb(0x3D5, inb(0x3D5)&~0x10);
- } else {
- outw(0x3c4, 0x0806); /* IBM Portable 860 */
- outw(0x3c4, 0x1041);
- outw(0x3c4, 0x1128);
- outw(0x3d4, 0x4000);
- outw(0x3d4, 0x3100);
- outw(0x3d4, 0x3a05);
- outw(0x3d4, 0x6688);
- outw(0x3d4, 0x5800); /* disable linear addressing */
- outw(0x3d4, 0x4500); /* disable H/W cursor */
- outw(0x3c4, 0x5410); /* enable auto-centering */
- outw(0x3c4, 0x561f);
- outw(0x3c4, 0x1b80); /* lock DCLK selection */
- outw(0x3d4, 0x3900); /* lock S3 registers */
- outw(0x3d4, 0x3800);
- } /* endif */
-}
-
-/*
- * cursor() sets an offset (0-1999) into the 80x25 text area.
- */
-void
-cursor(int x, int y)
-{
- int pos = (y*cols)+x;
- outb(0x3D4, 14);
- outb(0x3D5, pos >> 8);
- outb(0x3D4, 15);
- outb(0x3D5, pos);
-}
-
-void
-clearVideoMemory(void)
-{
- int i, j;
- for (i = 0; i < lines; i++) {
- for (j = 0; j < cols; j++) {
- vidmem[((i*cols)+j)*2] = 0x20; /* fill with space character */
- vidmem[((i*cols)+j)*2+1] = 0x07; /* set bg & fg attributes */
- }
- }
-}
-
-/* ============ */
-
-
-#define NSLOTS 8
-#define NPCIREGS 5
-
-
-/*
- should use devfunc number/indirect method to be totally safe on
- all machines, this works for now on 3 slot Moto boxes
-*/
-
-struct PCI_ConfigInfo {
- unsigned long * config_addr;
- unsigned long regs[NPCIREGS];
-} PCI_slots [NSLOTS] = {
-
- { (unsigned long *)0x80808000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80800800, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80801000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80802000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80804000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80810000, {0xDEADBEEF,} }, /* slot A/1 */
- { (unsigned long *)0x80820000, {0xDEADBEEF,} }, /* slot B/2 */
- { (unsigned long *)0x80840000, {0xDEADBEEF,} } /* slot C/3 */
-};
-
-
-
-/*
- * The following code modifies the PCI Command register
- * to enable memory and I/O accesses.
- */
-void
-unlockVideo(int slot)
-{
- volatile unsigned char * ppci;
-
- ppci = (unsigned char * )PCI_slots[slot].config_addr;
- ppci[4] = 0x0003; /* enable memory and I/O accesses */
- ppci[0x10] = 0x00000; /* turn off memory mapping */
- ppci[0x11] = 0x00000; /* mem_base = 0 */
- ppci[0x12] = 0x00000;
- ppci[0x13] = 0x00000;
- __asm__ volatile("eieio");
-
- outb(0x3d4, 0x11);
- outb(0x3d5, 0x0e); /* unlock CR0-CR7 */
-}
-
-long
-SwapBytes(long lv) /* turn little endian into big indian long */
-{
- long t;
- t = (lv&0x000000FF) << 24;
- t |= (lv&0x0000FF00) << 8;
- t |= (lv&0x00FF0000) >> 8;
- t |= (lv&0xFF000000) >> 24;
- return(t);
-}
-
-
-#define DEVID 0
-#define CMD 1
-#define CLASS 2
-#define MEMBASE 4
-
-int
-scanPCI(int start_slt)
-{
- int slt, r;
- struct PCI_ConfigInfo *pslot;
- int theSlot = -1;
- int highVgaSlot = 0;
-
- for ( slt = start_slt + 1; slt < NSLOTS; slt++) {
- pslot = &PCI_slots[slt];
- for ( r = 0; r < NPCIREGS; r++) {
- pslot->regs[r] = SwapBytes ( pslot->config_addr[r] );
- }
- /* card in slot ? */
- if ( pslot->regs[DEVID] != 0xFFFFFFFF ) {
- /* VGA ? */
- if ( ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x03000000) ||
- ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x00010000)) {
- highVgaSlot = slt;
- /* did firmware enable it ? */
- if ( (pslot->regs[CMD] & 0x03) ) {
- theSlot = slt;
- break;
- }
- }
- }
- }
-
- return ( theSlot );
-}
-
-/* return Vendor ID of card in the slot */
-static
-int PCIVendor(int slotnum) {
- struct PCI_ConfigInfo *pslot;
-
- pslot = &PCI_slots[slotnum];
-
-return (pslot->regs[DEVID] & 0xFFFF);
-}
-
-#ifdef DEBUG
-static
-void printslots(void)
-{
- int i;
-#if 0
- struct PCI_ConfigInfo *pslot;
-#endif
- for(i=0; i < NSLOTS; i++) {
-#if 0
- pslot = &PCI_slots[i];
- printf("Slot: %d, Addr: %x, Vendor: %08x, Class: %08x\n",
- i, pslot->config_addr, pslot->regs[0], pslot->regs[2]);
-#else
- puts("PCI Slot number: "); puthex(i);
- puts(" Vendor ID: ");
- puthex(PCIVendor(i)); puts("\n");
-#endif
- }
-}
-#endif /* DEBUG */
diff --git a/arch/ppc/boot/of1275/Makefile b/arch/ppc/boot/of1275/Makefile
deleted file mode 100644
index 0b979c004972..000000000000
--- a/arch/ppc/boot/of1275/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile of1275 stuff
-#
-
-lib-y := claim.o enter.o exit.o finddevice.o getprop.o ofinit.o \
- ofstdio.o read.o release.o write.o map.o call_prom.o
diff --git a/arch/ppc/boot/of1275/call_prom.c b/arch/ppc/boot/of1275/call_prom.c
deleted file mode 100644
index 9479a3a2b8c7..000000000000
--- a/arch/ppc/boot/of1275/call_prom.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 1996-2005 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include <stdarg.h>
-
-int call_prom(const char *service, int nargs, int nret, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, nret);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (of_prom_entry(&args) < 0)
- return -1;
-
- return (nret > 0)? args.args[nargs]: 0;
-}
-
-int call_prom_ret(const char *service, int nargs, int nret,
- unsigned int *rets, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, rets);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (of_prom_entry(&args) < 0)
- return -1;
-
- if (rets != (void *) 0)
- for (i = 1; i < nret; ++i)
- rets[i-1] = args.args[nargs+i];
-
- return (nret > 0)? args.args[nargs]: 0;
-}
diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c
deleted file mode 100644
index 1ed3aeeff8ae..000000000000
--- a/arch/ppc/boot/of1275/claim.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include "nonstdio.h"
-
-/*
- * Older OF's require that when claiming a specific range of addresses,
- * we claim the physical space in the /memory node and the virtual
- * space in the chosen mmu node, and then do a map operation to
- * map virtual to physical.
- */
-static int need_map = -1;
-static ihandle chosen_mmu;
-static phandle memory;
-
-/* returns true if s2 is a prefix of s1 */
-static int string_match(const char *s1, const char *s2)
-{
- for (; *s2; ++s2)
- if (*s1++ != *s2)
- return 0;
- return 1;
-}
-
-static int check_of_version(void)
-{
- phandle oprom, chosen;
- char version[64];
-
- oprom = finddevice("/openprom");
- if (oprom == OF_INVALID_HANDLE)
- return 0;
- if (getprop(oprom, "model", version, sizeof(version)) <= 0)
- return 0;
- version[sizeof(version)-1] = 0;
- printf("OF version = '%s'\n", version);
- if (!string_match(version, "Open Firmware, 1.")
- && !string_match(version, "FirmWorks,3."))
- return 0;
- chosen = finddevice("/chosen");
- if (chosen == OF_INVALID_HANDLE) {
- chosen = finddevice("/chosen@0");
- if (chosen == OF_INVALID_HANDLE) {
- printf("no chosen\n");
- return 0;
- }
- }
- if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) {
- printf("no mmu\n");
- return 0;
- }
- memory = (ihandle) call_prom("open", 1, 1, "/memory");
- if (memory == OF_INVALID_HANDLE) {
- memory = (ihandle) call_prom("open", 1, 1, "/memory@0");
- if (memory == OF_INVALID_HANDLE) {
- printf("no memory node\n");
- return 0;
- }
- }
- printf("old OF detected\n");
- return 1;
-}
-
-void *claim(unsigned int virt, unsigned int size, unsigned int align)
-{
- int ret;
- unsigned int result;
-
- if (need_map < 0)
- need_map = check_of_version();
- if (align || !need_map)
- return (void *) call_prom("claim", 3, 1, virt, size, align);
-
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory,
- align, size, virt);
- if (ret != 0 || result == -1)
- return (void *) -1;
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu,
- align, size, virt);
- /* 0x12 == coherent + read/write */
- ret = call_prom("call-method", 6, 1, "map", chosen_mmu,
- 0x12, size, virt, virt);
- return virt;
-}
diff --git a/arch/ppc/boot/of1275/enter.c b/arch/ppc/boot/of1275/enter.c
deleted file mode 100644
index abe87a8fe2db..000000000000
--- a/arch/ppc/boot/of1275/enter.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-enter(void)
-{
- struct prom_args {
- char *service;
- } args;
-
- args.service = "enter";
- (*of_prom_entry)(&args);
-}
diff --git a/arch/ppc/boot/of1275/exit.c b/arch/ppc/boot/of1275/exit.c
deleted file mode 100644
index b9f89b6a8b45..000000000000
--- a/arch/ppc/boot/of1275/exit.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-exit(void)
-{
- struct prom_args {
- char *service;
- } args;
-
- for (;;) {
- args.service = "exit";
- (*of_prom_entry)(&args);
- }
-}
diff --git a/arch/ppc/boot/of1275/finddevice.c b/arch/ppc/boot/of1275/finddevice.c
deleted file mode 100644
index 0dcb1201b772..000000000000
--- a/arch/ppc/boot/of1275/finddevice.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-phandle finddevice(const char *name)
-{
- return (phandle) call_prom("finddevice", 1, 1, name);
-}
diff --git a/arch/ppc/boot/of1275/getprop.c b/arch/ppc/boot/of1275/getprop.c
deleted file mode 100644
index 0cf75f035e4e..000000000000
--- a/arch/ppc/boot/of1275/getprop.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-getprop(phandle node, const char *name, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- phandle node;
- const char *name;
- void *buf;
- int buflen;
- int size;
- } args;
-
- args.service = "getprop";
- args.nargs = 4;
- args.nret = 1;
- args.node = node;
- args.name = name;
- args.buf = buf;
- args.buflen = buflen;
- args.size = -1;
- (*of_prom_entry)(&args);
- return args.size;
-}
diff --git a/arch/ppc/boot/of1275/map.c b/arch/ppc/boot/of1275/map.c
deleted file mode 100644
index 443256c6f6d6..000000000000
--- a/arch/ppc/boot/of1275/map.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include "nonstdio.h"
-
-extern ihandle of_prom_mmu;
-
-int
-map(unsigned int phys, unsigned int virt, unsigned int size)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- char *method;
- ihandle mmu_ihandle;
- int misc;
- unsigned int size;
- unsigned int virt;
- unsigned int phys;
- int ret0;
- } args;
-
- if (of_prom_mmu == 0) {
- printf("map() called, no MMU found\n");
- return -1;
- }
- args.service = "call-method";
- args.nargs = 6;
- args.nret = 1;
- args.method = "map";
- args.mmu_ihandle = of_prom_mmu;
- args.misc = 0;
- args.phys = phys;
- args.virt = virt;
- args.size = size;
- (*of_prom_entry)(&args);
-
- return (int)args.ret0;
-}
diff --git a/arch/ppc/boot/of1275/ofinit.c b/arch/ppc/boot/of1275/ofinit.c
deleted file mode 100644
index 0ee8af7639e9..000000000000
--- a/arch/ppc/boot/of1275/ofinit.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-prom_entry of_prom_entry;
-ihandle of_prom_mmu;
-
-void
-ofinit(prom_entry prom_ptr)
-{
- phandle chosen;
-
- of_prom_entry = prom_ptr;
-
- if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE)
- return;
- if (getprop(chosen, "mmu", &of_prom_mmu, sizeof(ihandle)) != 4)
- return;
-}
diff --git a/arch/ppc/boot/of1275/ofstdio.c b/arch/ppc/boot/of1275/ofstdio.c
deleted file mode 100644
index 10abbe32b31f..000000000000
--- a/arch/ppc/boot/of1275/ofstdio.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr)
-{
- ihandle in, out;
- phandle chosen;
-
- if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE)
- goto err;
- if (getprop(chosen, "stdout", &out, sizeof(out)) != 4)
- goto err;
- if (getprop(chosen, "stdin", &in, sizeof(in)) != 4)
- goto err;
-
- *stdin = in;
- *stdout = out;
- *stderr = out;
- return 0;
-err:
- return -1;
-}
diff --git a/arch/ppc/boot/of1275/read.c b/arch/ppc/boot/of1275/read.c
deleted file mode 100644
index 122813649fce..000000000000
--- a/arch/ppc/boot/of1275/read.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-read(ihandle instance, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- ihandle instance;
- void *buf;
- int buflen;
- int actual;
- } args;
-
- args.service = "read";
- args.nargs = 3;
- args.nret = 1;
- args.instance = instance;
- args.buf = buf;
- args.buflen = buflen;
- args.actual = -1;
- (*of_prom_entry)(&args);
- return args.actual;
-}
diff --git a/arch/ppc/boot/of1275/release.c b/arch/ppc/boot/of1275/release.c
deleted file mode 100644
index 28032d37145d..000000000000
--- a/arch/ppc/boot/of1275/release.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-release(void *virt, unsigned int size)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- void *virt;
- unsigned int size;
- } args;
-
- args.service = "release";
- args.nargs = 2;
- args.nret = 0;
- args.virt = virt;
- args.size = size;
- (*of_prom_entry)(&args);
-}
diff --git a/arch/ppc/boot/of1275/write.c b/arch/ppc/boot/of1275/write.c
deleted file mode 100644
index 7361b9b2fca5..000000000000
--- a/arch/ppc/boot/of1275/write.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-write(ihandle instance, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- ihandle instance;
- void *buf;
- int buflen;
- int actual;
- } args;
-
- args.service = "write";
- args.nargs = 3;
- args.nret = 1;
- args.instance = instance;
- args.buf = buf;
- args.buflen = buflen;
- args.actual = -1;
- (*of_prom_entry)(&args);
- return args.actual;
-}
diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
deleted file mode 100644
index 5b877792d14f..000000000000
--- a/arch/ppc/boot/simple/Makefile
+++ /dev/null
@@ -1,277 +0,0 @@
-# This is far from simple, but I couldn't think of a good name. This is
-# for making the 'zImage' or 'zImage.initrd' on a number of targets.
-#
-# Author: Tom Rini <trini@mvista.com>
-#
-# Notes:
-# (1) For machines that do not want to use the ELF image directly (including
-# stripping just the ELF header off), they must set the variables
-# zimage-$(CONFIG_MACHINE) and zimagerd-$(CONFIG_MACHINE) to the target
-# that produces the desired image and they must set end-$(CONFIG_MACHINE)
-# to what will be suffixed to the image filename.
-# (2) Regardless of (1), to have the resulting image be something other
-# than 'zImage.elf', set end-$(CONFIG_MACHINE) to be the suffix used for
-# the zImage, znetboot, and znetbootrd targets.
-# (3) For machine targets which use the mktree program, you can optionally
-# set entrypoint-$(CONFIG_MACHINE) to the location which the image should be
-# loaded at. The optimal setting for entrypoint-$(CONFIG_MACHINE) is the link
-# address.
-# (4) It is advisable to pass in the memory size using BI_MEMSIZE and
-# get_mem_size(), which is memory controller dependent. Add in the correct
-# XXX_memory.o file for this to work, as well as editing the
-# misc-$(CONFIG_MACHINE) variable.
-
-boot := arch/ppc/boot
-common := $(boot)/common
-utils := $(boot)/utils
-bootlib := $(boot)/lib
-images := $(boot)/images
-of1275 := $(boot)/of1275
-tftpboot := /tftpboot
-
-# Normally, we use the 'misc.c' file for decompress_kernel and
-# whatnot. Sometimes we need to override this however.
-misc-y := misc.o
-
-# Normally, we have our images end in .elf, but something we want to
-# change this.
-end-y := elf
-
-# Additionally, we normally don't need to mess with the L2 / L3 caches
-# if present on 'classic' PPC.
-cacheflag-y := -DCLEAR_CACHES=""
-# This file will flush / disable the L2, and L3 if present.
-clear_L2_L3 := $(srctree)/$(boot)/simple/clear.S
-
-#
-# See arch/ppc/kconfig and arch/ppc/platforms/Kconfig
-# for definition of what platform each config option refer to.
-#----------------------------------------------------------------------------
- zimage-$(CONFIG_CPCI690) := zImage-STRIPELF
-zimageinitrd-$(CONFIG_CPCI690) := zImage.initrd-STRIPELF
- extra.o-$(CONFIG_CPCI690) := misc-cpci690.o
- end-$(CONFIG_CPCI690) := cpci690
- cacheflag-$(CONFIG_CPCI690) := -include $(clear_L2_L3)
-
- zimage-$(CONFIG_IBM_OPENBIOS) := zImage-TREE
-zimageinitrd-$(CONFIG_IBM_OPENBIOS) := zImage.initrd-TREE
- end-$(CONFIG_IBM_OPENBIOS) := treeboot
- misc-$(CONFIG_IBM_OPENBIOS) := misc-embedded.o
-
- end-$(CONFIG_EMBEDDEDBOOT) := embedded
- misc-$(CONFIG_EMBEDDEDBOOT) := misc-embedded.o
-
- zimage-$(CONFIG_BAMBOO) := zImage-TREE
-zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE
- end-$(CONFIG_BAMBOO) := bamboo
- entrypoint-$(CONFIG_BAMBOO) := 0x01000000
- extra.o-$(CONFIG_BAMBOO) := pibs.o
-
- zimage-$(CONFIG_BUBINGA) := zImage-TREE
-zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE
- end-$(CONFIG_BUBINGA) := bubinga
- entrypoint-$(CONFIG_BUBINGA) := 0x01000000
- extra.o-$(CONFIG_BUBINGA) := openbios.o
-
- zimage-$(CONFIG_EBONY) := zImage-TREE
-zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE
- end-$(CONFIG_EBONY) := ebony
- entrypoint-$(CONFIG_EBONY) := 0x01000000
- extra.o-$(CONFIG_EBONY) := openbios.o
-
- zimage-$(CONFIG_LUAN) := zImage-TREE
-zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE
- end-$(CONFIG_LUAN) := luan
- entrypoint-$(CONFIG_LUAN) := 0x01000000
- extra.o-$(CONFIG_LUAN) := pibs.o
-
- zimage-$(CONFIG_YUCCA) := zImage-TREE
-zimageinitrd-$(CONFIG_YUCCA) := zImage.initrd-TREE
- end-$(CONFIG_YUCCA) := yucca
- entrypoint-$(CONFIG_YUCCA) := 0x01000000
- extra.o-$(CONFIG_YUCCA) := pibs.o
-
- zimage-$(CONFIG_OCOTEA) := zImage-TREE
-zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
- end-$(CONFIG_OCOTEA) := ocotea
- entrypoint-$(CONFIG_OCOTEA) := 0x01000000
- extra.o-$(CONFIG_OCOTEA) := pibs.o
-
- zimage-$(CONFIG_SYCAMORE) := zImage-TREE
-zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE
- end-$(CONFIG_SYCAMORE) := sycamore
- entrypoint-$(CONFIG_SYCAMORE) := 0x01000000
- extra.o-$(CONFIG_SYCAMORE) := openbios.o
-
- zimage-$(CONFIG_WALNUT) := zImage-TREE
-zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE
- end-$(CONFIG_WALNUT) := walnut
- entrypoint-$(CONFIG_WALNUT) := 0x01000000
- extra.o-$(CONFIG_WALNUT) := openbios.o
-
- extra.o-$(CONFIG_EV64260) := misc-ev64260.o
- end-$(CONFIG_EV64260) := ev64260
- cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_CHESTNUT) := misc-chestnut.o
- end-$(CONFIG_CHESTNUT) := chestnut
-
- extra.o-$(CONFIG_KATANA) := misc-katana.o
- end-$(CONFIG_KATANA) := katana
- cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_RADSTONE_PPC7D) := misc-radstone_ppc7d.o
- end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d
- cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_EV64360) := misc-ev64360.o
- end-$(CONFIG_EV64360) := ev64360
- cacheflag-$(CONFIG_EV64360) := -include $(clear_L2_L3)
-
-# kconfig 'feature', only one of these will ever be 'y' at a time.
-# The rest will be unset.
-motorola := $(CONFIG_MVME5100)$(CONFIG_PRPMC750) \
-$(CONFIG_PRPMC800)$(CONFIG_LOPEC)$(CONFIG_PPLUS)
-motorola := $(strip $(motorola))
-
- zimage-$(motorola) := zImage-PPLUS
-zimageinitrd-$(motorola) := zImage.initrd-PPLUS
- end-$(motorola) := pplus
-
-# Overrides previous assingment
- extra.o-$(CONFIG_PPLUS) := prepmap.o
- extra.o-$(CONFIG_LOPEC) := mpc10x_memory.o
-
-# Really only valid if CONFIG_6xx=y
- zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS
-zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS
-ifeq ($(CONFIG_6xx),y)
- extra.o-$(CONFIG_PPC_PREP) := prepmap.o
- misc-$(CONFIG_PPC_PREP) += misc-prep.o mpc10x_memory.o
-endif
- end-$(CONFIG_PPC_PREP) := prep
-
- end-$(CONFIG_SANDPOINT) := sandpoint
- cacheflag-$(CONFIG_SANDPOINT) := -include $(clear_L2_L3)
-
- zimage-$(CONFIG_SPRUCE) := zImage-TREE
-zimageinitrd-$(CONFIG_SPRUCE) := zImage.initrd-TREE
- end-$(CONFIG_SPRUCE) := spruce
- entrypoint-$(CONFIG_SPRUCE) := 0x00800000
- misc-$(CONFIG_SPRUCE) += misc-spruce.o
-
- zimage-$(CONFIG_LITE5200) := zImage-STRIPELF
-zimageinitrd-$(CONFIG_LITE5200) := zImage.initrd-STRIPELF
- end-$(CONFIG_LITE5200) := lite5200
- cacheflag-$(CONFIG_LITE5200) := -include $(clear_L2_L3)
-
-
-# SMP images should have a '.smp' suffix.
- end-$(CONFIG_SMP) := $(end-y).smp
-
-# This is a treeboot that needs init functions until the
-# boot rom is sorted out (i.e. this is short lived)
-EXTRA_AFLAGS := $(extra-aflags-y)
-# head.o needs to get the cacheflags defined.
-AFLAGS_head.o += $(cacheflag-y)
-
-# Linker args. This specifies where the image will be run at.
-LD_ARGS := -T $(srctree)/$(boot)/ld.script \
- -Ttext $(CONFIG_BOOT_LOAD) -Bstatic
-OBJCOPY_ARGS := -O elf32-powerpc
-
-# head.o and relocate.o must be at the start.
-boot-y := head.o relocate.o $(extra.o-y) $(misc-y)
-boot-$(CONFIG_REDWOOD_5) += embed_config.o
-boot-$(CONFIG_REDWOOD_6) += embed_config.o
-boot-$(CONFIG_8xx) += embed_config.o
-boot-$(CONFIG_8260) += embed_config.o
-boot-$(CONFIG_EP405) += embed_config.o
-boot-$(CONFIG_XILINX_ML300) += embed_config.o
-boot-$(CONFIG_XILINX_ML403) += embed_config.o
-boot-$(CONFIG_BSEIP) += iic.o
-boot-$(CONFIG_MBX) += iic.o pci.o qspan_pci.o
-boot-$(CONFIG_MV64X60) += misc-mv64x60.o
-boot-$(CONFIG_RPXCLASSIC) += iic.o pci.o qspan_pci.o
-boot-$(CONFIG_RPXLITE) += iic.o
-# Different boards need different serial implementations.
-ifeq ($(CONFIG_SERIAL_CPM_CONSOLE),y)
-boot-$(CONFIG_8xx) += m8xx_tty.o
-boot-$(CONFIG_8260) += m8260_tty.o
-endif
-boot-$(CONFIG_SERIAL_MPC52xx_CONSOLE) += mpc52xx_tty.o
-boot-$(CONFIG_SERIAL_MPSC_CONSOLE) += mv64x60_tty.o
-boot-$(CONFIG_SERIAL_UARTLITE_CONSOLE) += uartlite_tty.o
-
-LIBS := $(common)/lib.a $(bootlib)/lib.a
-ifeq ($(CONFIG_PPC_PREP),y)
-LIBS += $(of1275)/lib.a
-endif
-
-OBJS := $(addprefix $(obj)/,$(boot-y))
-
-# Tools
-MKBUGBOOT := $(utils)/mkbugboot
-MKPREP := $(utils)/mkprep
-MKTREE := $(utils)/mktree
-
-targets := dummy.o
-
-$(obj)/zvmlinux: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \
- $(images)/vmlinux.gz $(obj)/dummy.o
- $(OBJCOPY) $(OBJCOPY_ARGS) \
- --add-section=.image=$(images)/vmlinux.gz \
- --set-section-flags=.image=contents,alloc,load,readonly,data \
- $(obj)/dummy.o $(obj)/image.o
- $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
- $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr -R .ramdisk
-
-$(obj)/zvmlinux.initrd: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \
- $(images)/vmlinux.gz $(obj)/dummy.o
- $(OBJCOPY) $(OBJCOPY_ARGS) \
- --add-section=.ramdisk=$(images)/ramdisk.image.gz \
- --set-section-flags=.ramdisk=contents,alloc,load,readonly,data \
- --add-section=.image=$(images)/vmlinux.gz \
- --set-section-flags=.image=contents,alloc,load,readonly,data \
- $(obj)/dummy.o $(obj)/image.o
- $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
- $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr
-
-# Sort-of dummy rules, that let us format the image we want.
-zImage: $(images)/$(zimage-y) $(obj)/zvmlinux
- cp -f $(obj)/zvmlinux $(images)/zImage.elf
- rm -f $(obj)/zvmlinux
-
-zImage.initrd: $(images)/$(zimageinitrd-y) $(obj)/zvmlinux.initrd
- cp -f $(obj)/zvmlinux.initrd $(images)/zImage.initrd.elf
- rm -f $(obj)/zvmlinux.initrd
-
-znetboot: zImage
- cp $(images)/zImage.$(end-y) $(tftpboot)/zImage.$(end-y)
-
-znetboot.initrd: zImage.initrd
- cp $(images)/zImage.initrd.$(end-y) $(tftpboot)/zImage.initrd.$(end-y)
-
-$(images)/zImage-STRIPELF: $(obj)/zvmlinux
- dd if=$(obj)/zvmlinux of=$(images)/zImage.$(end-y) skip=64 bs=1k
-
-$(images)/zImage.initrd-STRIPELF: $(obj)/zvmlinux.initrd
- dd if=$(obj)/zvmlinux.initrd of=$(images)/zImage.initrd.$(end-y) \
- skip=64 bs=1k
-
-$(images)/zImage-TREE: $(obj)/zvmlinux $(MKTREE)
- $(MKTREE) $(obj)/zvmlinux $(images)/zImage.$(end-y) $(entrypoint-y)
-
-$(images)/zImage.initrd-TREE: $(obj)/zvmlinux.initrd $(MKTREE)
- $(MKTREE) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y) \
- $(entrypoint-y)
-
-$(images)/zImage-PPLUS: $(obj)/zvmlinux $(MKPREP) $(MKBUGBOOT)
- $(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.$(end-y)
- $(MKBUGBOOT) $(obj)/zvmlinux $(images)/zImage.bugboot
-
-$(images)/zImage.initrd-PPLUS: $(obj)/zvmlinux.initrd $(MKPREP) $(MKBUGBOOT)
- $(MKPREP) -pbp $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y)
- $(MKBUGBOOT) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.bugboot
diff --git a/arch/ppc/boot/simple/chrpmap.c b/arch/ppc/boot/simple/chrpmap.c
deleted file mode 100644
index 14d9e05d98bb..000000000000
--- a/arch/ppc/boot/simple/chrpmap.c
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * 2004 (C) IBM. This file is licensed under the terms of the GNU General
- * Public License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <nonstdio.h>
-
-void board_isa_init(void)
-{
- ISA_init(0xFE000000);
-}
diff --git a/arch/ppc/boot/simple/clear.S b/arch/ppc/boot/simple/clear.S
deleted file mode 100644
index 95c5647a0f51..000000000000
--- a/arch/ppc/boot/simple/clear.S
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Code to call _setup_L2CR to flus, invalidate and disable the L2,
- * and if present, do the same to the L3.
- */
-
-#define CLEAR_CACHES \
- bl _setup_L2CR; \
- \
- /* If 745x, turn off L3CR as well */ \
- mfspr r8,SPRN_PVR; \
- srwi r8,r8,16; \
- \
- cmpli cr0,r8,0x8000; /* 7450 */ \
- cmpli cr1,r8,0x8001; /* 7455 */ \
- cmpli cr2,r8,0x8002; /* 7457 */ \
- /* Now test if any are true. */ \
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq; \
- cror 4*cr0+eq,4*cr0+eq,4*cr2+eq; \
- beql _setup_L3CR
diff --git a/arch/ppc/boot/simple/cpc700_memory.c b/arch/ppc/boot/simple/cpc700_memory.c
deleted file mode 100644
index d75420a45a59..000000000000
--- a/arch/ppc/boot/simple/cpc700_memory.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Find memory based upon settings in the CPC700 bridge
- *
- * Author: Dan Cox
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include "cpc700.h"
-
-unsigned long
-cpc700_get_mem_size(void)
-{
- int i;
- unsigned long len, amt;
-
- /* Start at MB1EA, since MB0EA will most likely be the ending address
- for ROM space. */
- for(len = 0, i = CPC700_MB1EA; i <= CPC700_MB4EA; i+=4) {
- amt = cpc700_read_memreg(i);
- if (amt == 0)
- break;
- len = amt;
- }
-
- return len;
-}
-
-
diff --git a/arch/ppc/boot/simple/dummy.c b/arch/ppc/boot/simple/dummy.c
deleted file mode 100644
index 31dbf45bf99c..000000000000
--- a/arch/ppc/boot/simple/dummy.c
+++ /dev/null
@@ -1,4 +0,0 @@
-int main(void)
-{
- return 0;
-}
diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c
deleted file mode 100644
index 3b46792d7b8b..000000000000
--- a/arch/ppc/boot/simple/embed_config.c
+++ /dev/null
@@ -1,938 +0,0 @@
-/* Board specific functions for those embedded 8xx boards that do
- * not have boot monitor support for board information.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/reg.h>
-#ifdef CONFIG_8xx
-#include <asm/mpc8xx.h>
-#endif
-#ifdef CONFIG_8260
-#include <asm/mpc8260.h>
-#include <asm/immap_cpm2.h>
-#endif
-#ifdef CONFIG_40x
-#include <asm/io.h>
-#endif
-#ifdef CONFIG_XILINX_VIRTEX
-#include <platforms/4xx/xparameters/xparameters.h>
-#endif
-extern unsigned long timebase_period_ns;
-
-/* For those boards that don't provide one.
-*/
-#if !defined(CONFIG_MBX)
-static bd_t bdinfo;
-#endif
-
-/* IIC functions.
- * These are just the basic master read/write operations so we can
- * examine serial EEPROM.
- */
-extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
-
-/* Supply a default Ethernet address for those eval boards that don't
- * ship with one. This is an address from the MBX board I have, so
- * it is unlikely you will find it on your network.
- */
-static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
-
-#if defined(CONFIG_MBX)
-
-/* The MBX hands us a pretty much ready to go board descriptor. This
- * is where the idea started in the first place.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *mp;
- u_char eebuf[128];
- int i = 8;
- bd_t *bd;
-
- bd = *bdp;
-
- /* Read the first 128 bytes of the EEPROM. There is more,
- * but this is all we need.
- */
- iic_read(0xa4, eebuf, 0, 128);
-
- /* All we are looking for is the Ethernet MAC address. The
- * first 8 bytes are 'MOTOROLA', so check for part of that.
- * Next, the VPD describes a MAC 'packet' as being of type 08
- * and size 06. So we look for that and the MAC must follow.
- * If there are more than one, we still only care about the first.
- * If it's there, assume we have a valid MAC address. If not,
- * grab our default one.
- */
- if ((*(uint *)eebuf) == 0x4d4f544f) {
- while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
- i += eebuf[i + 1] + 2; /* skip this packet */
-
- if (i == 127) /* Couldn't find. */
- mp = (u_char *)def_enet_addr;
- else
- mp = &eebuf[i + 2];
- }
- else
- mp = (u_char *)def_enet_addr;
-
- for (i=0; i<6; i++)
- bd->bi_enetaddr[i] = *mp++;
-
- /* The boot rom passes these to us in MHz. Linux now expects
- * them to be in Hz.
- */
- bd->bi_intfreq *= 1000000;
- bd->bi_busfreq *= 1000000;
-
- /* Stuff a baud rate here as well.
- */
- bd->bi_baudrate = 9600;
-}
-#endif /* CONFIG_MBX */
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
- defined(CONFIG_RPX8260) || defined(CONFIG_EP405)
-/* Helper functions for Embedded Planet boards.
-*/
-/* Because I didn't find anything that would do this.......
-*/
-u_char
-aschex_to_byte(u_char *cp)
-{
- u_char byte, c;
-
- c = *cp++;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else
- c -= '0';
-
- byte = c * 16;
-
- c = *cp;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else
- c -= '0';
-
- byte += c;
-
- return(byte);
-}
-
-static void
-rpx_eth(bd_t *bd, u_char *cp)
-{
- int i;
-
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = aschex_to_byte(cp);
- cp += 2;
- }
-}
-
-#ifdef CONFIG_RPX8260
-static uint
-rpx_baseten(u_char *cp)
-{
- uint retval;
-
- retval = 0;
-
- while (*cp != '\n') {
- retval *= 10;
- retval += (*cp) - '0';
- cp++;
- }
- return(retval);
-}
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
-static void
-rpx_brate(bd_t *bd, u_char *cp)
-{
- uint rate;
-
- rate = 0;
-
- while (*cp != '\n') {
- rate *= 10;
- rate += (*cp) - '0';
- cp++;
- }
-
- bd->bi_baudrate = rate * 100;
-}
-
-static void
-rpx_cpuspeed(bd_t *bd, u_char *cp)
-{
- uint num, den;
-
- num = den = 0;
-
- while (*cp != '\n') {
- num *= 10;
- num += (*cp) - '0';
- cp++;
- if (*cp == '/') {
- cp++;
- den = (*cp) - '0';
- break;
- }
- }
-
- /* I don't know why the RPX just can't state the actual
- * CPU speed.....
- */
- if (den) {
- num /= den;
- num *= den;
- }
- bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
-
- /* The 8xx can only run a maximum 50 MHz bus speed (until
- * Motorola changes this :-). Greater than 50 MHz parts
- * run internal/2 for bus speed.
- */
- if (num > 50)
- bd->bi_busfreq /= 2;
-}
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
-static void
-rpx_memsize(bd_t *bd, u_char *cp)
-{
- uint size;
-
- size = 0;
-
- while (*cp != '\n') {
- size *= 10;
- size += (*cp) - '0';
- cp++;
- }
-
- bd->bi_memsize = size * 1024 * 1024;
-}
-#endif /* LITE || CLASSIC || EP405 */
-#if defined(CONFIG_EP405)
-static void
-rpx_nvramsize(bd_t *bd, u_char *cp)
-{
- uint size;
-
- size = 0;
-
- while (*cp != '\n') {
- size *= 10;
- size += (*cp) - '0';
- cp++;
- }
-
- bd->bi_nvramsize = size * 1024;
-}
-#endif /* CONFIG_EP405 */
-
-#endif /* Embedded Planet boards */
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
-
-/* Read the EEPROM on the RPX-Lite board.
-*/
-void
-embed_config(bd_t **bdp)
-{
- u_char eebuf[256], *cp;
- bd_t *bd;
-
- /* Read the first 256 bytes of the EEPROM. I think this
- * is really all there is, and I hope if it gets bigger the
- * info we want is still up front.
- */
- bd = &bdinfo;
- *bdp = bd;
-
-#if 1
- iic_read(0xa8, eebuf, 0, 128);
- iic_read(0xa8, &eebuf[128], 128, 128);
-
- /* We look for two things, the Ethernet address and the
- * serial baud rate. The records are separated by
- * newlines.
- */
- cp = eebuf;
- for (;;) {
- if (*cp == 'E') {
- cp++;
- if (*cp == 'A') {
- cp += 2;
- rpx_eth(bd, cp);
- }
- }
- if (*cp == 'S') {
- cp++;
- if (*cp == 'B') {
- cp += 2;
- rpx_brate(bd, cp);
- }
- }
- if (*cp == 'D') {
- cp++;
- if (*cp == '1') {
- cp += 2;
- rpx_memsize(bd, cp);
- }
- }
- if (*cp == 'H') {
- cp++;
- if (*cp == 'Z') {
- cp += 2;
- rpx_cpuspeed(bd, cp);
- }
- }
-
- /* Scan to the end of the record.
- */
- while ((*cp != '\n') && (*cp != 0xff))
- cp++;
-
- /* If the next character is a 0 or ff, we are done.
- */
- cp++;
- if ((*cp == 0) || (*cp == 0xff))
- break;
- }
- bd->bi_memstart = 0;
-#else
- /* For boards without initialized EEPROM.
- */
- bd->bi_memstart = 0;
- bd->bi_memsize = (8 * 1024 * 1024);
- bd->bi_intfreq = 48000000;
- bd->bi_busfreq = 48000000;
- bd->bi_baudrate = 9600;
-#endif
-}
-#endif /* RPXLITE || RPXCLASSIC */
-
-#ifdef CONFIG_BSEIP
-/* Build a board information structure for the BSE ip-Engine.
- * There is more to come since we will add some environment
- * variables and a function to read them.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* Baud rate and processor speed will eventually come
- * from the environment variables.
- */
- bd->bi_baudrate = 9600;
-
- /* Get the Ethernet station address from the Flash ROM.
- */
- cp = (u_char *)0xfe003ffa;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-
- /* The rest of this should come from the environment as well.
- */
- bd->bi_memstart = 0;
- bd->bi_memsize = (16 * 1024 * 1024);
- bd->bi_intfreq = 48000000;
- bd->bi_busfreq = 48000000;
-}
-#endif /* BSEIP */
-
-#ifdef CONFIG_FADS
-/* Build a board information structure for the FADS.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* Just fill in some known values.
- */
- bd->bi_baudrate = 9600;
-
- /* Use default enet.
- */
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-
- bd->bi_memstart = 0;
- bd->bi_memsize = (8 * 1024 * 1024);
- bd->bi_intfreq = 40000000;
- bd->bi_busfreq = 40000000;
-}
-#endif /* FADS */
-
-#ifdef CONFIG_8260
-/* Compute 8260 clock values if the rom doesn't provide them.
- */
-static unsigned char bus2core_8260[] = {
-/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
- 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
- 6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2,
-};
-
-static void
-clk_8260(bd_t *bd)
-{
- uint scmr, vco_out, clkin;
- uint plldf, pllmf, corecnf;
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
- scmr = ip->im_clkrst.car_scmr;
-
- /* The clkin is always bus frequency.
- */
- clkin = bd->bi_busfreq;
-
- /* Collect the bits from the scmr.
- */
- plldf = (scmr >> 12) & 1;
- pllmf = scmr & 0xfff;
- corecnf = (scmr >> 24) &0x1f;
-
- /* This is arithmetic from the 8260 manual.
- */
- vco_out = clkin / (plldf + 1);
- vco_out *= 2 * (pllmf + 1);
- bd->bi_vco = vco_out; /* Save for later */
-
- bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */
- bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
-
- /* Set Baud rate divisor. The power up default is divide by 16,
- * but we set it again here in case it was changed.
- */
- ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */
- bd->bi_brgfreq = vco_out / 16;
-}
-
-static unsigned char bus2core_8280[] = {
-/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
- 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
- 6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2,
-};
-
-static void
-clk_8280(bd_t *bd)
-{
- uint scmr, main_clk, clkin;
- uint pllmf, corecnf;
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
- scmr = ip->im_clkrst.car_scmr;
-
- /* The clkin is always bus frequency.
- */
- clkin = bd->bi_busfreq;
-
- /* Collect the bits from the scmr.
- */
- pllmf = scmr & 0xf;
- corecnf = (scmr >> 24) & 0x1f;
-
- /* This is arithmetic from the 8280 manual.
- */
- main_clk = clkin * (pllmf + 1);
-
- bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */
- bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
-
- /* Set Baud rate divisor. The power up default is divide by 16,
- * but we set it again here in case it was changed.
- */
- ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
- bd->bi_brgfreq = main_clk / 16;
-}
-#endif
-
-#ifdef CONFIG_SBC82xx
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
- unsigned long pvr;
-
- bd = *bdp;
-
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */
-
- cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
- memcpy(bd->bi_enetaddr, cp, 6);
-
- /* can busfreq be calculated? */
- pvr = mfspr(SPRN_PVR);
- if ((pvr & 0xffff0000) == 0x80820000) {
- bd->bi_busfreq = 100000000;
- clk_8280(bd);
- } else {
- bd->bi_busfreq = 66000000;
- clk_8260(bd);
- }
-
-}
-#endif /* SBC82xx */
-
-#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = *bdp;
-#if 0
- /* This is actually provided by my boot rom. I have it
- * here for those people that may load the kernel with
- * a JTAG/COP tool and not the rom monitor.
- */
- bd->bi_baudrate = 115200;
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 66666666;
- bd->bi_cpmfreq = 66666666;
- bd->bi_brgfreq = 33333333;
- bd->bi_memsize = 16 * 1024 * 1024;
-#else
- /* The boot rom passes these to us in MHz. Linux now expects
- * them to be in Hz.
- */
- bd->bi_intfreq *= 1000000;
- bd->bi_busfreq *= 1000000;
- bd->bi_cpmfreq *= 1000000;
- bd->bi_brgfreq *= 1000000;
-#endif
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* EST8260 */
-
-#ifdef CONFIG_SBS8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* This should provided by the boot rom.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 64 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 133000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* SBS8260 */
-
-#ifdef CONFIG_RPX8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp, *keyvals;
- int i;
- bd_t *bd;
-
- keyvals = (u_char *)*bdp;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* This is almost identical to the RPX-Lite/Classic functions
- * on the 8xx boards. It would be nice to have a key lookup
- * function in a string, but the format of all of the fields
- * is slightly different.
- */
- cp = keyvals;
- for (;;) {
- if (*cp == 'E') {
- cp++;
- if (*cp == 'A') {
- cp += 2;
- rpx_eth(bd, cp);
- }
- }
- if (*cp == 'S') {
- cp++;
- if (*cp == 'B') {
- cp += 2;
- bd->bi_baudrate = rpx_baseten(cp);
- }
- }
- if (*cp == 'D') {
- cp++;
- if (*cp == '1') {
- cp += 2;
- bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
- }
- }
- if (*cp == 'X') {
- cp++;
- if (*cp == 'T') {
- cp += 2;
- bd->bi_busfreq = rpx_baseten(cp);
- }
- }
- if (*cp == 'N') {
- cp++;
- if (*cp == 'V') {
- cp += 2;
- bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
- }
- }
-
- /* Scan to the end of the record.
- */
- while ((*cp != '\n') && (*cp != 0xff))
- cp++;
-
- /* If the next character is a 0 or ff, we are done.
- */
- cp++;
- if ((*cp == 0) || (*cp == 0xff))
- break;
- }
- bd->bi_memstart = 0;
-
- /* The memory size includes both the 60x and local bus DRAM.
- * I don't want to use the local bus DRAM for real memory,
- * so subtract it out. It would be nice if they were separate
- * keys.
- */
- bd->bi_memsize -= 32 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock.
- */
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-}
-#endif /* RPX6 for testing */
-
-#ifdef CONFIG_ADS8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* This should provided by the boot rom.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 16 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* ADS8260 */
-
-#ifdef CONFIG_WILLOW
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* Willow has Open Firmware....I should learn how to get this
- * information from it.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 32 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* WILLOW */
-
-#if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403)
-void
-embed_config(bd_t ** bdp)
-{
- static const unsigned long line_size = 32;
- static const unsigned long congruence_classes = 256;
- unsigned long addr;
- unsigned long dccr;
- uint8_t* cp;
- bd_t *bd;
- int i;
-
- /*
- * Invalidate the data cache if the data cache is turned off.
- * - The 405 core does not invalidate the data cache on power-up
- * or reset but does turn off the data cache. We cannot assume
- * that the cache contents are valid.
- * - If the data cache is turned on this must have been done by
- * a bootloader and we assume that the cache contents are
- * valid.
- */
- __asm__("mfdccr %0": "=r" (dccr));
- if (dccr == 0) {
- for (addr = 0;
- addr < (congruence_classes * line_size);
- addr += line_size) {
- __asm__("dccci 0,%0": :"b"(addr));
- }
- }
-
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_memsize = XPAR_DDR_0_SIZE;
- bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
- bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
- bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
-
- /* Copy the default ethernet address */
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++)
- bd->bi_enetaddr[i] = *cp++;
-
- timebase_period_ns = 1000000000 / bd->bi_tbfreq;
- /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
-}
-#endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */
-
-#ifdef CONFIG_IBM_OPENBIOS
-/* This could possibly work for all treeboot roms.
-*/
-#if defined(CONFIG_BUBINGA)
-#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
-#else
-#define BOARD_INFO_VECTOR 0xFFFE0B50
-#endif
-
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd, *treeboot_bd;
- bd_t *(*get_board_info)(void) =
- (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
-#if !defined(CONFIG_STB03xxx)
-
- /* shut down the Ethernet controller that the boot rom
- * sometimes leaves running.
- */
- mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
- while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
- out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */
-#endif
-
- bd = &bdinfo;
- *bdp = bd;
- if ((treeboot_bd = get_board_info()) != NULL) {
- memcpy(bd, treeboot_bd, sizeof(bd_t));
- }
- else {
- /* Hmmm...better try to stuff some defaults.
- */
- bd->bi_memsize = 16 * 1024 * 1024;
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- /* I should probably put different ones here,
- * hopefully only one is used.
- */
- bd->BD_EMAC_ADDR(0,i) = *cp;
-
-#ifdef CONFIG_PCI
- bd->bi_pci_enetaddr[i] = *cp++;
-#endif
- }
- bd->bi_tbfreq = 200 * 1000 * 1000;
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 100000000;
-#ifdef CONFIG_PCI
- bd->bi_pci_busfreq = 66666666;
-#endif
- }
- /* Yeah, this look weird, but on Redwood 4 they are
- * different object in the structure. Sincr Redwwood 5
- * and Redwood 6 use OpenBIOS, it requires a special value.
- */
-#if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
- bd->bi_tbfreq = 27 * 1000 * 1000;
-#endif
- timebase_period_ns = 1000000000 / bd->bi_tbfreq;
-}
-#endif /* CONFIG_IBM_OPENBIOS */
-
-#ifdef CONFIG_EP405
-#include <linux/serial_reg.h>
-
-void
-embed_config(bd_t **bdp)
-{
- u32 chcr0;
- u_char *cp;
- bd_t *bd;
-
- /* Different versions of the PlanetCore firmware vary in how
- they set up the serial port - in particular whether they
- use the internal or external serial clock for UART0. Make
- sure the UART is in a known state. */
- /* FIXME: We should use the board's 11.0592MHz external serial
- clock - it will be more accurate for serial rates. For
- now, however the baud rates in ep405.h are for the internal
- clock. */
- chcr0 = mfdcr(DCRN_CHCR0);
- if ( (chcr0 & 0x1fff) != 0x103e ) {
- mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
- /* The following tricks serial_init() into resetting the baud rate */
- writeb(0, UART0_IO_BASE + UART_LCR);
- }
-
- /* We haven't seen actual problems with the EP405 leaving the
- * EMAC running (as we have on Walnut). But the registers
- * suggest it may not be left completely quiescent. Reset it
- * just to be sure. */
- mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
- while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait