diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-11-12 09:23:11 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:45:31 +0100 |
| commit | 26b40ef1aa138599af223d08b73fd5d960fdabf7 (patch) | |
| tree | c32d518b78ea716611f96741c4ff930309b15d62 /arch/mips | |
| parent | 31ec86b8549992923c2639fa1841a02e48b93310 (diff) | |
MIPS: traps: Dump the PageGrain and Wired registers on MC
They can be useful to determine how the MMU is configured on a MC
exception.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8401/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kernel/traps.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 807def5ab5ed..ad3d2031c327 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1432,6 +1432,8 @@ asmlinkage void do_mcheck(struct pt_regs *regs) pr_err("EntryHi : %0*lx\n", field, read_c0_entryhi()); pr_err("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); pr_err("EntryLo1: %0*lx\n", field, read_c0_entrylo1()); + pr_err("Wired : %0x\n", read_c0_wired()); + pr_err("Pagegrain: %0x\n", read_c0_pagegrain()); if (cpu_has_htw) { pr_err("PWField : %0*lx\n", field, read_c0_pwfield()); pr_err("PWSize : %0*lx\n", field, read_c0_pwsize()); |