diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-01-15 10:31:54 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:06 +0100 |
| commit | 237036de6540a377268db5bb2b9c8efdccbe51c1 (patch) | |
| tree | 81a76206b8b67bb523d6994131faceeb62cf75e1 /arch/mips/pci | |
| parent | 0ee958e102b62b418c2fb46c3439d4262067a5fc (diff) | |
MIPS: Malta: Make use of generic CM support
Remove the Malta-specific CM probe code and instead make use of the
newly added generic CM code.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6364/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
| -rw-r--r-- | arch/mips/pci/pci-malta.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/pci/pci-malta.c b/arch/mips/pci/pci-malta.c index f1a73890dd4f..cfbbc3e3e914 100644 --- a/arch/mips/pci/pci-malta.c +++ b/arch/mips/pci/pci-malta.c @@ -27,7 +27,7 @@ #include <linux/init.h> #include <asm/gt64120.h> -#include <asm/gcmpregs.h> +#include <asm/mips-cm.h> #include <asm/mips-boards/generic.h> #include <asm/mips-boards/bonito64.h> #include <asm/mips-boards/msc01_pci.h> @@ -201,11 +201,11 @@ void __init mips_pcibios_init(void) msc_mem_resource.start = start & mask; msc_mem_resource.end = (start & mask) | ~mask; msc_controller.mem_offset = (start & mask) - (map & mask); -#ifdef CONFIG_MIPS_CMP - if (gcmp_niocu()) - gcmp_setregion(0, start, mask, - GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); -#endif + if (mips_cm_numiocu()) { + write_gcr_reg0_base(start); + write_gcr_reg0_mask(mask | + CM_GCR_REGn_MASK_CMTGT_IOCU0); + } MSC_READ(MSC01_PCI_SC2PIOBASL, start); MSC_READ(MSC01_PCI_SC2PIOMSKL, mask); MSC_READ(MSC01_PCI_SC2PIOMAPL, map); @@ -213,11 +213,11 @@ void __init mips_pcibios_init(void) msc_io_resource.end = (map & mask) | ~mask; msc_controller.io_offset = 0; ioport_resource.end = ~mask; -#ifdef CONFIG_MIPS_CMP - if (gcmp_niocu()) - gcmp_setregion(1, start, mask, - GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); -#endif + if (mips_cm_numiocu()) { + write_gcr_reg1_base(start); + write_gcr_reg1_mask(mask | + CM_GCR_REGn_MASK_CMTGT_IOCU0); + } /* If ranges overlap I/O takes precedence. */ start = start & mask; end = start | ~mask; |