diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-03-16 12:58:05 +0000 |
|---|---|---|
| committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-28 16:20:26 +0100 |
| commit | 49e9529b9d43773307b8c73bd251b71784830c3d (patch) | |
| tree | 15cda21aec6828b811af3f8af30a3bf438525dcb /arch/mips/mm | |
| parent | 8dee5901b20c5c95278aa3a462eb82826ff98b37 (diff) | |
MIPS: uasm: add jalr instruction
This patch allows use of the jalr instruction from uasm. It will be used
by a subsequent patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/uasm-mips.c | 1 | ||||
| -rw-r--r-- | arch/mips/mm/uasm.c | 9 |
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c index 3abd609518c9..45e3dc593dfb 100644 --- a/arch/mips/mm/uasm-mips.c +++ b/arch/mips/mm/uasm-mips.c @@ -82,6 +82,7 @@ static struct insn insn_table[] = { { insn_ins, M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE }, { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM }, { insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM }, + { insn_jalr, M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD }, { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM }, { insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS }, { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index ae18b823e414..a77a4b83307c 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -49,10 +49,10 @@ enum opcode { insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret, - insn_ext, insn_ins, insn_j, insn_jal, insn_jr, insn_ld, insn_ldx, - insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, insn_mtc0, - insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, - insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, + insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld, + insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, + insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, + insn_scd, insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, }; @@ -250,6 +250,7 @@ I_u2u1msbdu3(_ext) I_u2u1msbu3(_ins) I_u1(_j) I_u1(_jal) +I_u2u1(_jalr) I_u1(_jr) I_u2s3u1(_ld) I_u2s3u1(_ll) |