aboutsummaryrefslogtreecommitdiff
path: root/arch/m68k/include/asm/m528xsim.h
diff options
context:
space:
mode:
authorGreg Ungerer <gerg@uclinux.org>2011-03-06 23:01:46 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:55 +1000
commit6a92e1982d5c538d1cfafbe4b0cb16d49306854f (patch)
tree700847577d3cd3385125fe46822e8759a76607da /arch/m68k/include/asm/m528xsim.h
parent58f0ac98f386d2b335e5852e8feec828c43a0e13 (diff)
downloadlinux-linaro-stable-6a92e1982d5c538d1cfafbe4b0cb16d49306854f.tar.gz
m68knommu: clean up use of MBAR for DRAM registers on ColdFire start
In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m528xsim.h')
-rw-r--r--arch/m68k/include/asm/m528xsim.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 87c0cce59057..47324f2258a7 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -40,11 +40,11 @@
/*
* SDRAM configuration registers.
*/
-#define MCFSIM_DCR 0x44 /* SDRAM control */
-#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */
-#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */
-#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
-#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
+#define MCFSIM_DCR (MCF_IPSBAR + 0x00000044) /* Control */
+#define MCFSIM_DACR0 (MCF_IPSBAR + 0x00000048) /* Base address 0 */
+#define MCFSIM_DMR0 (MCF_IPSBAR + 0x0000004c) /* Address mask 0 */
+#define MCFSIM_DACR1 (MCF_IPSBAR + 0x00000050) /* Base address 1 */
+#define MCFSIM_DMR1 (MCF_IPSBAR + 0x00000054) /* Address mask 1 */
/*
* DMA unit base addresses.