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authorHirokazu Takata <takata@linux-m32r.org>2006-04-18 22:21:20 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-19 09:13:50 -0700
commit8e8ff02c0b61d9b7c15c7996a2eddbedf51a105b (patch)
treedde7fcedee5d8720f5cc95da5ed4629fd3369bc8 /arch/m32r
parentefe87d2b822e42975b4da958c9d321cf89bfeb5a (diff)
downloadlinux-linaro-stable-8e8ff02c0b61d9b7c15c7996a2eddbedf51a105b.tar.gz
[PATCH] m32r: Fix pt_regs for !COFNIG_ISA_DSP_LEVEL2 target
This modification is required to fix debugging function for m32r targets with !CONFIG_ISA_DSP_LEVEL2, by unifying 'struct pt_regs' and 'struct sigcontext' size for all M32R ISA. Some m32r processor core with !CONFIG_ISA_DSP_LEVEL2 configuration has only single accumulator a0 (ex. VDEC2 core, M32102 core, etc.), the others with CONFIG_ISA_DSP_LEVEL2 has two accumulators, a0 and a1. This means there are two variations of thread context. So far, we reduced and changed stackframe size at a syscall for their context size. However, this causes a problem that a GDB for processors with CONFIG_ISA_DSP_LEVEL2 cannot be used for processors with !CONFIG_ISA_DSP_LEVEL2. From the viewpoint of GDB support, we should reduce such variation of stackframe size for simplicity. In this patch, dummy members are added to 'struct pt_regs' and 'struct sigcontext' to adjust their size for !CONFIG_ISA_DSP_LEVEL2. This modification is also a one step for a GDB update in future. Currently, on the m32r, GDB can access process's context by using ptrace functions in a simple way of register by register access. By unifying stackframe size, we have a possibility to make use of ptrace functions of not only a single register access but also block register access, PTRACE_{GETREGS,PUTREGS}. However, for this purpose, we might have to modify stackframe structure some more; for example, PSW (processor status word) register should be pre-processed before pushing to stack at a syscall, and so on. In this case, we must update carefully both kernel and GDB at a time... Signed-off-by: Hayato Fujiwara <fujiwara@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Cc: Kei Sakamoto <ksakamot@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r')
-rw-r--r--arch/m32r/kernel/entry.S49
-rw-r--r--arch/m32r/kernel/signal.c4
2 files changed, 23 insertions, 30 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 3871b65f0c82..5e4a0c8a5d3c 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -20,7 +20,7 @@
* Stack layout in 'ret_from_system_call':
* ptrace needs to have all regs on the stack.
* if the order here is changed, it needs to be
- * updated in fork.c:copy_process, signal.c:do_signal,
+ * updated in fork.c:copy_thread, signal.c:do_signal,
* ptrace.c and ptrace.h
*
* M32Rx/M32R2 M32R
@@ -41,18 +41,17 @@
* @(0x38,sp) - syscall_nr ditto
* @(0x3c,sp) - acc0h @(0x3c,sp) - acch
* @(0x40,sp) - acc0l @(0x40,sp) - accl
- * @(0x44,sp) - acc1h @(0x44,sp) - psw
- * @(0x48,sp) - acc1l @(0x48,sp) - bpc
- * @(0x4c,sp) - psw @(0x4c,sp) - bbpsw
- * @(0x50,sp) - bpc @(0x50,sp) - bbpc
- * @(0x54,sp) - bbpsw @(0x54,sp) - spu (cr3)
- * @(0x58,sp) - bbpc @(0x58,sp) - fp (r13)
- * @(0x5c,sp) - spu (cr3) @(0x5c,sp) - lr (r14)
- * @(0x60,sp) - fp (r13) @(0x60,sp) - spi (cr12)
- * @(0x64,sp) - lr (r14) @(0x64,sp) - orig_r0
- * @(0x68,sp) - spi (cr2)
- * @(0x6c,sp) - orig_r0
- *
+ * @(0x44,sp) - acc1h @(0x44,sp) - dummy_acc1h
+ * @(0x48,sp) - acc1l @(0x48,sp) - dummy_acc1l
+ * @(0x4c,sp) - psw ditto
+ * @(0x50,sp) - bpc ditto
+ * @(0x54,sp) - bbpsw ditto
+ * @(0x58,sp) - bbpc ditto
+ * @(0x5c,sp) - spu (cr3) ditto
+ * @(0x60,sp) - fp (r13) ditto
+ * @(0x64,sp) - lr (r14) ditto
+ * @(0x68,sp) - spi (cr2) ditto
+ * @(0x6c,sp) - orig_r0 ditto
*/
#include <linux/config.h>
@@ -102,6 +101,12 @@
#define ACC0L(reg) @(0x40,reg)
#define ACC1H(reg) @(0x44,reg)
#define ACC1L(reg) @(0x48,reg)
+#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+#define ACCH(reg) @(0x3C,reg)
+#define ACCL(reg) @(0x40,reg)
+#else
+#error unknown isa configuration
+#endif
#define PSW(reg) @(0x4C,reg)
#define BPC(reg) @(0x50,reg)
#define BBPSW(reg) @(0x54,reg)
@@ -111,21 +116,6 @@
#define LR(reg) @(0x64,reg)
#define SP(reg) @(0x68,reg)
#define ORIG_R0(reg) @(0x6C,reg)
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
-#define ACCH(reg) @(0x3C,reg)
-#define ACCL(reg) @(0x40,reg)
-#define PSW(reg) @(0x44,reg)
-#define BPC(reg) @(0x48,reg)
-#define BBPSW(reg) @(0x4C,reg)
-#define BBPC(reg) @(0x50,reg)
-#define SPU(reg) @(0x54,reg)
-#define FP(reg) @(0x58,reg) /* FP = R13 */
-#define LR(reg) @(0x5C,reg)
-#define SP(reg) @(0x60,reg)
-#define ORIG_R0(reg) @(0x64,reg)
-#else
-#error unknown isa configuration
-#endif
CF_MASK = 0x00000001
TF_MASK = 0x00000100
@@ -231,7 +221,7 @@ restore_all:
RESTORE_ALL
# perform work that needs to be done immediately before resumption
- # r9 : frags
+ # r9 : flags
ALIGN
work_pending:
and3 r4, r9, #_TIF_NEED_RESCHED
@@ -1015,4 +1005,3 @@ ENTRY(sys_call_table)
.long sys_waitid
syscall_table_size=(.-sys_call_table)
-
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c
index cb33097fefc4..6498ee70bb73 100644
--- a/arch/m32r/kernel/signal.c
+++ b/arch/m32r/kernel/signal.c
@@ -118,6 +118,8 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
COPY(acch);
COPY(accl);
+ COPY(dummy_acc1h);
+ COPY(dummy_acc1l);
#else
#error unknown isa configuration
#endif
@@ -203,6 +205,8 @@ setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
COPY(acch);
COPY(accl);
+ COPY(dummy_acc1h);
+ COPY(dummy_acc1l);
#else
#error unknown isa configuration
#endif