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authorRichard Kuo <rkuo@codeaurora.org>2012-10-28 19:54:37 -0500
committerRichard Kuo <rkuo@codeaurora.org>2013-04-30 19:40:24 -0500
commitdb0fe532db3f60c93147514adfd1765894ea501e (patch)
treee938cc1aa7cbad94cafd35504f7792349d687e85 /arch/hexagon/kernel
parent20f704b69af63bffbc8e70bcf21990318a8912f5 (diff)
downloadlinux-linaro-stable-db0fe532db3f60c93147514adfd1765894ea501e.tar.gz
Hexagon: add support for additional exceptions
Add multi-reg-write and unaligned-PC exceptions. Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/kernel')
-rw-r--r--arch/hexagon/kernel/traps.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/hexagon/kernel/traps.c b/arch/hexagon/kernel/traps.c
index d59ee62f772d..12164a30e8ff 100644
--- a/arch/hexagon/kernel/traps.c
+++ b/arch/hexagon/kernel/traps.c
@@ -65,6 +65,10 @@ static const char *ex_name(int ex)
return "Write protection fault";
case HVM_GE_C_XMAL:
return "Misaligned instruction";
+ case HVM_GE_C_WREG:
+ return "Multiple writes to same register in packet";
+ case HVM_GE_C_PCAL:
+ return "Program counter values that are not properly aligned";
case HVM_GE_C_RMAL:
return "Misaligned data load";
case HVM_GE_C_WMAL:
@@ -324,6 +328,12 @@ void do_genex(struct pt_regs *regs)
case HVM_GE_C_XMAL:
misaligned_instruction(regs);
break;
+ case HVM_GE_C_WREG:
+ illegal_instruction(regs);
+ break;
+ case HVM_GE_C_PCAL:
+ misaligned_instruction(regs);
+ break;
case HVM_GE_C_RMAL:
misaligned_data_load(regs);
break;