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authorBen Dooks <ben.dooks@codethink.co.uk>2014-02-12 17:04:34 +0000
committerSimon Horman <horms+renesas@verge.net.au>2014-06-17 19:58:22 +0900
commite1a2c4eb132018ce5b988c9ff5ba7a01e5494af5 (patch)
treef12b3223362313bb668213d5ee87cd5bacec3220 /arch/arm
parente489c2a9bc82713167d9f721ca764f4b0d37e543 (diff)
ARM: shmobile: lager: add i2c1, i2c2 pins
Add pinctrl definitions for i2c1 and i2c2 busses on the Lager board to ensure these are setup correctly at initialisation time. The i2c0 and i2c3 busses are connected to single function pins. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> [horms+renesas@verge.net.au: Added shmobile to patch title] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index bd92dcf1ee9b..3297b86a52b7 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,6 +144,16 @@
states = <3300000 1
1800000 0>;
};
+
+ i2c1_pins: i2c1 {
+ renesas,groups = "i2c1";
+ renesas,function = "i2c1";
+ };
+
+ i2c2_pins: i2c2 {
+ renesas,groups = "i2c2";
+ renesas,function = "i2c2";
+ };
};
&extal_clk {
@@ -349,10 +359,14 @@
&i2c1 {
status = "ok";
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
};
&i2c2 {
status = "ok";
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
};
&i2c3 {