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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 14:20:39 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 14:20:39 -0800
commit57e964e1ae9bd4f699ae1074430bcf81a9a11377 (patch)
tree8c1fc5199e18a55cece4aa72bbaf2ca909bd1453 /arch/arm
parent4dee6b64ee7cfef94b47733c6d9fef07f8051c7c (diff)
parent39fbc76272225fb991ffdfac1e08974506cfa3eb (diff)
downloadlinux-linaro-stable-57e964e1ae9bd4f699ae1074430bcf81a9a11377.tar.gz
Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Non-critical bug fixes Simple bug fixes that were not considered important enough for inclusion into 3.2. * tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: update pxa and mmp ARM: pxa: Include linux/export.h in balloon3.c ARM: OMAP4: clock: Add CPU local timer clock node ARM: OMAP4: hwmod: Don't wait for the idle status if modulemode is not supported ARM: OMAP: AM3517/3505: fix crash on boot due to incorrect voltagedomain data ARM: OMAP: hwmod data: fix the panic on Nokia RM-680 during boot ARM: OMAP2+: DMA: Workaround for invalid destination position ARM: OMAP2+: DMA: Workaround for invalid source position
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c98
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c40
-rw-r--r--arch/arm/mach-pxa/balloon3.c1
-rw-r--r--arch/arm/plat-omap/dma.c22
6 files changed, 127 insertions, 57 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 0798a802497a..730097ee0f23 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1206,6 +1206,14 @@ static const struct clksel ocp_abe_iclk_div[] = {
{ .parent = NULL },
};
+static struct clk mpu_periphclk = {
+ .name = "mpu_periphclk",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
static struct clk ocp_abe_iclk = {
.name = "ocp_abe_iclk",
.parent = &aess_fclk,
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
+ CLK("smp_twd", NULL, &mpu_periphclk, CK_443X),
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 529142aff766..373d1f15c4eb 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -706,27 +706,65 @@ static void _enable_module(struct omap_hwmod *oh)
}
/**
- * _disable_module - enable CLKCTRL modulemode on OMAP4
+ * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
+ * @oh: struct omap_hwmod *
+ *
+ * Wait for a module @oh to enter slave idle. Returns 0 if the module
+ * does not have an IDLEST bit or if the module successfully enters
+ * slave idle; otherwise, pass along the return value of the
+ * appropriate *_cm*_wait_module_idle() function.
+ */
+static int _omap4_wait_target_disable(struct omap_hwmod *oh)
+{
+ if (!cpu_is_omap44xx())
+ return 0;
+
+ if (!oh)
+ return -EINVAL;
+
+ if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
+ return 0;
+
+ if (oh->flags & HWMOD_NO_IDLEST)
+ return 0;
+
+ return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
+ oh->clkdm->cm_inst,
+ oh->clkdm->clkdm_offs,
+ oh->prcm.omap4.clkctrl_offs);
+}
+
+/**
+ * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
* @oh: struct omap_hwmod *
*
* Disable the PRCM module mode related to the hwmod @oh.
- * No return value.
+ * Return EINVAL if the modulemode is not supported and 0 in case of success.
*/
-static void _disable_module(struct omap_hwmod *oh)
+static int _omap4_disable_module(struct omap_hwmod *oh)
{
+ int v;
+
/* The module mode does not exist prior OMAP4 */
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- return;
+ if (!cpu_is_omap44xx())
+ return -EINVAL;
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
- return;
+ return -EINVAL;
- pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
+ pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
omap4_cminst_module_disable(oh->clkdm->prcm_partition,
oh->clkdm->cm_inst,
oh->clkdm->clkdm_offs,
oh->prcm.omap4.clkctrl_offs);
+
+ v = _omap4_wait_target_disable(oh);
+ if (v)
+ pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
+ oh->name);
+
+ return 0;
}
/**
@@ -1153,36 +1191,6 @@ static int _wait_target_ready(struct omap_hwmod *oh)
}
/**
- * _wait_target_disable - wait for a module to be disabled
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to enter slave idle. Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully enters
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_idle() function.
- */
-static int _wait_target_disable(struct omap_hwmod *oh)
-{
- /* TODO: For now just handle OMAP4+ */
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- return 0;
-
- if (!oh)
- return -EINVAL;
-
- if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
- return 0;
-
- if (oh->flags & HWMOD_NO_IDLEST)
- return 0;
-
- return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
- oh->clkdm->cm_inst,
- oh->clkdm->clkdm_offs,
- oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
* _lookup_hardreset - fill register bit info for this hwmod/reset line
* @oh: struct omap_hwmod *
* @name: name of the reset line in the context of this hwmod
@@ -1524,8 +1532,6 @@ static int _enable(struct omap_hwmod *oh)
*/
static int _idle(struct omap_hwmod *oh)
{
- int ret;
-
pr_debug("omap_hwmod: %s: idling\n", oh->name);
if (oh->_state != _HWMOD_STATE_ENABLED) {
@@ -1537,11 +1543,9 @@ static int _idle(struct omap_hwmod *oh)
if (oh->class->sysc)
_idle_sysc(oh);
_del_initiator_dep(oh, mpu_oh);
- _disable_module(oh);
- ret = _wait_target_disable(oh);
- if (ret)
- pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
- oh->name);
+
+ _omap4_disable_module(oh);
+
/*
* The module must be in idle mode before disabling any parents
* clocks. Otherwise, the parent clock might be disabled before
@@ -1642,11 +1646,7 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh->_state == _HWMOD_STATE_ENABLED) {
_del_initiator_dep(oh, mpu_oh);
/* XXX what about the other system initiators here? dma, dsp */
- _disable_module(oh);
- ret = _wait_target_disable(oh);
- if (ret)
- pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
- oh->name);
+ _omap4_disable_module(oh);
_disable_clocks(oh);
if (oh->clkdm)
clkdm_hwmod_disable(oh->clkdm, oh);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index eef43e2e163e..126cb49c0de7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3198,7 +3198,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_timer9_hwmod,
&omap3xxx_timer10_hwmod,
&omap3xxx_timer11_hwmod,
- &omap3xxx_timer12_hwmod,
&omap3xxx_wd_timer2_hwmod,
&omap3xxx_uart1_hwmod,
@@ -3245,6 +3244,12 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
NULL,
};
+/* GP-only hwmods */
+static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = {
+ &omap3xxx_timer12_hwmod,
+ NULL
+};
+
/* 3430ES1-only hwmods */
static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
&omap3430es1_dss_core_hwmod,
@@ -3296,6 +3301,13 @@ int __init omap3xxx_hwmod_init(void)
if (r < 0)
return r;
+ /* Register GP-only hwmods. */
+ if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
+ r = omap_hwmod_register(omap3xxx_gp_hwmods);
+ if (r < 0)
+ return r;
+ }
+
rev = omap_rev();
/*
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 474559d5b072..c005e2f5e383 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -31,6 +31,14 @@
* VDD data
*/
+/* OMAP3-common voltagedomain data */
+
+static struct voltagedomain omap3_voltdm_wkup = {
+ .name = "wakeup",
+};
+
+/* 34xx/36xx voltagedomain data */
+
static const struct omap_vfsm_instance omap3_vdd1_vfsm = {
.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET,
.voltsetup_mask = OMAP3430_SETUP_TIME1_MASK,
@@ -63,10 +71,6 @@ static struct voltagedomain omap3_voltdm_core = {
.vp = &omap3_vp_core,
};
-static struct voltagedomain omap3_voltdm_wkup = {
- .name = "wakeup",
-};
-
static struct voltagedomain *voltagedomains_omap3[] __initdata = {
&omap3_voltdm_mpu,
&omap3_voltdm_core,
@@ -74,11 +78,30 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = {
NULL,
};
+/* AM35xx voltagedomain data */
+
+static struct voltagedomain am35xx_voltdm_mpu = {
+ .name = "mpu_iva",
+};
+
+static struct voltagedomain am35xx_voltdm_core = {
+ .name = "core",
+};
+
+static struct voltagedomain *voltagedomains_am35xx[] __initdata = {
+ &am35xx_voltdm_mpu,
+ &am35xx_voltdm_core,
+ &omap3_voltdm_wkup,
+ NULL,
+};
+
+
static const char *sys_clk_name __initdata = "sys_ck";
void __init omap3xxx_voltagedomains_init(void)
{
struct voltagedomain *voltdm;
+ struct voltagedomain **voltdms;
int i;
/*
@@ -93,8 +116,13 @@ void __init omap3xxx_voltagedomains_init(void)
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
}
- for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++)
+ if (cpu_is_omap3517() || cpu_is_omap3505())
+ voltdms = voltagedomains_am35xx;
+ else
+ voltdms = voltagedomains_omap3;
+
+ for (i = 0; voltdm = voltdms[i], voltdm; i++)
voltdm->sys_clk.name = sys_clk_name;
- voltdm_init(voltagedomains_omap3);
+ voltdm_init(voltdms);
};
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 82514f5c38f1..a34de9a0d5e5 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -13,6 +13,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/export.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c22217c2ee5f..002fb4d96bbc 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1034,6 +1034,18 @@ dma_addr_t omap_get_dma_src_pos(int lch)
if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
offset = p->dma_read(CSAC, lch);
+ if (!cpu_is_omap15xx()) {
+ /*
+ * CDAC == 0 indicates that the DMA transfer on the channel has
+ * not been started (no data has been transferred so far).
+ * Return the programmed source start address in this case.
+ */
+ if (likely(p->dma_read(CDAC, lch)))
+ offset = p->dma_read(CSAC, lch);
+ else
+ offset = p->dma_read(CSSA, lch);
+ }
+
if (cpu_class_is_omap1())
offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
@@ -1062,8 +1074,16 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
* read before the DMA controller finished disabling the channel.
*/
- if (!cpu_is_omap15xx() && offset == 0)
+ if (!cpu_is_omap15xx() && offset == 0) {
offset = p->dma_read(CDAC, lch);
+ /*
+ * CDAC == 0 indicates that the DMA transfer on the channel has
+ * not been started (no data has been transferred so far).
+ * Return the programmed destination start address in this case.
+ */
+ if (unlikely(!offset))
+ offset = p->dma_read(CDSA, lch);
+ }
if (cpu_class_is_omap1())
offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);