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authorVaibhav Bedia <vaibhav.bedia@gmail.com>2014-02-16 18:15:44 -0500
committerPaul Walmsley <paul@pwsan.com>2014-02-19 10:38:26 -0700
commit18ba7b9d5fd6eb2c2c510dfcfc6e8fee56c42571 (patch)
tree5027d55acd2d9ad30d6410702da3f448a4d40e44 /arch/arm
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
ARM: OMAP5: PRM: Fix reboot handling
Use the correct register offset for issuing the reset command in OMAP5. Since dev_inst is set dynamically OMAP4 should not be affected by this change. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@gmail.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 6334b96b4097..280f3c58abe5 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -183,11 +183,11 @@ void omap4_prminst_global_warm_sw_reset(void)
OMAP4_PRM_RSTCTRL_OFFSET);
v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
- OMAP4430_PRM_DEVICE_INST,
+ dev_inst,
OMAP4_PRM_RSTCTRL_OFFSET);
/* OCP barrier */
v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
- OMAP4430_PRM_DEVICE_INST,
+ dev_inst,
OMAP4_PRM_RSTCTRL_OFFSET);
}