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authorJungseok Lee <jungseoklee85@gmail.com>2015-12-04 11:02:25 +0000
committerAlex Shi <alex.shi@linaro.org>2016-05-25 13:59:27 +0800
commite8a7dd2dac431df753702697470ed5e6e035df11 (patch)
treece6463596bf5686839ec1320356a639863de66a7 /arch/arm64/kernel/head.S
parent4e01a2d3457fc216ce651e977d662b2c6cf5115e (diff)
arm64: Store struct thread_info in sp_el0
There is need for figuring out how to manage struct thread_info data when IRQ stack is introduced. struct thread_info information should be copied to IRQ stack under the current thread_info calculation logic whenever context switching is invoked. This is too expensive to keep supporting the approach. Instead, this patch pays attention to sp_el0 which is an unused scratch register in EL1 context. sp_el0 utilization not only simplifies the management, but also prevents text section size from being increased largely due to static allocated IRQ stack as removing masking operation using THREAD_SIZE in many places. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Jungseok Lee <jungseoklee85@gmail.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 6cdf9c7ca687e01840d0215437620a20263012fc) Signed-off-by: Alex Shi <alex.shi@linaro.org>
Diffstat (limited to 'arch/arm64/kernel/head.S')
-rw-r--r--arch/arm64/kernel/head.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index c39f63461e46..751b7510c004 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -420,6 +420,9 @@ __mmap_switched:
dsb ishst // Make zero page visible to PTW
adr_l sp, initial_sp, x4
+ mov x4, sp
+ and x4, x4, #~(THREAD_SIZE - 1)
+ msr sp_el0, x4 // Save thread_info
str_l x21, __fdt_pointer, x5 // Save FDT pointer
str_l x24, memstart_addr, x6 // Save PHYS_OFFSET
mov x29, #0
@@ -602,6 +605,8 @@ ENDPROC(secondary_startup)
ENTRY(__secondary_switched)
ldr x0, [x21] // get secondary_data.stack
mov sp, x0
+ and x0, x0, #~(THREAD_SIZE - 1)
+ msr sp_el0, x0 // save thread_info
mov x29, #0
b secondary_start_kernel
ENDPROC(__secondary_switched)