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authorJavi Merino <javi.merino@arm.com>2012-08-29 18:32:18 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-20 18:09:42 +0000
commit0359b0e2d0bbd28289c38ebe779b5f1c61f8ccc8 (patch)
tree72012e79026c22a566dba7a9df904a0c60c80475 /arch/arm64/kernel/head.S
parent4c7aa0021356ee91b96cea51b8b7fadebaba489e (diff)
downloadlinux-linaro-stable-0359b0e2d0bbd28289c38ebe779b5f1c61f8ccc8.tar.gz
arm64: head: match all affinity levels in the pen of the secondaries
The reg property of the cpu nodes in the DT now contains all the affinity levels in (MPIDR[39:32] and MPIDR[23:0]) and that's what boot_secondary() writes in the pen, so increase the mask in secondary_holding_pen accordingly. Signed-off-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/head.S')
-rw-r--r--arch/arm64/kernel/head.S4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 0a0a49756826..53dcae49e729 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -26,6 +26,7 @@
#include <asm/assembler.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
+#include <asm/cputype.h>
#include <asm/memory.h>
#include <asm/thread_info.h>
#include <asm/pgtable-hwdef.h>
@@ -229,7 +230,8 @@ ENTRY(secondary_holding_pen)
bl __calc_phys_offset // x24=phys offset
bl el2_setup // Drop to EL1
mrs x0, mpidr_el1
- and x0, x0, #15 // CPU number
+ ldr x1, =MPIDR_HWID_BITMASK
+ and x0, x0, x1
adr x1, 1b
ldp x2, x3, [x1]
sub x1, x1, x2