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authorBen Dooks <ben.dooks@codethink.co.uk>2013-12-11 10:07:42 +0000
committerSimon Horman <horms+renesas@verge.net.au>2013-12-12 21:58:58 +0900
commit0fe35077a92ce45acfa2b7259bba516757fb0c3f (patch)
treecbe8f4ca4719ee2d358032d475db76ccfa3d3c67 /arch/arm/mach-shmobile/setup-rcar-gen2.c
parent893c3f0bc55e749124f14b02eee9510147fefd90 (diff)
downloadlinux-linaro-stable-0fe35077a92ce45acfa2b7259bba516757fb0c3f.tar.gz
ARM: rcar-gen2: Do not setup timer in non-secure mode
If the system has been started in non-secure mode, then the ARM generic timer is not configurable during the kernel initialisation. Currently the only thing we can check for is if the timer has been correctly configured during the boot process. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/setup-rcar-gen2.c')
-rw-r--r--arch/arm/mach-shmobile/setup-rcar-gen2.c21
1 files changed, 16 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5734c24bf6c7..b6275ab6085c 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -78,12 +78,23 @@ void __init rcar_gen2_timer_init(void)
/* Remap "armgcnt address map" space */
base = ioremap(0xe6080000, PAGE_SIZE);
- /* Update registers with correct frequency */
- iowrite32(freq, base + CNTFID0);
- asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+ /*
+ * Update the timer if it is either not running, or is not at the
+ * right frequency. The timer is only configurable in secure mode
+ * so this avoids an abort if the loader started the timer and
+ * entered the kernel in non-secure mode.
+ */
+
+ if ((ioread32(base + CNTCR) & 1) == 0 ||
+ ioread32(base + CNTFID0) != freq) {
+ /* Update registers with correct frequency */
+ iowrite32(freq, base + CNTFID0);
+ asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+
+ /* make sure arch timer is started by setting bit 0 of CNTCR */
+ iowrite32(1, base + CNTCR);
+ }
- /* make sure arch timer is started by setting bit 0 of CNTCR */
- iowrite32(1, base + CNTCR);
iounmap(base);
#endif /* CONFIG_ARM_ARCH_TIMER */