diff options
| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-04-28 02:25:01 +0200 |
|---|---|---|
| committer | Tomasz Figa <tomasz.figa@gmail.com> | 2013-08-06 01:21:46 +0200 |
| commit | 4280506ac9bb17f2450cf1042edf929d26d24a8e (patch) | |
| tree | 363304c12a68b8066c1f52caa46e6070603f446b /arch/arm/mach-s3c64xx/common.c | |
| parent | 1c161fd0d453ff63c8bb3a703d46d10ac5eba7a4 (diff) | |
ARM: SAMSUNG: Move all platforms to new clocksource driver
This patch moves all Samsung platforms using PWM clocksource from legacy
samsung-time to new samsung-pwm-timer driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-s3c64xx/common.c')
| -rw-r--r-- | arch/arm/mach-s3c64xx/common.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index ca05e61f401c..73d79cf5e141 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -43,7 +43,6 @@ #include <plat/pm.h> #include <plat/gpio-cfg.h> #include <plat/irq-uart.h> -#include <plat/irq-vic-timer.h> #include <plat/pwm-core.h> #include <plat/regs-irqtype.h> #include <plat/regs-serial.h> @@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = { .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), }; +void __init samsung_set_timer_source(unsigned int event, unsigned int source) +{ + s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; + s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); +} + +void __init samsung_timer_init(void) +{ + unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { + IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, + IRQ_TIMER3_VIC, IRQ_TIMER4_VIC, + }; + + samsung_pwm_clocksource_init(S3C_VA_TIMER, + timer_irqs, &s3c64xx_pwm_variant); +} + /* read cpu identification code */ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) @@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) /* initialise the pair of VICs */ vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); - - /* add the timer sub-irqs */ - s3c_init_vic_timer_irq(5, IRQ_TIMER0); } #define eint_offset(irq) ((irq) - IRQ_EINT(0)) |