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authorChris Zhong <zyw@rock-chips.com>2015-02-09 21:12:22 +0800
committerHeiko Stuebner <heiko@sntech.de>2015-03-11 22:40:59 +0100
commitaefc7c7512455c26574ae7118429920dc3de60ae (patch)
tree7add9a7ac1299ea35a487bd6a8428e272f98e658 /arch/arm/mach-rockchip/pm.h
parentbd76d73836fa903d67eaabcb3a0201d2d0a73461 (diff)
downloadlinux-linaro-stable-aefc7c7512455c26574ae7118429920dc3de60ae.tar.gz
ARM: rockchip: decrease the wait time for resume
The register-default delay time for wait the 24MHz OSC stabilization as well as PMU stabilization is 750ms, let's decrease them to a still safe 30ms. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/mach-rockchip/pm.h')
-rw-r--r--arch/arm/mach-rockchip/pm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index 7c889c04604b..91a542df5791 100644
--- a/arch/arm/mach-rockchip/pm.h
+++ b/arch/arm/mach-rockchip/pm.h
@@ -63,6 +63,10 @@ static inline void rockchip_suspend_init(void)
/* PMU_WAKEUP_CFG1 bits */
#define PMU_ARMINT_WAKEUP_EN BIT(0)
+/* wait 30ms for OSC stable and 30ms for pmic stable */
+#define OSC_STABL_CNT_THRESH (32 * 30)
+#define PMU_STABL_CNT_THRESH (32 * 30)
+
enum rk3288_pwr_mode_con {
PMU_PWR_MODE_EN = 0,
PMU_CLK_CORE_SRC_GATE_EN,