aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-realview/realview_pb1176.c
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@stericsson.com>2010-07-02 10:24:03 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-09 14:32:35 +0100
commit48f1d5a3cef5782cbc7a32c29f1eda2342877c13 (patch)
tree1a7852e7b646f48118dbb97988c44f1971cd4a8e /arch/arm/mach-realview/realview_pb1176.c
parentbde28b846e7e0ea6fea78f6ad1c43091fdf4d3e0 (diff)
downloadlinux-linaro-stable-48f1d5a3cef5782cbc7a32c29f1eda2342877c13.tar.gz
ARM: 6204/1: Fixups for the RealView PB1176
This is a number of basic fixes to the PB1176 that makes it tick properly: - Detect MMC insertion/removal even when PL061 GPIO is not compiled in. The register to read this status directly is removed on the PB1176. - Define the UART3 on the DevChip (where is actually is) and define the new UART4 serial port on the FPGA. - Also define the clocks for these two UARTs apropriately. - Remove the false notion that the PB1176 should have its CLCD on the ISSP, this is not the case, it is in the DevChip. - Remove the defintions and the previously commented-out PL081 DMAC. As confirmed by mail this was found to be broken on the PB1176 board and removed from the subsequent FPGA images. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/realview_pb1176.c')
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 099a1f125cf8..9f02350cff3b 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -144,8 +144,6 @@ static struct pl061_platform_data gpio2_plat_data = {
#define MPMC_DMA { 0, 0 }
#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
#define PB1176_CLCD_DMA { 0, 0 }
-#define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
-#define DMAC_DMA { 0, 0 }
#define SCTL_IRQ { NO_IRQ, NO_IRQ }
#define SCTL_DMA { 0, 0 }
#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
@@ -166,6 +164,8 @@ static struct pl061_platform_data gpio2_plat_data = {
#define PB1176_UART2_DMA { 11, 10 }
#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
#define PB1176_UART3_DMA { 0x86, 0x87 }
+#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ }
+#define PB1176_UART4_DMA { 0, 0 }
#define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
#define PB1176_SSP_DMA { 9, 8 }
@@ -174,7 +174,7 @@ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
-AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
+AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
@@ -188,18 +188,16 @@ AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
+AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
-
-/* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
-//AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
+AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
static struct amba_device *amba_devs[] __initdata = {
-// &dmac_device,
&uart0_device,
&uart1_device,
&uart2_device,
&uart3_device,
+ &uart4_device,
&smc_device,
&clcd_device,
&sctl_device,